linux/drivers/gpu/drm/mxsfb/lcdif_regs.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * Copyright (C) 2022 Marek Vasut <[email protected]>
 *
 * i.MX8MP/i.MXRT LCDIF LCD controller driver.
 */

#ifndef __LCDIF_REGS_H__
#define __LCDIF_REGS_H__

#define REG_SET
#define REG_CLR

/* V8 register set */
#define LCDC_V8_CTRL
#define LCDC_V8_DISP_PARA
#define LCDC_V8_DISP_SIZE
#define LCDC_V8_HSYN_PARA
#define LCDC_V8_VSYN_PARA
#define LCDC_V8_VSYN_HSYN_WIDTH
#define LCDC_V8_INT_STATUS_D0
#define LCDC_V8_INT_ENABLE_D0
#define LCDC_V8_INT_STATUS_D1
#define LCDC_V8_INT_ENABLE_D1
#define LCDC_V8_CTRLDESCL0_1
#define LCDC_V8_CTRLDESCL0_3
#define LCDC_V8_CTRLDESCL_LOW0_4
#define LCDC_V8_CTRLDESCL_HIGH0_4
#define LCDC_V8_CTRLDESCL0_5
#define LCDC_V8_CSC0_CTRL
#define LCDC_V8_CSC0_COEF0
#define LCDC_V8_CSC0_COEF1
#define LCDC_V8_CSC0_COEF2
#define LCDC_V8_CSC0_COEF3
#define LCDC_V8_CSC0_COEF4
#define LCDC_V8_CSC0_COEF5
#define LCDC_V8_PANIC0_THRES

#define CTRL_SFTRST
#define CTRL_CLKGATE
#define CTRL_BYPASS_COUNT
#define CTRL_VSYNC_MODE
#define CTRL_DOTCLK_MODE
#define CTRL_DATA_SELECT
#define CTRL_BUS_WIDTH_16
#define CTRL_BUS_WIDTH_8
#define CTRL_BUS_WIDTH_18
#define CTRL_BUS_WIDTH_24
#define CTRL_BUS_WIDTH_MASK
#define CTRL_WORD_LENGTH_16
#define CTRL_WORD_LENGTH_8
#define CTRL_WORD_LENGTH_18
#define CTRL_WORD_LENGTH_24
#define CTRL_MASTER
#define CTRL_DF16
#define CTRL_DF18
#define CTRL_DF24
#define CTRL_RUN

#define CTRL1_RECOVER_ON_UNDERFLOW
#define CTRL1_FIFO_CLEAR
#define CTRL1_SET_BYTE_PACKAGING(x)
#define CTRL1_GET_BYTE_PACKAGING(x)
#define CTRL1_CUR_FRAME_DONE_IRQ_EN
#define CTRL1_CUR_FRAME_DONE_IRQ

#define CTRL2_SET_OUTSTANDING_REQS_1
#define CTRL2_SET_OUTSTANDING_REQS_2
#define CTRL2_SET_OUTSTANDING_REQS_4
#define CTRL2_SET_OUTSTANDING_REQS_8
#define CTRL2_SET_OUTSTANDING_REQS_16
#define CTRL2_SET_OUTSTANDING_REQS_MASK

#define TRANSFER_COUNT_SET_VCOUNT(x)
#define TRANSFER_COUNT_GET_VCOUNT(x)
#define TRANSFER_COUNT_SET_HCOUNT(x)
#define TRANSFER_COUNT_GET_HCOUNT(x)

#define VDCTRL0_ENABLE_PRESENT
#define VDCTRL0_VSYNC_ACT_HIGH
#define VDCTRL0_HSYNC_ACT_HIGH
#define VDCTRL0_DOTCLK_ACT_FALLING
#define VDCTRL0_ENABLE_ACT_HIGH
#define VDCTRL0_VSYNC_PERIOD_UNIT
#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT
#define VDCTRL0_HALF_LINE
#define VDCTRL0_HALF_LINE_MODE
#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x)
#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x)

#define VDCTRL2_SET_HSYNC_PERIOD(x)
#define VDCTRL2_GET_HSYNC_PERIOD(x)

#define VDCTRL3_MUX_SYNC_SIGNALS
#define VDCTRL3_VSYNC_ONLY
#define SET_HOR_WAIT_CNT(x)
#define GET_HOR_WAIT_CNT(x)
#define SET_VERT_WAIT_CNT(x)
#define GET_VERT_WAIT_CNT(x)

#define VDCTRL4_SET_DOTCLK_DLY(x)
#define VDCTRL4_GET_DOTCLK_DLY(x)
#define VDCTRL4_SYNC_SIGNALS_ON
#define SET_DOTCLK_H_VALID_DATA_CNT(x)

#define DEBUG0_HSYNC
#define DEBUG0_VSYNC

#define AS_CTRL_PS_DISABLE
#define AS_CTRL_ALPHA_INVERT
#define AS_CTRL_ALPHA(a)
#define AS_CTRL_FORMAT_RGB565
#define AS_CTRL_FORMAT_RGB444
#define AS_CTRL_FORMAT_RGB555
#define AS_CTRL_FORMAT_ARGB4444
#define AS_CTRL_FORMAT_ARGB1555
#define AS_CTRL_FORMAT_RGB888
#define AS_CTRL_FORMAT_ARGB8888
#define AS_CTRL_ENABLE_COLORKEY
#define AS_CTRL_ALPHA_CTRL_ROP
#define AS_CTRL_ALPHA_CTRL_MULTIPLY
#define AS_CTRL_ALPHA_CTRL_OVERRIDE
#define AS_CTRL_ALPHA_CTRL_EMBEDDED
#define AS_CTRL_AS_ENABLE

/* V8 register set */
#define CTRL_SW_RESET
#define CTRL_FETCH_START_OPTION_FPV
#define CTRL_FETCH_START_OPTION_PWV
#define CTRL_FETCH_START_OPTION_BPV
#define CTRL_FETCH_START_OPTION_RESV
#define CTRL_FETCH_START_OPTION_MASK
#define CTRL_NEG
#define CTRL_INV_PXCK
#define CTRL_INV_DE
#define CTRL_INV_VS
#define CTRL_INV_HS

#define DISP_PARA_DISP_ON
#define DISP_PARA_SWAP_EN
#define DISP_PARA_LINE_PATTERN_UYVY_H
#define DISP_PARA_LINE_PATTERN_RGB565
#define DISP_PARA_LINE_PATTERN_RGB888
#define DISP_PARA_LINE_PATTERN_MASK
#define DISP_PARA_DISP_MODE_MASK
#define DISP_PARA_BGND_R_MASK
#define DISP_PARA_BGND_G_MASK
#define DISP_PARA_BGND_B_MASK

#define DISP_SIZE_DELTA_Y(n)
#define DISP_SIZE_DELTA_Y_MASK
#define DISP_SIZE_DELTA_X(n)
#define DISP_SIZE_DELTA_X_MASK

#define HSYN_PARA_BP_H(n)
#define HSYN_PARA_BP_H_MASK
#define HSYN_PARA_FP_H(n)
#define HSYN_PARA_FP_H_MASK

#define VSYN_PARA_BP_V(n)
#define VSYN_PARA_BP_V_MASK
#define VSYN_PARA_FP_V(n)
#define VSYN_PARA_FP_V_MASK

#define VSYN_HSYN_WIDTH_PW_V(n)
#define VSYN_HSYN_WIDTH_PW_V_MASK
#define VSYN_HSYN_WIDTH_PW_H(n)
#define VSYN_HSYN_WIDTH_PW_H_MASK

#define INT_STATUS_D0_FIFO_EMPTY
#define INT_STATUS_D0_DMA_DONE
#define INT_STATUS_D0_DMA_ERR
#define INT_STATUS_D0_VS_BLANK
#define INT_STATUS_D0_UNDERRUN
#define INT_STATUS_D0_VSYNC

#define INT_ENABLE_D0_FIFO_EMPTY_EN
#define INT_ENABLE_D0_DMA_DONE_EN
#define INT_ENABLE_D0_DMA_ERR_EN
#define INT_ENABLE_D0_VS_BLANK_EN
#define INT_ENABLE_D0_UNDERRUN_EN
#define INT_ENABLE_D0_VSYNC_EN

#define INT_STATUS_D1_PLANE_PANIC

#define INT_ENABLE_D1_PLANE_PANIC_EN

#define CTRLDESCL0_1_HEIGHT(n)
#define CTRLDESCL0_1_HEIGHT_MASK
#define CTRLDESCL0_1_WIDTH(n)
#define CTRLDESCL0_1_WIDTH_MASK

#define CTRLDESCL0_3_P_SIZE(n)
#define CTRLDESCL0_3_P_SIZE_MASK
#define CTRLDESCL0_3_T_SIZE(n)
#define CTRLDESCL0_3_T_SIZE_MASK
#define CTRLDESCL0_3_PITCH(n)
#define CTRLDESCL0_3_PITCH_MASK

#define CTRLDESCL_HIGH0_4_ADDR_HIGH(n)
#define CTRLDESCL_HIGH0_4_ADDR_HIGH_MASK

#define CTRLDESCL0_5_EN
#define CTRLDESCL0_5_SHADOW_LOAD_EN
#define CTRLDESCL0_5_BPP_16_RGB565
#define CTRLDESCL0_5_BPP_16_ARGB1555
#define CTRLDESCL0_5_BPP_16_ARGB4444
#define CTRLDESCL0_5_BPP_YCbCr422
#define CTRLDESCL0_5_BPP_24_RGB888
#define CTRLDESCL0_5_BPP_32_ARGB8888
#define CTRLDESCL0_5_BPP_32_ABGR8888
#define CTRLDESCL0_5_BPP_MASK
#define CTRLDESCL0_5_YUV_FORMAT_Y2VY1U
#define CTRLDESCL0_5_YUV_FORMAT_Y2UY1V
#define CTRLDESCL0_5_YUV_FORMAT_VY2UY1
#define CTRLDESCL0_5_YUV_FORMAT_UY2VY1
#define CTRLDESCL0_5_YUV_FORMAT_MASK

#define CSC0_CTRL_CSC_MODE_YUV2RGB
#define CSC0_CTRL_CSC_MODE_YCbCr2RGB
#define CSC0_CTRL_CSC_MODE_RGB2YUV
#define CSC0_CTRL_CSC_MODE_RGB2YCbCr
#define CSC0_CTRL_CSC_MODE_MASK
#define CSC0_CTRL_BYPASS

#define CSC0_COEF0_A2(n)
#define CSC0_COEF0_A2_MASK
#define CSC0_COEF0_A1(n)
#define CSC0_COEF0_A1_MASK

#define CSC0_COEF1_B1(n)
#define CSC0_COEF1_B1_MASK
#define CSC0_COEF1_A3(n)
#define CSC0_COEF1_A3_MASK

#define CSC0_COEF2_B3(n)
#define CSC0_COEF2_B3_MASK
#define CSC0_COEF2_B2(n)
#define CSC0_COEF2_B2_MASK

#define CSC0_COEF3_C2(n)
#define CSC0_COEF3_C2_MASK
#define CSC0_COEF3_C1(n)
#define CSC0_COEF3_C1_MASK

#define CSC0_COEF4_D1(n)
#define CSC0_COEF4_D1_MASK
#define CSC0_COEF4_C3(n)
#define CSC0_COEF4_C3_MASK

#define CSC0_COEF5_D3(n)
#define CSC0_COEF5_D3_MASK
#define CSC0_COEF5_D2(n)
#define CSC0_COEF5_D2_MASK

#define PANIC0_THRES_LOW_MASK
#define PANIC0_THRES_HIGH_MASK
#define PANIC0_THRES_MAX

#define LCDIF_MIN_XRES
#define LCDIF_MIN_YRES
#define LCDIF_MAX_XRES
#define LCDIF_MAX_YRES

#endif /* __LCDIF_REGS_H__ */