// SPDX-License-Identifier: GPL-2.0 /* * CS42L43 core driver * * Copyright (C) 2022-2023 Cirrus Logic, Inc. and * Cirrus Logic International Semiconductor Ltd. */ #include <linux/array_size.h> #include <linux/bitops.h> #include <linux/build_bug.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/err.h> #include <linux/firmware.h> #include <linux/gpio/consumer.h> #include <linux/jiffies.h> #include <linux/mfd/core.h> #include <linux/mfd/cs42l43.h> #include <linux/mfd/cs42l43-regs.h> #include <linux/module.h> #include <linux/pm.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/soundwire/sdw.h> #include <linux/types.h> #include "cs42l43.h" #define CS42L43_RESET_DELAY_MS … #define CS42L43_SDW_ATTACH_TIMEOUT_MS … #define CS42L43_SDW_DETACH_TIMEOUT_MS … #define CS42L43_MCU_BOOT_STAGE1 … #define CS42L43_MCU_BOOT_STAGE2 … #define CS42L43_MCU_BOOT_STAGE3 … #define CS42L43_MCU_BOOT_STAGE4 … #define CS42L43_MCU_POLL_US … #define CS42L43_MCU_CMD_TIMEOUT_US … #define CS42L43_MCU_UPDATE_FORMAT … #define CS42L43_MCU_UPDATE_OFFSET … #define CS42L43_MCU_UPDATE_TIMEOUT_US … #define CS42L43_MCU_UPDATE_RETRIES … #define CS42L43_MCU_ROM_REV … #define CS42L43_MCU_ROM_BIOS_REV … #define CS42L43_MCU_SUPPORTED_REV … #define CS42L43_MCU_SHADOW_REGS_REQUIRED_REV … #define CS42L43_MCU_SUPPORTED_BIOS_REV … #define CS42L43_VDDP_DELAY_US … #define CS42L43_VDDD_DELAY_US … #define CS42L43_AUTOSUSPEND_TIME_MS … struct cs42l43_patch_header { … } __packed; static const struct reg_sequence cs42l43_reva_patch[] = …; const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = …; EXPORT_SYMBOL_NS_GPL(…); bool cs42l43_readable_register(struct device *dev, unsigned int reg) { … } EXPORT_SYMBOL_NS_GPL(…); bool cs42l43_precious_register(struct device *dev, unsigned int reg) { … } EXPORT_SYMBOL_NS_GPL(…); bool cs42l43_volatile_register(struct device *dev, unsigned int reg) { … } EXPORT_SYMBOL_NS_GPL(…); #define CS42L43_IRQ_OFFSET(reg) … #define CS42L43_IRQ_REG(name, reg) … static const struct regmap_irq cs42l43_regmap_irqs[] = …; static const struct regmap_irq_chip cs42l43_irq_chip = …; static const char * const cs42l43_core_supplies[] = …; static const char * const cs42l43_parent_supplies[] = …; static const struct mfd_cell cs42l43_devs[] = …; /* * If the device is connected over Soundwire, as well as soft resetting the * device, this function will also way for the device to detach from the bus * before returning. */ static int cs42l43_soft_reset(struct cs42l43 *cs42l43) { … } /* * This function is essentially a no-op on I2C, but will wait for the device to * attach when the device is used on a SoundWire bus. */ static int cs42l43_wait_for_attach(struct cs42l43 *cs42l43) { … } /* * This function will advance the firmware into boot stage 3 from boot stage 2. * Boot stage 3 is required to send commands to the firmware. This is achieved * by setting the firmware NEED configuration register to zero, this indicates * no configuration is required forcing the firmware to advance to boot stage 3. * * Later revisions of the firmware require the use of an alternative register * for this purpose, which is indicated through the shadow flag. */ static int cs42l43_mcu_stage_2_3(struct cs42l43 *cs42l43, bool shadow) { … } /* * This function will return the firmware to boot stage 2 from boot stage 3. * Boot stage 2 is required to apply updates to the firmware. This is achieved * by setting the firmware NEED configuration register to FW_PATCH_NEED_CFG, * setting the HAVE configuration register to 0, and soft resetting. The * firmware will see it is missing a patch configuration and will pause in boot * stage 2. * * Note: Unlike cs42l43_mcu_stage_2_3 there is no need to consider the shadow * register here as the driver will only return to boot stage 2 if the firmware * requires update which means the revision does not include shadow register * support. */ static int cs42l43_mcu_stage_3_2(struct cs42l43 *cs42l43) { … } /* * Disable the firmware running on the device such that the driver can access * the registers without fear of the MCU changing them under it. */ static int cs42l43_mcu_disable(struct cs42l43 *cs42l43) { … } /* * Callback to load firmware updates. */ static void cs42l43_mcu_load_firmware(const struct firmware *firmware, void *context) { … } static int cs42l43_mcu_is_hw_compatible(struct cs42l43 *cs42l43, unsigned int mcu_rev, unsigned int bios_rev) { … } /* * The process of updating the firmware is split into a series of steps, at the * end of each step a soft reset of the device might be required which will * require the driver to wait for the device to re-attach on the SoundWire bus, * if that control bus is being used. */ static int cs42l43_mcu_update_step(struct cs42l43 *cs42l43) { … } /* * Update the firmware running on the device. */ static int cs42l43_mcu_update(struct cs42l43 *cs42l43) { … } static int cs42l43_irq_config(struct cs42l43 *cs42l43) { … } static void cs42l43_boot_work(struct work_struct *work) { … } static int cs42l43_power_up(struct cs42l43 *cs42l43) { … } static int cs42l43_power_down(struct cs42l43 *cs42l43) { … } int cs42l43_dev_probe(struct cs42l43 *cs42l43) { … } EXPORT_SYMBOL_NS_GPL(…); void cs42l43_dev_remove(struct cs42l43 *cs42l43) { … } EXPORT_SYMBOL_NS_GPL(…); static int cs42l43_suspend(struct device *dev) { … } static int cs42l43_resume(struct device *dev) { … } static int cs42l43_runtime_suspend(struct device *dev) { … } static int cs42l43_runtime_resume(struct device *dev) { … } EXPORT_NS_GPL_DEV_PM_OPS(cs42l43_pm_ops, MFD_CS42L43) = …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_FIRMWARE(…) …;
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