linux/drivers/cxl/core/hdm.c

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
#include <linux/seq_file.h>
#include <linux/device.h>
#include <linux/delay.h>

#include "cxlmem.h"
#include "core.h"

/**
 * DOC: cxl core hdm
 *
 * Compute Express Link Host Managed Device Memory, starting with the
 * CXL 2.0 specification, is managed by an array of HDM Decoder register
 * instances per CXL port and per CXL endpoint. Define common helpers
 * for enumerating these registers and capabilities.
 */

DECLARE_RWSEM(…) …;

static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
			   int *target_map)
{ … }

/*
 * Per the CXL specification (8.2.5.12 CXL HDM Decoder Capability Structure)
 * single ported host-bridges need not publish a decoder capability when a
 * passthrough decode can be assumed, i.e. all transactions that the uport sees
 * are claimed and passed to the single dport. Disable the range until the first
 * CXL region is enumerated / activated.
 */
int devm_cxl_add_passthrough_decoder(struct cxl_port *port)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm)
{ … }

static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info)
{ … }

/**
 * devm_cxl_setup_hdm - map HDM decoder component registers
 * @port: cxl_port to map
 * @info: cached DVSEC range register info
 */
struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
				   struct cxl_endpoint_dvsec_info *info)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

static void __cxl_dpa_debug(struct seq_file *file, struct resource *r, int depth)
{ … }

void cxl_dpa_debug(struct seq_file *file, struct cxl_dev_state *cxlds)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

/*
 * Must be called in a context that synchronizes against this decoder's
 * port ->remove() callback (like an endpoint decoder sysfs attribute)
 */
static void __cxl_dpa_release(struct cxl_endpoint_decoder *cxled)
{ … }

static void cxl_dpa_release(void *cxled)
{ … }

/*
 * Must be called from context that will not race port device
 * unregistration, like decoder sysfs attribute methods
 */
static void devm_cxl_dpa_release(struct cxl_endpoint_decoder *cxled)
{ … }

static int __cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
			     resource_size_t base, resource_size_t len,
			     resource_size_t skipped)
{ … }

int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
				resource_size_t base, resource_size_t len,
				resource_size_t skipped)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled)
{ … }

resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled)
{ … }

int cxl_dpa_free(struct cxl_endpoint_decoder *cxled)
{ … }

int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
		     enum cxl_decoder_mode mode)
{ … }

int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)
{ … }

static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
{ … }

static void cxld_set_type(struct cxl_decoder *cxld, u32 *ctrl)
{ … }

static void cxlsd_set_targets(struct cxl_switch_decoder *cxlsd, u64 *tgt)
{ … }

/*
 * Per CXL 2.0 8.2.5.12.20 Committing Decoder Programming, hardware must set
 * committed or error within 10ms, but just be generous with 20ms to account for
 * clock skew and other marginal behavior
 */
#define COMMIT_TIMEOUT_MS …
static int cxld_await_commit(void __iomem *hdm, int id)
{ … }

static int cxl_decoder_commit(struct cxl_decoder *cxld)
{ … }

static int commit_reap(struct device *dev, const void *data)
{ … }

void cxl_port_commit_reap(struct cxl_decoder *cxld)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

static void cxl_decoder_reset(struct cxl_decoder *cxld)
{ … }

static int cxl_setup_hdm_decoder_from_dvsec(
	struct cxl_port *port, struct cxl_decoder *cxld, u64 *dpa_base,
	int which, struct cxl_endpoint_dvsec_info *info)
{ … }

static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
			    int *target_map, void __iomem *hdm, int which,
			    u64 *dpa_base, struct cxl_endpoint_dvsec_info *info)
{ … }

static void cxl_settle_decoders(struct cxl_hdm *cxlhdm)
{ … }

/**
 * devm_cxl_enumerate_decoders - add decoder objects per HDM register set
 * @cxlhdm: Structure to populate with HDM capabilities
 * @info: cached DVSEC range register info
 */
int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
				struct cxl_endpoint_dvsec_info *info)
{ … }
EXPORT_SYMBOL_NS_GPL(…);