/* * Instruction formats for the sequencer program downloaded to * Aic7xxx SCSI host adapters * * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * substantially similar to the "NO WARRANTY" disclaimer below * ("Disclaimer") and any redistribution must be conditioned upon * including a substantially similar Disclaimer requirement for further * binary redistribution. * 3. Neither the names of the above-listed copyright holders nor the names * of any contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Alternatively, this software may be distributed under the terms of the * GNU General Public License ("GPL") version 2 as published by the Free * Software Foundation. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGES. * * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $ * * $FreeBSD$ */ #include <asm/byteorder.h> /* 8bit ALU logic operations */ struct ins_format1 { … }; /* 8bit ALU shift/rotate operations */ struct ins_format2 { … }; /* 8bit branch control operations */ struct ins_format3 { … }; /* 16bit ALU logic operations */ struct ins_format4 { … }; /* 16bit branch control operations */ struct ins_format5 { … }; /* Far branch operations */ struct ins_format6 { … }; ins_formats; struct instruction { … }; #define AIC_OP_OR … #define AIC_OP_AND … #define AIC_OP_XOR … #define AIC_OP_ADD … #define AIC_OP_ADC … #define AIC_OP_ROL … #define AIC_OP_BMOV … #define AIC_OP_MVI16 … #define AIC_OP_JMP … #define AIC_OP_JC … #define AIC_OP_JNC … #define AIC_OP_CALL … #define AIC_OP_JNE … #define AIC_OP_JNZ … #define AIC_OP_JE … #define AIC_OP_JZ … /* Pseudo Ops */ #define AIC_OP_SHL … #define AIC_OP_SHR … #define AIC_OP_ROR … /* 16bit Ops. Low byte main opcode. High byte extended opcode. */ #define AIC_OP_OR16 … #define AIC_OP_AND16 … #define AIC_OP_XOR16 … #define AIC_OP_ADD16 … #define AIC_OP_ADC16 … #define AIC_OP_JNE16 … #define AIC_OP_JNZ16 … #define AIC_OP_JE16 … #define AIC_OP_JZ16 … #define AIC_OP_JMP16 … #define AIC_OP_JC16 … #define AIC_OP_JNC16 … #define AIC_OP_CALL16 … /* Page extension is low three bits of second opcode byte. */ #define AIC_OP_JMPF … #define AIC_OP_CALLF … #define AIC_OP_JCF … #define AIC_OP_JNCF … #define AIC_OP_CMPXCHG …
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