/* * This file is part of the Chelsio T4 Ethernet driver for Linux. * * Copyright (c) 2009-2016 Chelsio Communications, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef _T4FW_INTERFACE_H_ #define _T4FW_INTERFACE_H_ enum fw_retval { … }; #define FW_T4VF_SGE_BASE_ADDR … #define FW_T4VF_MPS_BASE_ADDR … #define FW_T4VF_PL_BASE_ADDR … #define FW_T4VF_MBDATA_BASE_ADDR … #define FW_T4VF_CIM_BASE_ADDR … enum fw_wr_opcodes { … }; struct fw_wr_hdr { … }; /* work request opcode (hi) */ #define FW_WR_OP_S … #define FW_WR_OP_M … #define FW_WR_OP_V(x) … #define FW_WR_OP_G(x) … /* atomic flag (hi) - firmware encapsulates CPLs in CPL_BARRIER */ #define FW_WR_ATOMIC_S … #define FW_WR_ATOMIC_V(x) … /* flush flag (hi) - firmware flushes flushable work request buffered * in the flow context. */ #define FW_WR_FLUSH_S … #define FW_WR_FLUSH_V(x) … /* completion flag (hi) - firmware generates a cpl_fw6_ack */ #define FW_WR_COMPL_S … #define FW_WR_COMPL_V(x) … #define FW_WR_COMPL_F … /* work request immediate data length (hi) */ #define FW_WR_IMMDLEN_S … #define FW_WR_IMMDLEN_M … #define FW_WR_IMMDLEN_V(x) … /* egress queue status update to associated ingress queue entry (lo) */ #define FW_WR_EQUIQ_S … #define FW_WR_EQUIQ_V(x) … #define FW_WR_EQUIQ_F … /* egress queue status update to egress queue status entry (lo) */ #define FW_WR_EQUEQ_S … #define FW_WR_EQUEQ_V(x) … #define FW_WR_EQUEQ_F … /* flow context identifier (lo) */ #define FW_WR_FLOWID_S … #define FW_WR_FLOWID_V(x) … /* length in units of 16-bytes (lo) */ #define FW_WR_LEN16_S … #define FW_WR_LEN16_V(x) … #define HW_TPL_FR_MT_PR_IV_P_FC … #define HW_TPL_FR_MT_PR_OV_P_FC … /* filter wr reply code in cookie in CPL_SET_TCB_RPL */ enum fw_filter_wr_cookie { … }; struct fw_filter_wr { … }; struct fw_filter2_wr { … }; #define FW_FILTER_WR_TID_S … #define FW_FILTER_WR_TID_M … #define FW_FILTER_WR_TID_V(x) … #define FW_FILTER_WR_TID_G(x) … #define FW_FILTER_WR_RQTYPE_S … #define FW_FILTER_WR_RQTYPE_M … #define FW_FILTER_WR_RQTYPE_V(x) … #define FW_FILTER_WR_RQTYPE_G(x) … #define FW_FILTER_WR_RQTYPE_F … #define FW_FILTER_WR_NOREPLY_S … #define FW_FILTER_WR_NOREPLY_M … #define FW_FILTER_WR_NOREPLY_V(x) … #define FW_FILTER_WR_NOREPLY_G(x) … #define FW_FILTER_WR_NOREPLY_F … #define FW_FILTER_WR_IQ_S … #define FW_FILTER_WR_IQ_M … #define FW_FILTER_WR_IQ_V(x) … #define FW_FILTER_WR_IQ_G(x) … #define FW_FILTER_WR_DEL_FILTER_S … #define FW_FILTER_WR_DEL_FILTER_M … #define FW_FILTER_WR_DEL_FILTER_V(x) … #define FW_FILTER_WR_DEL_FILTER_G(x) … #define FW_FILTER_WR_DEL_FILTER_F … #define FW_FILTER_WR_RPTTID_S … #define FW_FILTER_WR_RPTTID_M … #define FW_FILTER_WR_RPTTID_V(x) … #define FW_FILTER_WR_RPTTID_G(x) … #define FW_FILTER_WR_RPTTID_F … #define FW_FILTER_WR_DROP_S … #define FW_FILTER_WR_DROP_M … #define FW_FILTER_WR_DROP_V(x) … #define FW_FILTER_WR_DROP_G(x) … #define FW_FILTER_WR_DROP_F … #define FW_FILTER_WR_DIRSTEER_S … #define FW_FILTER_WR_DIRSTEER_M … #define FW_FILTER_WR_DIRSTEER_V(x) … #define FW_FILTER_WR_DIRSTEER_G(x) … #define FW_FILTER_WR_DIRSTEER_F … #define FW_FILTER_WR_MASKHASH_S … #define FW_FILTER_WR_MASKHASH_M … #define FW_FILTER_WR_MASKHASH_V(x) … #define FW_FILTER_WR_MASKHASH_G(x) … #define FW_FILTER_WR_MASKHASH_F … #define FW_FILTER_WR_DIRSTEERHASH_S … #define FW_FILTER_WR_DIRSTEERHASH_M … #define FW_FILTER_WR_DIRSTEERHASH_V(x) … #define FW_FILTER_WR_DIRSTEERHASH_G(x) … #define FW_FILTER_WR_DIRSTEERHASH_F … #define FW_FILTER_WR_LPBK_S … #define FW_FILTER_WR_LPBK_M … #define FW_FILTER_WR_LPBK_V(x) … #define FW_FILTER_WR_LPBK_G(x) … #define FW_FILTER_WR_LPBK_F … #define FW_FILTER_WR_DMAC_S … #define FW_FILTER_WR_DMAC_M … #define FW_FILTER_WR_DMAC_V(x) … #define FW_FILTER_WR_DMAC_G(x) … #define FW_FILTER_WR_DMAC_F … #define FW_FILTER_WR_SMAC_S … #define FW_FILTER_WR_SMAC_M … #define FW_FILTER_WR_SMAC_V(x) … #define FW_FILTER_WR_SMAC_G(x) … #define FW_FILTER_WR_SMAC_F … #define FW_FILTER_WR_INSVLAN_S … #define FW_FILTER_WR_INSVLAN_M … #define FW_FILTER_WR_INSVLAN_V(x) … #define FW_FILTER_WR_INSVLAN_G(x) … #define FW_FILTER_WR_INSVLAN_F … #define FW_FILTER_WR_RMVLAN_S … #define FW_FILTER_WR_RMVLAN_M … #define FW_FILTER_WR_RMVLAN_V(x) … #define FW_FILTER_WR_RMVLAN_G(x) … #define FW_FILTER_WR_RMVLAN_F … #define FW_FILTER_WR_HITCNTS_S … #define FW_FILTER_WR_HITCNTS_M … #define FW_FILTER_WR_HITCNTS_V(x) … #define FW_FILTER_WR_HITCNTS_G(x) … #define FW_FILTER_WR_HITCNTS_F … #define FW_FILTER_WR_TXCHAN_S … #define FW_FILTER_WR_TXCHAN_M … #define FW_FILTER_WR_TXCHAN_V(x) … #define FW_FILTER_WR_TXCHAN_G(x) … #define FW_FILTER_WR_PRIO_S … #define FW_FILTER_WR_PRIO_M … #define FW_FILTER_WR_PRIO_V(x) … #define FW_FILTER_WR_PRIO_G(x) … #define FW_FILTER_WR_PRIO_F … #define FW_FILTER_WR_L2TIX_S … #define FW_FILTER_WR_L2TIX_M … #define FW_FILTER_WR_L2TIX_V(x) … #define FW_FILTER_WR_L2TIX_G(x) … #define FW_FILTER_WR_FRAG_S … #define FW_FILTER_WR_FRAG_M … #define FW_FILTER_WR_FRAG_V(x) … #define FW_FILTER_WR_FRAG_G(x) … #define FW_FILTER_WR_FRAG_F … #define FW_FILTER_WR_FRAGM_S … #define FW_FILTER_WR_FRAGM_M … #define FW_FILTER_WR_FRAGM_V(x) … #define FW_FILTER_WR_FRAGM_G(x) … #define FW_FILTER_WR_FRAGM_F … #define FW_FILTER_WR_IVLAN_VLD_S … #define FW_FILTER_WR_IVLAN_VLD_M … #define FW_FILTER_WR_IVLAN_VLD_V(x) … #define FW_FILTER_WR_IVLAN_VLD_G(x) … #define FW_FILTER_WR_IVLAN_VLD_F … #define FW_FILTER_WR_OVLAN_VLD_S … #define FW_FILTER_WR_OVLAN_VLD_M … #define FW_FILTER_WR_OVLAN_VLD_V(x) … #define FW_FILTER_WR_OVLAN_VLD_G(x) … #define FW_FILTER_WR_OVLAN_VLD_F … #define FW_FILTER_WR_IVLAN_VLDM_S … #define FW_FILTER_WR_IVLAN_VLDM_M … #define FW_FILTER_WR_IVLAN_VLDM_V(x) … #define FW_FILTER_WR_IVLAN_VLDM_G(x) … #define FW_FILTER_WR_IVLAN_VLDM_F … #define FW_FILTER_WR_OVLAN_VLDM_S … #define FW_FILTER_WR_OVLAN_VLDM_M … #define FW_FILTER_WR_OVLAN_VLDM_V(x) … #define FW_FILTER_WR_OVLAN_VLDM_G(x) … #define FW_FILTER_WR_OVLAN_VLDM_F … #define FW_FILTER_WR_RX_CHAN_S … #define FW_FILTER_WR_RX_CHAN_M … #define FW_FILTER_WR_RX_CHAN_V(x) … #define FW_FILTER_WR_RX_CHAN_G(x) … #define FW_FILTER_WR_RX_CHAN_F … #define FW_FILTER_WR_RX_RPL_IQ_S … #define FW_FILTER_WR_RX_RPL_IQ_M … #define FW_FILTER_WR_RX_RPL_IQ_V(x) … #define FW_FILTER_WR_RX_RPL_IQ_G(x) … #define FW_FILTER2_WR_FILTER_TYPE_S … #define FW_FILTER2_WR_FILTER_TYPE_M … #define FW_FILTER2_WR_FILTER_TYPE_V(x) … #define FW_FILTER2_WR_FILTER_TYPE_G(x) … #define FW_FILTER2_WR_FILTER_TYPE_F … #define FW_FILTER2_WR_NATMODE_S … #define FW_FILTER2_WR_NATMODE_M … #define FW_FILTER2_WR_NATMODE_V(x) … #define FW_FILTER2_WR_NATMODE_G(x) … #define FW_FILTER2_WR_NATFLAGCHECK_S … #define FW_FILTER2_WR_NATFLAGCHECK_M … #define FW_FILTER2_WR_NATFLAGCHECK_V(x) … #define FW_FILTER2_WR_NATFLAGCHECK_G(x) … #define FW_FILTER2_WR_NATFLAGCHECK_F … #define FW_FILTER2_WR_ULP_TYPE_S … #define FW_FILTER2_WR_ULP_TYPE_M … #define FW_FILTER2_WR_ULP_TYPE_V(x) … #define FW_FILTER2_WR_ULP_TYPE_G(x) … #define FW_FILTER_WR_MACI_S … #define FW_FILTER_WR_MACI_M … #define FW_FILTER_WR_MACI_V(x) … #define FW_FILTER_WR_MACI_G(x) … #define FW_FILTER_WR_MACIM_S … #define FW_FILTER_WR_MACIM_M … #define FW_FILTER_WR_MACIM_V(x) … #define FW_FILTER_WR_MACIM_G(x) … #define FW_FILTER_WR_FCOE_S … #define FW_FILTER_WR_FCOE_M … #define FW_FILTER_WR_FCOE_V(x) … #define FW_FILTER_WR_FCOE_G(x) … #define FW_FILTER_WR_FCOE_F … #define FW_FILTER_WR_FCOEM_S … #define FW_FILTER_WR_FCOEM_M … #define FW_FILTER_WR_FCOEM_V(x) … #define FW_FILTER_WR_FCOEM_G(x) … #define FW_FILTER_WR_FCOEM_F … #define FW_FILTER_WR_PORT_S … #define FW_FILTER_WR_PORT_M … #define FW_FILTER_WR_PORT_V(x) … #define FW_FILTER_WR_PORT_G(x) … #define FW_FILTER_WR_PORTM_S … #define FW_FILTER_WR_PORTM_M … #define FW_FILTER_WR_PORTM_V(x) … #define FW_FILTER_WR_PORTM_G(x) … #define FW_FILTER_WR_MATCHTYPE_S … #define FW_FILTER_WR_MATCHTYPE_M … #define FW_FILTER_WR_MATCHTYPE_V(x) … #define FW_FILTER_WR_MATCHTYPE_G(x) … #define FW_FILTER_WR_MATCHTYPEM_S … #define FW_FILTER_WR_MATCHTYPEM_M … #define FW_FILTER_WR_MATCHTYPEM_V(x) … #define FW_FILTER_WR_MATCHTYPEM_G(x) … struct fw_ulptx_wr { … }; #define FW_ULPTX_WR_DATA_S … #define FW_ULPTX_WR_DATA_M … #define FW_ULPTX_WR_DATA_V(x) … #define FW_ULPTX_WR_DATA_G(x) … #define FW_ULPTX_WR_DATA_F … struct fw_tp_wr { … }; struct fw_eth_tx_pkt_wr { … }; enum fw_eth_tx_eo_type { … }; struct fw_eth_tx_eo_wr { … }; #define FW_ETH_TX_EO_WR_IMMDLEN_S … #define FW_ETH_TX_EO_WR_IMMDLEN_M … #define FW_ETH_TX_EO_WR_IMMDLEN_V(x) … #define FW_ETH_TX_EO_WR_IMMDLEN_G(x) … struct fw_ofld_connection_wr { … }; #define FW_OFLD_CONNECTION_WR_VERSION_S … #define FW_OFLD_CONNECTION_WR_VERSION_M … #define FW_OFLD_CONNECTION_WR_VERSION_V(x) … #define FW_OFLD_CONNECTION_WR_VERSION_G(x) … #define FW_OFLD_CONNECTION_WR_VERSION_F … #define FW_OFLD_CONNECTION_WR_CPL_S … #define FW_OFLD_CONNECTION_WR_CPL_M … #define FW_OFLD_CONNECTION_WR_CPL_V(x) … #define FW_OFLD_CONNECTION_WR_CPL_G(x) … #define FW_OFLD_CONNECTION_WR_CPL_F … #define FW_OFLD_CONNECTION_WR_T_STATE_S … #define FW_OFLD_CONNECTION_WR_T_STATE_M … #define FW_OFLD_CONNECTION_WR_T_STATE_V(x) … #define FW_OFLD_CONNECTION_WR_T_STATE_G(x) … #define FW_OFLD_CONNECTION_WR_RCV_SCALE_S … #define FW_OFLD_CONNECTION_WR_RCV_SCALE_M … #define FW_OFLD_CONNECTION_WR_RCV_SCALE_V(x) … #define FW_OFLD_CONNECTION_WR_RCV_SCALE_G(x) … #define FW_OFLD_CONNECTION_WR_ASTID_S … #define FW_OFLD_CONNECTION_WR_ASTID_M … #define FW_OFLD_CONNECTION_WR_ASTID_V(x) … #define FW_OFLD_CONNECTION_WR_ASTID_G(x) … #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_S … #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_M … #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_V(x) … #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_G(x) … #define FW_OFLD_CONNECTION_WR_CPLRXDATAACK_F … #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_S … #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_M … #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_V(x) … #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_G(x) … #define FW_OFLD_CONNECTION_WR_CPLPASSACCEPTRPL_F … enum fw_flowc_mnem_tcpstate { … }; enum fw_flowc_mnem_eostate { … }; enum fw_flowc_mnem { … }; struct fw_flowc_mnemval { … }; struct fw_flowc_wr { … }; #define FW_FLOWC_WR_NPARAMS_S … #define FW_FLOWC_WR_NPARAMS_V(x) … struct fw_ofld_tx_data_wr { … }; #define FW_OFLD_TX_DATA_WR_ALIGNPLD_S … #define FW_OFLD_TX_DATA_WR_ALIGNPLD_V(x) … #define FW_OFLD_TX_DATA_WR_ALIGNPLD_F … #define FW_OFLD_TX_DATA_WR_SHOVE_S … #define FW_OFLD_TX_DATA_WR_SHOVE_V(x) … #define FW_OFLD_TX_DATA_WR_SHOVE_F … #define FW_OFLD_TX_DATA_WR_TUNNEL_S … #define FW_OFLD_TX_DATA_WR_TUNNEL_V(x) … #define FW_OFLD_TX_DATA_WR_SAVE_S … #define FW_OFLD_TX_DATA_WR_SAVE_V(x) … #define FW_OFLD_TX_DATA_WR_FLUSH_S … #define FW_OFLD_TX_DATA_WR_FLUSH_V(x) … #define FW_OFLD_TX_DATA_WR_FLUSH_F … #define FW_OFLD_TX_DATA_WR_URGENT_S … #define FW_OFLD_TX_DATA_WR_URGENT_V(x) … #define FW_OFLD_TX_DATA_WR_MORE_S … #define FW_OFLD_TX_DATA_WR_MORE_V(x) … #define FW_OFLD_TX_DATA_WR_ULPMODE_S … #define FW_OFLD_TX_DATA_WR_ULPMODE_V(x) … #define FW_OFLD_TX_DATA_WR_ULPSUBMODE_S … #define FW_OFLD_TX_DATA_WR_ULPSUBMODE_V(x) … struct fw_cmd_wr { … }; #define FW_CMD_WR_DMA_S … #define FW_CMD_WR_DMA_V(x) … struct fw_eth_tx_pkt_vm_wr { … }; #define FW_CMD_MAX_TIMEOUT … /* * If a host driver does a HELLO and discovers that there's already a MASTER * selected, we may have to wait for that MASTER to finish issuing RESET, * configuration and INITIALIZE commands. Also, there's a possibility that * our own HELLO may get lost if it happens right as the MASTER is issuign a * RESET command, so we need to be willing to make a few retries of our HELLO. */ #define FW_CMD_HELLO_TIMEOUT … #define FW_CMD_HELLO_RETRIES … enum fw_cmd_opcodes { … }; enum fw_cmd_cap { … }; /* * Generic command header flit0 */ struct fw_cmd_hdr { … }; #define FW_CMD_OP_S … #define FW_CMD_OP_M … #define FW_CMD_OP_V(x) … #define FW_CMD_OP_G(x) … #define FW_CMD_REQUEST_S … #define FW_CMD_REQUEST_V(x) … #define FW_CMD_REQUEST_F … #define FW_CMD_READ_S … #define FW_CMD_READ_V(x) … #define FW_CMD_READ_F … #define FW_CMD_WRITE_S … #define FW_CMD_WRITE_V(x) … #define FW_CMD_WRITE_F … #define FW_CMD_EXEC_S … #define FW_CMD_EXEC_V(x) … #define FW_CMD_EXEC_F … #define FW_CMD_RAMASK_S … #define FW_CMD_RAMASK_V(x) … #define FW_CMD_RETVAL_S … #define FW_CMD_RETVAL_M … #define FW_CMD_RETVAL_V(x) … #define FW_CMD_RETVAL_G(x) … #define FW_CMD_LEN16_S … #define FW_CMD_LEN16_V(x) … #define FW_LEN16(fw_struct) … enum fw_ldst_addrspc { … }; enum fw_ldst_mps_fid { … }; enum fw_ldst_func_access_ctl { … }; enum fw_ldst_func_mod_index { … }; struct fw_ldst_cmd { … }; #define FW_LDST_CMD_ADDRSPACE_S … #define FW_LDST_CMD_ADDRSPACE_V(x) … #define FW_LDST_CMD_MSG_S … #define FW_LDST_CMD_MSG_V(x) … #define FW_LDST_CMD_CTXTFLUSH_S … #define FW_LDST_CMD_CTXTFLUSH_V(x) … #define FW_LDST_CMD_CTXTFLUSH_F … #define FW_LDST_CMD_PADDR_S … #define FW_LDST_CMD_PADDR_V(x) … #define FW_LDST_CMD_MMD_S … #define FW_LDST_CMD_MMD_V(x) … #define FW_LDST_CMD_FID_S … #define FW_LDST_CMD_FID_V(x) … #define FW_LDST_CMD_IDX_S … #define FW_LDST_CMD_IDX_V(x) … #define FW_LDST_CMD_RPLCPF_S … #define FW_LDST_CMD_RPLCPF_V(x) … #define FW_LDST_CMD_LC_S … #define FW_LDST_CMD_LC_V(x) … #define FW_LDST_CMD_LC_F … #define FW_LDST_CMD_FN_S … #define FW_LDST_CMD_FN_V(x) … #define FW_LDST_CMD_NACCESS_S … #define FW_LDST_CMD_NACCESS_V(x) … struct fw_reset_cmd { … }; #define FW_RESET_CMD_HALT_S … #define FW_RESET_CMD_HALT_M … #define FW_RESET_CMD_HALT_V(x) … #define FW_RESET_CMD_HALT_G(x) … #define FW_RESET_CMD_HALT_F … enum fw_hellow_cmd { … }; struct fw_hello_cmd { … }; #define FW_HELLO_CMD_ERR_S … #define FW_HELLO_CMD_ERR_V(x) … #define FW_HELLO_CMD_ERR_F … #define FW_HELLO_CMD_INIT_S … #define FW_HELLO_CMD_INIT_V(x) … #define FW_HELLO_CMD_INIT_F … #define FW_HELLO_CMD_MASTERDIS_S … #define FW_HELLO_CMD_MASTERDIS_V(x) … #define FW_HELLO_CMD_MASTERFORCE_S … #define FW_HELLO_CMD_MASTERFORCE_V(x) … #define FW_HELLO_CMD_MBMASTER_S … #define FW_HELLO_CMD_MBMASTER_M … #define FW_HELLO_CMD_MBMASTER_V(x) … #define FW_HELLO_CMD_MBMASTER_G(x) … #define FW_HELLO_CMD_MBASYNCNOTINT_S … #define FW_HELLO_CMD_MBASYNCNOTINT_V(x) … #define FW_HELLO_CMD_MBASYNCNOT_S … #define FW_HELLO_CMD_MBASYNCNOT_V(x) … #define FW_HELLO_CMD_STAGE_S … #define FW_HELLO_CMD_STAGE_V(x) … #define FW_HELLO_CMD_CLEARINIT_S … #define FW_HELLO_CMD_CLEARINIT_V(x) … #define FW_HELLO_CMD_CLEARINIT_F … struct fw_bye_cmd { … }; struct fw_initialize_cmd { … }; enum fw_caps_config_hm { … }; enum fw_caps_config_nbm { … }; enum fw_caps_config_link { … }; enum fw_caps_config_switch { … }; enum fw_caps_config_nic { … }; enum fw_caps_config_ofld { … }; enum fw_caps_config_rdma { … }; enum fw_caps_config_iscsi { … }; enum fw_caps_config_crypto { … }; enum fw_caps_config_fcoe { … }; enum fw_memtype_cf { … }; struct fw_caps_config_cmd { … }; #define FW_CAPS_CONFIG_CMD_CFVALID_S … #define FW_CAPS_CONFIG_CMD_CFVALID_V(x) … #define FW_CAPS_CONFIG_CMD_CFVALID_F … #define FW_CAPS_CONFIG_CMD_MEMTYPE_CF_S … #define FW_CAPS_CONFIG_CMD_MEMTYPE_CF_V(x) … #define FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_S … #define FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_V(x) … /* * params command mnemonics */ enum fw_params_mnem { … }; /* * device parameters */ #define FW_PARAMS_PARAM_FILTER_MODE_S … #define FW_PARAMS_PARAM_FILTER_MODE_M … #define FW_PARAMS_PARAM_FILTER_MODE_V(x) … #define FW_PARAMS_PARAM_FILTER_MODE_G(x) … #define FW_PARAMS_PARAM_FILTER_MASK_S … #define FW_PARAMS_PARAM_FILTER_MASK_M … #define FW_PARAMS_PARAM_FILTER_MASK_V(x) … #define FW_PARAMS_PARAM_FILTER_MASK_G(x) … enum fw_params_param_dev { … }; /* * physical and virtual function parameters */ enum fw_params_param_pfvf { … }; /* Virtual link state as seen by the specified VF */ enum vf_link_states { … }; /* * dma queue parameters */ enum fw_params_param_dmaq { … }; enum fw_params_param_dev_ktls_hw { … }; enum fw_params_param_dev_phyfw { … }; enum fw_params_param_dev_diag { … }; enum fw_params_param_dev_filter { … }; enum fw_params_param_dev_fwcache { … }; #define FW_PARAMS_MNEM_S … #define FW_PARAMS_MNEM_V(x) … #define FW_PARAMS_PARAM_X_S … #define FW_PARAMS_PARAM_X_V(x) … #define FW_PARAMS_PARAM_Y_S … #define FW_PARAMS_PARAM_Y_M … #define FW_PARAMS_PARAM_Y_V(x) … #define FW_PARAMS_PARAM_Y_G(x) … #define FW_PARAMS_PARAM_Z_S … #define FW_PARAMS_PARAM_Z_M … #define FW_PARAMS_PARAM_Z_V(x) … #define FW_PARAMS_PARAM_Z_G(x) … #define FW_PARAMS_PARAM_XYZ_S … #define FW_PARAMS_PARAM_XYZ_V(x) … #define FW_PARAMS_PARAM_YZ_S … #define FW_PARAMS_PARAM_YZ_V(x) … struct fw_params_cmd { … }; #define FW_PARAMS_CMD_PFN_S … #define FW_PARAMS_CMD_PFN_V(x) … #define FW_PARAMS_CMD_VFN_S … #define FW_PARAMS_CMD_VFN_V(x) … struct fw_pfvf_cmd { … }; #define FW_PFVF_CMD_PFN_S … #define FW_PFVF_CMD_PFN_V(x) … #define FW_PFVF_CMD_VFN_S … #define FW_PFVF_CMD_VFN_V(x) … #define FW_PFVF_CMD_NIQFLINT_S … #define FW_PFVF_CMD_NIQFLINT_M … #define FW_PFVF_CMD_NIQFLINT_V(x) … #define FW_PFVF_CMD_NIQFLINT_G(x) … #define FW_PFVF_CMD_NIQ_S … #define FW_PFVF_CMD_NIQ_M … #define FW_PFVF_CMD_NIQ_V(x) … #define FW_PFVF_CMD_NIQ_G(x) … #define FW_PFVF_CMD_TYPE_S … #define FW_PFVF_CMD_TYPE_M … #define FW_PFVF_CMD_TYPE_V(x) … #define FW_PFVF_CMD_TYPE_G(x) … #define FW_PFVF_CMD_TYPE_F … #define FW_PFVF_CMD_CMASK_S … #define FW_PFVF_CMD_CMASK_M … #define FW_PFVF_CMD_CMASK_V(x) … #define FW_PFVF_CMD_CMASK_G(x) … #define FW_PFVF_CMD_PMASK_S … #define FW_PFVF_CMD_PMASK_M … #define FW_PFVF_CMD_PMASK_V(x) … #define FW_PFVF_CMD_PMASK_G(x) … #define FW_PFVF_CMD_NEQ_S … #define FW_PFVF_CMD_NEQ_M … #define FW_PFVF_CMD_NEQ_V(x) … #define FW_PFVF_CMD_NEQ_G(x) … #define FW_PFVF_CMD_TC_S … #define FW_PFVF_CMD_TC_M … #define FW_PFVF_CMD_TC_V(x) … #define FW_PFVF_CMD_TC_G(x) … #define FW_PFVF_CMD_NVI_S … #define FW_PFVF_CMD_NVI_M … #define FW_PFVF_CMD_NVI_V(x) … #define FW_PFVF_CMD_NVI_G(x) … #define FW_PFVF_CMD_NEXACTF_S … #define FW_PFVF_CMD_NEXACTF_M … #define FW_PFVF_CMD_NEXACTF_V(x) … #define FW_PFVF_CMD_NEXACTF_G(x) … #define FW_PFVF_CMD_R_CAPS_S … #define FW_PFVF_CMD_R_CAPS_M … #define FW_PFVF_CMD_R_CAPS_V(x) … #define FW_PFVF_CMD_R_CAPS_G(x) … #define FW_PFVF_CMD_WX_CAPS_S … #define FW_PFVF_CMD_WX_CAPS_M … #define FW_PFVF_CMD_WX_CAPS_V(x) … #define FW_PFVF_CMD_WX_CAPS_G(x) … #define FW_PFVF_CMD_NETHCTRL_S … #define FW_PFVF_CMD_NETHCTRL_M … #define FW_PFVF_CMD_NETHCTRL_V(x) … #define FW_PFVF_CMD_NETHCTRL_G(x) … enum fw_iq_type { … }; enum fw_iq_iqtype { … }; struct fw_iq_cmd { … }; #define FW_IQ_CMD_PFN_S … #define FW_IQ_CMD_PFN_V(x) … #define FW_IQ_CMD_VFN_S … #define FW_IQ_CMD_VFN_V(x) … #define FW_IQ_CMD_ALLOC_S … #define FW_IQ_CMD_ALLOC_V(x) … #define FW_IQ_CMD_ALLOC_F … #define FW_IQ_CMD_FREE_S … #define FW_IQ_CMD_FREE_V(x) … #define FW_IQ_CMD_FREE_F … #define FW_IQ_CMD_MODIFY_S … #define FW_IQ_CMD_MODIFY_V(x) … #define FW_IQ_CMD_MODIFY_F … #define FW_IQ_CMD_IQSTART_S … #define FW_IQ_CMD_IQSTART_V(x) … #define FW_IQ_CMD_IQSTART_F … #define FW_IQ_CMD_IQSTOP_S … #define FW_IQ_CMD_IQSTOP_V(x) … #define FW_IQ_CMD_IQSTOP_F … #define FW_IQ_CMD_TYPE_S … #define FW_IQ_CMD_TYPE_V(x) … #define FW_IQ_CMD_IQASYNCH_S … #define FW_IQ_CMD_IQASYNCH_V(x) … #define FW_IQ_CMD_VIID_S … #define FW_IQ_CMD_VIID_V(x) … #define FW_IQ_CMD_IQANDST_S … #define FW_IQ_CMD_IQANDST_V(x) … #define FW_IQ_CMD_IQANUS_S … #define FW_IQ_CMD_IQANUS_V(x) … #define FW_IQ_CMD_IQANUD_S … #define FW_IQ_CMD_IQANUD_V(x) … #define FW_IQ_CMD_IQANDSTINDEX_S … #define FW_IQ_CMD_IQANDSTINDEX_V(x) … #define FW_IQ_CMD_IQDROPRSS_S … #define FW_IQ_CMD_IQDROPRSS_V(x) … #define FW_IQ_CMD_IQDROPRSS_F … #define FW_IQ_CMD_IQGTSMODE_S … #define FW_IQ_CMD_IQGTSMODE_V(x) … #define FW_IQ_CMD_IQGTSMODE_F … #define FW_IQ_CMD_IQPCIECH_S … #define FW_IQ_CMD_IQPCIECH_V(x) … #define FW_IQ_CMD_IQDCAEN_S … #define FW_IQ_CMD_IQDCAEN_V(x) … #define FW_IQ_CMD_IQDCACPU_S … #define FW_IQ_CMD_IQDCACPU_V(x) … #define FW_IQ_CMD_IQINTCNTTHRESH_S … #define FW_IQ_CMD_IQINTCNTTHRESH_V(x) … #define FW_IQ_CMD_IQO_S … #define FW_IQ_CMD_IQO_V(x) … #define FW_IQ_CMD_IQO_F … #define FW_IQ_CMD_IQCPRIO_S … #define FW_IQ_CMD_IQCPRIO_V(x) … #define FW_IQ_CMD_IQESIZE_S … #define FW_IQ_CMD_IQESIZE_V(x) … #define FW_IQ_CMD_IQNS_S … #define FW_IQ_CMD_IQNS_V(x) … #define FW_IQ_CMD_IQRO_S … #define FW_IQ_CMD_IQRO_V(x) … #define FW_IQ_CMD_IQFLINTIQHSEN_S … #define FW_IQ_CMD_IQFLINTIQHSEN_V(x) … #define FW_IQ_CMD_IQFLINTCONGEN_S … #define FW_IQ_CMD_IQFLINTCONGEN_V(x) … #define FW_IQ_CMD_IQFLINTCONGEN_F … #define FW_IQ_CMD_IQFLINTISCSIC_S … #define FW_IQ_CMD_IQFLINTISCSIC_V(x) … #define FW_IQ_CMD_IQTYPE_S … #define FW_IQ_CMD_IQTYPE_M … #define FW_IQ_CMD_IQTYPE_V(x) … #define FW_IQ_CMD_IQTYPE_G(x) … #define FW_IQ_CMD_FL0CNGCHMAP_S … #define FW_IQ_CMD_FL0CNGCHMAP_V(x) … #define FW_IQ_CMD_FL0CACHELOCK_S … #define FW_IQ_CMD_FL0CACHELOCK_V(x) … #define FW_IQ_CMD_FL0DBP_S … #define FW_IQ_CMD_FL0DBP_V(x) … #define FW_IQ_CMD_FL0DATANS_S … #define FW_IQ_CMD_FL0DATANS_V(x) … #define FW_IQ_CMD_FL0DATARO_S … #define FW_IQ_CMD_FL0DATARO_V(x) … #define FW_IQ_CMD_FL0DATARO_F … #define FW_IQ_CMD_FL0CONGCIF_S … #define FW_IQ_CMD_FL0CONGCIF_V(x) … #define FW_IQ_CMD_FL0CONGCIF_F … #define FW_IQ_CMD_FL0ONCHIP_S … #define FW_IQ_CMD_FL0ONCHIP_V(x) … #define FW_IQ_CMD_FL0STATUSPGNS_S … #define FW_IQ_CMD_FL0STATUSPGNS_V(x) … #define FW_IQ_CMD_FL0STATUSPGRO_S … #define FW_IQ_CMD_FL0STATUSPGRO_V(x) … #define FW_IQ_CMD_FL0FETCHNS_S … #define FW_IQ_CMD_FL0FETCHNS_V(x) … #define FW_IQ_CMD_FL0FETCHRO_S … #define FW_IQ_CMD_FL0FETCHRO_V(x) … #define FW_IQ_CMD_FL0FETCHRO_F … #define FW_IQ_CMD_FL0HOSTFCMODE_S … #define FW_IQ_CMD_FL0HOSTFCMODE_V(x) … #define FW_IQ_CMD_FL0CPRIO_S … #define FW_IQ_CMD_FL0CPRIO_V(x) … #define FW_IQ_CMD_FL0PADEN_S … #define FW_IQ_CMD_FL0PADEN_V(x) … #define FW_IQ_CMD_FL0PADEN_F … #define FW_IQ_CMD_FL0PACKEN_S … #define FW_IQ_CMD_FL0PACKEN_V(x) … #define FW_IQ_CMD_FL0PACKEN_F … #define FW_IQ_CMD_FL0CONGEN_S … #define FW_IQ_CMD_FL0CONGEN_V(x) … #define FW_IQ_CMD_FL0CONGEN_F … #define FW_IQ_CMD_FL0DCAEN_S … #define FW_IQ_CMD_FL0DCAEN_V(x) … #define FW_IQ_CMD_FL0DCACPU_S … #define FW_IQ_CMD_FL0DCACPU_V(x) … #define FW_IQ_CMD_FL0FBMIN_S … #define FW_IQ_CMD_FL0FBMIN_V(x) … #define FW_IQ_CMD_FL0FBMAX_S … #define FW_IQ_CMD_FL0FBMAX_V(x) … #define FW_IQ_CMD_FL0CIDXFTHRESHO_S … #define FW_IQ_CMD_FL0CIDXFTHRESHO_V(x) … #define FW_IQ_CMD_FL0CIDXFTHRESHO_F … #define FW_IQ_CMD_FL0CIDXFTHRESH_S … #define FW_IQ_CMD_FL0CIDXFTHRESH_V(x) … #define FW_IQ_CMD_FL1CNGCHMAP_S … #define FW_IQ_CMD_FL1CNGCHMAP_V(x) … #define FW_IQ_CMD_FL1CACHELOCK_S … #define FW_IQ_CMD_FL1CACHELOCK_V(x) … #define FW_IQ_CMD_FL1DBP_S … #define FW_IQ_CMD_FL1DBP_V(x) … #define FW_IQ_CMD_FL1DATANS_S … #define FW_IQ_CMD_FL1DATANS_V(x) … #define FW_IQ_CMD_FL1DATARO_S … #define FW_IQ_CMD_FL1DATARO_V(x) … #define FW_IQ_CMD_FL1CONGCIF_S … #define FW_IQ_CMD_FL1CONGCIF_V(x) … #define FW_IQ_CMD_FL1ONCHIP_S … #define FW_IQ_CMD_FL1ONCHIP_V(x) … #define FW_IQ_CMD_FL1STATUSPGNS_S … #define FW_IQ_CMD_FL1STATUSPGNS_V(x) … #define FW_IQ_CMD_FL1STATUSPGRO_S … #define FW_IQ_CMD_FL1STATUSPGRO_V(x) … #define FW_IQ_CMD_FL1FETCHNS_S … #define FW_IQ_CMD_FL1FETCHNS_V(x) … #define FW_IQ_CMD_FL1FETCHRO_S … #define FW_IQ_CMD_FL1FETCHRO_V(x) … #define FW_IQ_CMD_FL1HOSTFCMODE_S … #define FW_IQ_CMD_FL1HOSTFCMODE_V(x) … #define FW_IQ_CMD_FL1CPRIO_S … #define FW_IQ_CMD_FL1CPRIO_V(x) … #define FW_IQ_CMD_FL1PADEN_S … #define FW_IQ_CMD_FL1PADEN_V(x) … #define FW_IQ_CMD_FL1PADEN_F … #define FW_IQ_CMD_FL1PACKEN_S … #define FW_IQ_CMD_FL1PACKEN_V(x) … #define FW_IQ_CMD_FL1PACKEN_F … #define FW_IQ_CMD_FL1CONGEN_S … #define FW_IQ_CMD_FL1CONGEN_V(x) … #define FW_IQ_CMD_FL1CONGEN_F … #define FW_IQ_CMD_FL1DCAEN_S … #define FW_IQ_CMD_FL1DCAEN_V(x) … #define FW_IQ_CMD_FL1DCACPU_S … #define FW_IQ_CMD_FL1DCACPU_V(x) … #define FW_IQ_CMD_FL1FBMIN_S … #define FW_IQ_CMD_FL1FBMIN_V(x) … #define FW_IQ_CMD_FL1FBMAX_S … #define FW_IQ_CMD_FL1FBMAX_V(x) … #define FW_IQ_CMD_FL1CIDXFTHRESHO_S … #define FW_IQ_CMD_FL1CIDXFTHRESHO_V(x) … #define FW_IQ_CMD_FL1CIDXFTHRESHO_F … #define FW_IQ_CMD_FL1CIDXFTHRESH_S … #define FW_IQ_CMD_FL1CIDXFTHRESH_V(x) … struct fw_eq_eth_cmd { … }; #define FW_EQ_ETH_CMD_PFN_S … #define FW_EQ_ETH_CMD_PFN_V(x) … #define FW_EQ_ETH_CMD_VFN_S … #define FW_EQ_ETH_CMD_VFN_V(x) … #define FW_EQ_ETH_CMD_ALLOC_S … #define FW_EQ_ETH_CMD_ALLOC_V(x) … #define FW_EQ_ETH_CMD_ALLOC_F … #define FW_EQ_ETH_CMD_FREE_S … #define FW_EQ_ETH_CMD_FREE_V(x) … #define FW_EQ_ETH_CMD_FREE_F … #define FW_EQ_ETH_CMD_MODIFY_S … #define FW_EQ_ETH_CMD_MODIFY_V(x) … #define FW_EQ_ETH_CMD_MODIFY_F … #define FW_EQ_ETH_CMD_EQSTART_S … #define FW_EQ_ETH_CMD_EQSTART_V(x) … #define FW_EQ_ETH_CMD_EQSTART_F … #define FW_EQ_ETH_CMD_EQSTOP_S … #define FW_EQ_ETH_CMD_EQSTOP_V(x) … #define FW_EQ_ETH_CMD_EQSTOP_F … #define FW_EQ_ETH_CMD_EQID_S … #define FW_EQ_ETH_CMD_EQID_M … #define FW_EQ_ETH_CMD_EQID_V(x) … #define FW_EQ_ETH_CMD_EQID_G(x) … #define FW_EQ_ETH_CMD_PHYSEQID_S … #define FW_EQ_ETH_CMD_PHYSEQID_M … #define FW_EQ_ETH_CMD_PHYSEQID_V(x) … #define FW_EQ_ETH_CMD_PHYSEQID_G(x) … #define FW_EQ_ETH_CMD_FETCHSZM_S … #define FW_EQ_ETH_CMD_FETCHSZM_V(x) … #define FW_EQ_ETH_CMD_FETCHSZM_F … #define FW_EQ_ETH_CMD_STATUSPGNS_S … #define FW_EQ_ETH_CMD_STATUSPGNS_V(x) … #define FW_EQ_ETH_CMD_STATUSPGRO_S … #define FW_EQ_ETH_CMD_STATUSPGRO_V(x) … #define FW_EQ_ETH_CMD_FETCHNS_S … #define FW_EQ_ETH_CMD_FETCHNS_V(x) … #define FW_EQ_ETH_CMD_FETCHRO_S … #define FW_EQ_ETH_CMD_FETCHRO_V(x) … #define FW_EQ_ETH_CMD_FETCHRO_F … #define FW_EQ_ETH_CMD_HOSTFCMODE_S … #define FW_EQ_ETH_CMD_HOSTFCMODE_V(x) … #define FW_EQ_ETH_CMD_CPRIO_S … #define FW_EQ_ETH_CMD_CPRIO_V(x) … #define FW_EQ_ETH_CMD_ONCHIP_S … #define FW_EQ_ETH_CMD_ONCHIP_V(x) … #define FW_EQ_ETH_CMD_PCIECHN_S … #define FW_EQ_ETH_CMD_PCIECHN_V(x) … #define FW_EQ_ETH_CMD_IQID_S … #define FW_EQ_ETH_CMD_IQID_V(x) … #define FW_EQ_ETH_CMD_DCAEN_S … #define FW_EQ_ETH_CMD_DCAEN_V(x) … #define FW_EQ_ETH_CMD_DCACPU_S … #define FW_EQ_ETH_CMD_DCACPU_V(x) … #define FW_EQ_ETH_CMD_FBMIN_S … #define FW_EQ_ETH_CMD_FBMIN_V(x) … #define FW_EQ_ETH_CMD_FBMAX_S … #define FW_EQ_ETH_CMD_FBMAX_V(x) … #define FW_EQ_ETH_CMD_CIDXFTHRESHO_S … #define FW_EQ_ETH_CMD_CIDXFTHRESHO_V(x) … #define FW_EQ_ETH_CMD_CIDXFTHRESH_S … #define FW_EQ_ETH_CMD_CIDXFTHRESH_V(x) … #define FW_EQ_ETH_CMD_EQSIZE_S … #define FW_EQ_ETH_CMD_EQSIZE_V(x) … #define FW_EQ_ETH_CMD_AUTOEQUIQE_S … #define FW_EQ_ETH_CMD_AUTOEQUIQE_V(x) … #define FW_EQ_ETH_CMD_AUTOEQUIQE_F … #define FW_EQ_ETH_CMD_AUTOEQUEQE_S … #define FW_EQ_ETH_CMD_AUTOEQUEQE_V(x) … #define FW_EQ_ETH_CMD_AUTOEQUEQE_F … #define FW_EQ_ETH_CMD_VIID_S … #define FW_EQ_ETH_CMD_VIID_V(x) … #define FW_EQ_ETH_CMD_TIMEREN_S … #define FW_EQ_ETH_CMD_TIMEREN_M … #define FW_EQ_ETH_CMD_TIMEREN_V(x) … #define FW_EQ_ETH_CMD_TIMEREN_G(x) … #define FW_EQ_ETH_CMD_TIMEREN_F … #define FW_EQ_ETH_CMD_TIMERIX_S … #define FW_EQ_ETH_CMD_TIMERIX_M … #define FW_EQ_ETH_CMD_TIMERIX_V(x) … #define FW_EQ_ETH_CMD_TIMERIX_G(x) … struct fw_eq_ctrl_cmd { … }; #define FW_EQ_CTRL_CMD_PFN_S … #define FW_EQ_CTRL_CMD_PFN_V(x) … #define FW_EQ_CTRL_CMD_VFN_S … #define FW_EQ_CTRL_CMD_VFN_V(x) … #define FW_EQ_CTRL_CMD_ALLOC_S … #define FW_EQ_CTRL_CMD_ALLOC_V(x) … #define FW_EQ_CTRL_CMD_ALLOC_F … #define FW_EQ_CTRL_CMD_FREE_S … #define FW_EQ_CTRL_CMD_FREE_V(x) … #define FW_EQ_CTRL_CMD_FREE_F … #define FW_EQ_CTRL_CMD_MODIFY_S … #define FW_EQ_CTRL_CMD_MODIFY_V(x) … #define FW_EQ_CTRL_CMD_MODIFY_F … #define FW_EQ_CTRL_CMD_EQSTART_S … #define FW_EQ_CTRL_CMD_EQSTART_V(x) … #define FW_EQ_CTRL_CMD_EQSTART_F … #define FW_EQ_CTRL_CMD_EQSTOP_S … #define FW_EQ_CTRL_CMD_EQSTOP_V(x) … #define FW_EQ_CTRL_CMD_EQSTOP_F … #define FW_EQ_CTRL_CMD_CMPLIQID_S … #define FW_EQ_CTRL_CMD_CMPLIQID_V(x) … #define FW_EQ_CTRL_CMD_EQID_S … #define FW_EQ_CTRL_CMD_EQID_M … #define FW_EQ_CTRL_CMD_EQID_V(x) … #define FW_EQ_CTRL_CMD_EQID_G(x) … #define FW_EQ_CTRL_CMD_PHYSEQID_S … #define FW_EQ_CTRL_CMD_PHYSEQID_M … #define FW_EQ_CTRL_CMD_PHYSEQID_G(x) … #define FW_EQ_CTRL_CMD_FETCHSZM_S … #define FW_EQ_CTRL_CMD_FETCHSZM_V(x) … #define FW_EQ_CTRL_CMD_FETCHSZM_F … #define FW_EQ_CTRL_CMD_STATUSPGNS_S … #define FW_EQ_CTRL_CMD_STATUSPGNS_V(x) … #define FW_EQ_CTRL_CMD_STATUSPGNS_F … #define FW_EQ_CTRL_CMD_STATUSPGRO_S … #define FW_EQ_CTRL_CMD_STATUSPGRO_V(x) … #define FW_EQ_CTRL_CMD_STATUSPGRO_F … #define FW_EQ_CTRL_CMD_FETCHNS_S … #define FW_EQ_CTRL_CMD_FETCHNS_V(x) … #define FW_EQ_CTRL_CMD_FETCHNS_F … #define FW_EQ_CTRL_CMD_FETCHRO_S … #define FW_EQ_CTRL_CMD_FETCHRO_V(x) … #define FW_EQ_CTRL_CMD_FETCHRO_F … #define FW_EQ_CTRL_CMD_HOSTFCMODE_S … #define FW_EQ_CTRL_CMD_HOSTFCMODE_V(x) … #define FW_EQ_CTRL_CMD_CPRIO_S … #define FW_EQ_CTRL_CMD_CPRIO_V(x) … #define FW_EQ_CTRL_CMD_ONCHIP_S … #define FW_EQ_CTRL_CMD_ONCHIP_V(x) … #define FW_EQ_CTRL_CMD_PCIECHN_S … #define FW_EQ_CTRL_CMD_PCIECHN_V(x) … #define FW_EQ_CTRL_CMD_IQID_S … #define FW_EQ_CTRL_CMD_IQID_V(x) … #define FW_EQ_CTRL_CMD_DCAEN_S … #define FW_EQ_CTRL_CMD_DCAEN_V(x) … #define FW_EQ_CTRL_CMD_DCACPU_S … #define FW_EQ_CTRL_CMD_DCACPU_V(x) … #define FW_EQ_CTRL_CMD_FBMIN_S … #define FW_EQ_CTRL_CMD_FBMIN_V(x) … #define FW_EQ_CTRL_CMD_FBMAX_S … #define FW_EQ_CTRL_CMD_FBMAX_V(x) … #define FW_EQ_CTRL_CMD_CIDXFTHRESHO_S … #define FW_EQ_CTRL_CMD_CIDXFTHRESHO_V(x) … #define FW_EQ_CTRL_CMD_CIDXFTHRESH_S … #define FW_EQ_CTRL_CMD_CIDXFTHRESH_V(x) … #define FW_EQ_CTRL_CMD_EQSIZE_S … #define FW_EQ_CTRL_CMD_EQSIZE_V(x) … struct fw_eq_ofld_cmd { … }; #define FW_EQ_OFLD_CMD_PFN_S … #define FW_EQ_OFLD_CMD_PFN_V(x) … #define FW_EQ_OFLD_CMD_VFN_S … #define FW_EQ_OFLD_CMD_VFN_V(x) … #define FW_EQ_OFLD_CMD_ALLOC_S … #define FW_EQ_OFLD_CMD_ALLOC_V(x) … #define FW_EQ_OFLD_CMD_ALLOC_F … #define FW_EQ_OFLD_CMD_FREE_S … #define FW_EQ_OFLD_CMD_FREE_V(x) … #define FW_EQ_OFLD_CMD_FREE_F … #define FW_EQ_OFLD_CMD_MODIFY_S … #define FW_EQ_OFLD_CMD_MODIFY_V(x) … #define FW_EQ_OFLD_CMD_MODIFY_F … #define FW_EQ_OFLD_CMD_EQSTART_S … #define FW_EQ_OFLD_CMD_EQSTART_V(x) … #define FW_EQ_OFLD_CMD_EQSTART_F … #define FW_EQ_OFLD_CMD_EQSTOP_S … #define FW_EQ_OFLD_CMD_EQSTOP_V(x) … #define FW_EQ_OFLD_CMD_EQSTOP_F … #define FW_EQ_OFLD_CMD_EQID_S … #define FW_EQ_OFLD_CMD_EQID_M … #define FW_EQ_OFLD_CMD_EQID_V(x) … #define FW_EQ_OFLD_CMD_EQID_G(x) … #define FW_EQ_OFLD_CMD_PHYSEQID_S … #define FW_EQ_OFLD_CMD_PHYSEQID_M … #define FW_EQ_OFLD_CMD_PHYSEQID_G(x) … #define FW_EQ_OFLD_CMD_FETCHSZM_S … #define FW_EQ_OFLD_CMD_FETCHSZM_V(x) … #define FW_EQ_OFLD_CMD_STATUSPGNS_S … #define FW_EQ_OFLD_CMD_STATUSPGNS_V(x) … #define FW_EQ_OFLD_CMD_STATUSPGRO_S … #define FW_EQ_OFLD_CMD_STATUSPGRO_V(x) … #define FW_EQ_OFLD_CMD_FETCHNS_S … #define FW_EQ_OFLD_CMD_FETCHNS_V(x) … #define FW_EQ_OFLD_CMD_FETCHRO_S … #define FW_EQ_OFLD_CMD_FETCHRO_V(x) … #define FW_EQ_OFLD_CMD_FETCHRO_F … #define FW_EQ_OFLD_CMD_HOSTFCMODE_S … #define FW_EQ_OFLD_CMD_HOSTFCMODE_V(x) … #define FW_EQ_OFLD_CMD_CPRIO_S … #define FW_EQ_OFLD_CMD_CPRIO_V(x) … #define FW_EQ_OFLD_CMD_ONCHIP_S … #define FW_EQ_OFLD_CMD_ONCHIP_V(x) … #define FW_EQ_OFLD_CMD_PCIECHN_S … #define FW_EQ_OFLD_CMD_PCIECHN_V(x) … #define FW_EQ_OFLD_CMD_IQID_S … #define FW_EQ_OFLD_CMD_IQID_V(x) … #define FW_EQ_OFLD_CMD_DCAEN_S … #define FW_EQ_OFLD_CMD_DCAEN_V(x) … #define FW_EQ_OFLD_CMD_DCACPU_S … #define FW_EQ_OFLD_CMD_DCACPU_V(x) … #define FW_EQ_OFLD_CMD_FBMIN_S … #define FW_EQ_OFLD_CMD_FBMIN_V(x) … #define FW_EQ_OFLD_CMD_FBMAX_S … #define FW_EQ_OFLD_CMD_FBMAX_V(x) … #define FW_EQ_OFLD_CMD_CIDXFTHRESHO_S … #define FW_EQ_OFLD_CMD_CIDXFTHRESHO_V(x) … #define FW_EQ_OFLD_CMD_CIDXFTHRESH_S … #define FW_EQ_OFLD_CMD_CIDXFTHRESH_V(x) … #define FW_EQ_OFLD_CMD_EQSIZE_S … #define FW_EQ_OFLD_CMD_EQSIZE_V(x) … /* * Macros for VIID parsing: * VIID - [10:8] PFN, [7] VI Valid, [6:0] VI number */ #define FW_VIID_PFN_S … #define FW_VIID_PFN_M … #define FW_VIID_PFN_G(x) … #define FW_VIID_VIVLD_S … #define FW_VIID_VIVLD_M … #define FW_VIID_VIVLD_G(x) … #define FW_VIID_VIN_S … #define FW_VIID_VIN_M … #define FW_VIID_VIN_G(x) … struct fw_vi_cmd { … }; #define FW_VI_CMD_PFN_S … #define FW_VI_CMD_PFN_V(x) … #define FW_VI_CMD_VFN_S … #define FW_VI_CMD_VFN_V(x) … #define FW_VI_CMD_ALLOC_S … #define FW_VI_CMD_ALLOC_V(x) … #define FW_VI_CMD_ALLOC_F … #define FW_VI_CMD_FREE_S … #define FW_VI_CMD_FREE_V(x) … #define FW_VI_CMD_FREE_F … #define FW_VI_CMD_VFVLD_S … #define FW_VI_CMD_VFVLD_M … #define FW_VI_CMD_VFVLD_V(x) … #define FW_VI_CMD_VFVLD_G(x) … #define FW_VI_CMD_VFVLD_F … #define FW_VI_CMD_VIN_S … #define FW_VI_CMD_VIN_M … #define FW_VI_CMD_VIN_V(x) … #define FW_VI_CMD_VIN_G(x) … #define FW_VI_CMD_VIID_S … #define FW_VI_CMD_VIID_M … #define FW_VI_CMD_VIID_V(x) … #define FW_VI_CMD_VIID_G(x) … #define FW_VI_CMD_PORTID_S … #define FW_VI_CMD_PORTID_M … #define FW_VI_CMD_PORTID_V(x) … #define FW_VI_CMD_PORTID_G(x) … #define FW_VI_CMD_RSSSIZE_S … #define FW_VI_CMD_RSSSIZE_M … #define FW_VI_CMD_RSSSIZE_G(x) … /* Special VI_MAC command index ids */ #define FW_VI_MAC_ADD_MAC … #define FW_VI_MAC_ADD_PERSIST_MAC … #define FW_VI_MAC_MAC_BASED_FREE … #define FW_VI_MAC_ID_BASED_FREE … #define FW_CLS_TCAM_NUM_ENTRIES … enum fw_vi_mac_smac { … }; enum fw_vi_mac_result { … }; enum fw_vi_mac_entry_types { … }; struct fw_vi_mac_cmd { … }; #define FW_VI_MAC_CMD_SMTID_S … #define FW_VI_MAC_CMD_SMTID_M … #define FW_VI_MAC_CMD_SMTID_V(x) … #define FW_VI_MAC_CMD_SMTID_G(x) … #define FW_VI_MAC_CMD_VIID_S … #define FW_VI_MAC_CMD_VIID_V(x) … #define FW_VI_MAC_CMD_FREEMACS_S … #define FW_VI_MAC_CMD_FREEMACS_V(x) … #define FW_VI_MAC_CMD_ENTRY_TYPE_S … #define FW_VI_MAC_CMD_ENTRY_TYPE_M … #define FW_VI_MAC_CMD_ENTRY_TYPE_V(x) … #define FW_VI_MAC_CMD_ENTRY_TYPE_G(x) … #define FW_VI_MAC_CMD_HASHVECEN_S … #define FW_VI_MAC_CMD_HASHVECEN_V(x) … #define FW_VI_MAC_CMD_HASHVECEN_F … #define FW_VI_MAC_CMD_HASHUNIEN_S … #define FW_VI_MAC_CMD_HASHUNIEN_V(x) … #define FW_VI_MAC_CMD_VALID_S … #define FW_VI_MAC_CMD_VALID_V(x) … #define FW_VI_MAC_CMD_VALID_F … #define FW_VI_MAC_CMD_PRIO_S … #define FW_VI_MAC_CMD_PRIO_V(x) … #define FW_VI_MAC_CMD_SMAC_RESULT_S … #define FW_VI_MAC_CMD_SMAC_RESULT_M … #define FW_VI_MAC_CMD_SMAC_RESULT_V(x) … #define FW_VI_MAC_CMD_SMAC_RESULT_G(x) … #define FW_VI_MAC_CMD_IDX_S … #define FW_VI_MAC_CMD_IDX_M … #define FW_VI_MAC_CMD_IDX_V(x) … #define FW_VI_MAC_CMD_IDX_G(x) … #define FW_VI_MAC_CMD_RAW_IDX_S … #define FW_VI_MAC_CMD_RAW_IDX_M … #define FW_VI_MAC_CMD_RAW_IDX_V(x) … #define FW_VI_MAC_CMD_RAW_IDX_G(x) … #define FW_VI_MAC_CMD_LOOKUP_TYPE_S … #define FW_VI_MAC_CMD_LOOKUP_TYPE_M … #define FW_VI_MAC_CMD_LOOKUP_TYPE_V(x) … #define FW_VI_MAC_CMD_LOOKUP_TYPE_G(x) … #define FW_VI_MAC_CMD_LOOKUP_TYPE_F … #define FW_VI_MAC_CMD_DIP_HIT_S … #define FW_VI_MAC_CMD_DIP_HIT_M … #define FW_VI_MAC_CMD_DIP_HIT_V(x) … #define FW_VI_MAC_CMD_DIP_HIT_G(x) … #define FW_VI_MAC_CMD_DIP_HIT_F … #define FW_VI_MAC_CMD_VNI_S … #define FW_VI_MAC_CMD_VNI_M … #define FW_VI_MAC_CMD_VNI_V(x) … #define FW_VI_MAC_CMD_VNI_G(x) … #define FW_VI_MAC_CMD_VNI_MASK_S … #define FW_VI_MAC_CMD_VNI_MASK_M … #define FW_VI_MAC_CMD_VNI_MASK_V(x) … #define FW_VI_MAC_CMD_VNI_MASK_G(x) … #define FW_RXMODE_MTU_NO_CHG … struct fw_vi_rxmode_cmd { … }; #define FW_VI_RXMODE_CMD_VIID_S … #define FW_VI_RXMODE_CMD_VIID_V(x) … #define FW_VI_RXMODE_CMD_MTU_S … #define FW_VI_RXMODE_CMD_MTU_M … #define FW_VI_RXMODE_CMD_MTU_V(x) … #define FW_VI_RXMODE_CMD_PROMISCEN_S … #define FW_VI_RXMODE_CMD_PROMISCEN_M … #define FW_VI_RXMODE_CMD_PROMISCEN_V(x) … #define FW_VI_RXMODE_CMD_ALLMULTIEN_S … #define FW_VI_RXMODE_CMD_ALLMULTIEN_M … #define FW_VI_RXMODE_CMD_ALLMULTIEN_V(x) … #define FW_VI_RXMODE_CMD_BROADCASTEN_S … #define FW_VI_RXMODE_CMD_BROADCASTEN_M … #define FW_VI_RXMODE_CMD_BROADCASTEN_V(x) … #define FW_VI_RXMODE_CMD_VLANEXEN_S … #define FW_VI_RXMODE_CMD_VLANEXEN_M … #define FW_VI_RXMODE_CMD_VLANEXEN_V(x) … struct fw_vi_enable_cmd { … }; #define FW_VI_ENABLE_CMD_VIID_S … #define FW_VI_ENABLE_CMD_VIID_V(x) … #define FW_VI_ENABLE_CMD_IEN_S … #define FW_VI_ENABLE_CMD_IEN_V(x) … #define FW_VI_ENABLE_CMD_EEN_S … #define FW_VI_ENABLE_CMD_EEN_V(x) … #define FW_VI_ENABLE_CMD_LED_S … #define FW_VI_ENABLE_CMD_LED_V(x) … #define FW_VI_ENABLE_CMD_LED_F … #define FW_VI_ENABLE_CMD_DCB_INFO_S … #define FW_VI_ENABLE_CMD_DCB_INFO_V(x) … /* VI VF stats offset definitions */ #define VI_VF_NUM_STATS … enum fw_vi_stats_vf_index { … }; /* VI PF stats offset definitions */ #define VI_PF_NUM_STATS … enum fw_vi_stats_pf_index { … }; struct fw_vi_stats_cmd { … }; #define FW_VI_STATS_CMD_VIID_S … #define FW_VI_STATS_CMD_VIID_V(x) … #define FW_VI_STATS_CMD_NSTATS_S … #define FW_VI_STATS_CMD_NSTATS_V(x) … #define FW_VI_STATS_CMD_IX_S … #define FW_VI_STATS_CMD_IX_V(x) … struct fw_acl_mac_cmd { … }; #define FW_ACL_MAC_CMD_PFN_S … #define FW_ACL_MAC_CMD_PFN_V(x) … #define FW_ACL_MAC_CMD_VFN_S … #define FW_ACL_MAC_CMD_VFN_V(x) … #define FW_ACL_MAC_CMD_EN_S … #define FW_ACL_MAC_CMD_EN_V(x) … struct fw_acl_vlan_cmd { … }; #define FW_ACL_VLAN_CMD_PFN_S … #define FW_ACL_VLAN_CMD_PFN_V(x) … #define FW_ACL_VLAN_CMD_VFN_S … #define FW_ACL_VLAN_CMD_VFN_V(x) … #define FW_ACL_VLAN_CMD_EN_S … #define FW_ACL_VLAN_CMD_EN_M … #define FW_ACL_VLAN_CMD_EN_V(x) … #define FW_ACL_VLAN_CMD_EN_G(x) … #define FW_ACL_VLAN_CMD_EN_F … #define FW_ACL_VLAN_CMD_DROPNOVLAN_S … #define FW_ACL_VLAN_CMD_DROPNOVLAN_V(x) … #define FW_ACL_VLAN_CMD_DROPNOVLAN_F … #define FW_ACL_VLAN_CMD_FM_S … #define FW_ACL_VLAN_CMD_FM_M … #define FW_ACL_VLAN_CMD_FM_V(x) … #define FW_ACL_VLAN_CMD_FM_G(x) … #define FW_ACL_VLAN_CMD_FM_F … /* old 16-bit port capabilities bitmap (fw_port_cap16_t) */ enum fw_port_cap { … }; #define FW_PORT_CAP_SPEED_S … #define FW_PORT_CAP_SPEED_M … #define FW_PORT_CAP_SPEED_V(x) … #define FW_PORT_CAP_SPEED_G(x) … enum fw_port_mdi { … }; #define FW_PORT_CAP_MDI_S … #define FW_PORT_CAP_MDI_V(x) … /* new 32-bit port capabilities bitmap (fw_port_cap32_t) */ #define FW_PORT_CAP32_SPEED_100M … #define FW_PORT_CAP32_SPEED_1G … #define FW_PORT_CAP32_SPEED_10G … #define FW_PORT_CAP32_SPEED_25G … #define FW_PORT_CAP32_SPEED_40G … #define FW_PORT_CAP32_SPEED_50G … #define FW_PORT_CAP32_SPEED_100G … #define FW_PORT_CAP32_SPEED_200G … #define FW_PORT_CAP32_SPEED_400G … #define FW_PORT_CAP32_SPEED_RESERVED1 … #define FW_PORT_CAP32_SPEED_RESERVED2 … #define FW_PORT_CAP32_SPEED_RESERVED3 … #define FW_PORT_CAP32_RESERVED1 … #define FW_PORT_CAP32_FC_RX … #define FW_PORT_CAP32_FC_TX … #define FW_PORT_CAP32_802_3_PAUSE … #define FW_PORT_CAP32_802_3_ASM_DIR … #define FW_PORT_CAP32_ANEG … #define FW_PORT_CAP32_MDIAUTO … #define FW_PORT_CAP32_MDISTRAIGHT … #define FW_PORT_CAP32_FEC_RS … #define FW_PORT_CAP32_FEC_BASER_RS … #define FW_PORT_CAP32_FEC_RESERVED1 … #define FW_PORT_CAP32_FEC_RESERVED2 … #define FW_PORT_CAP32_FEC_RESERVED3 … #define FW_PORT_CAP32_FORCE_PAUSE … #define FW_PORT_CAP32_RESERVED2 … #define FW_PORT_CAP32_SPEED_S … #define FW_PORT_CAP32_SPEED_M … #define FW_PORT_CAP32_SPEED_V(x) … #define FW_PORT_CAP32_SPEED_G(x) … #define FW_PORT_CAP32_FC_S … #define FW_PORT_CAP32_FC_M … #define FW_PORT_CAP32_FC_V(x) … #define FW_PORT_CAP32_FC_G(x) … #define FW_PORT_CAP32_802_3_S … #define FW_PORT_CAP32_802_3_M … #define FW_PORT_CAP32_802_3_V(x) … #define FW_PORT_CAP32_802_3_G(x) … #define FW_PORT_CAP32_ANEG_S … #define FW_PORT_CAP32_ANEG_M … #define FW_PORT_CAP32_ANEG_V(x) … #define FW_PORT_CAP32_ANEG_G(x) … enum fw_port_mdi32 { … }; #define FW_PORT_CAP32_MDI_S … #define FW_PORT_CAP32_MDI_M … #define FW_PORT_CAP32_MDI_V(x) … #define FW_PORT_CAP32_MDI_G(x) … #define FW_PORT_CAP32_FEC_S … #define FW_PORT_CAP32_FEC_M … #define FW_PORT_CAP32_FEC_V(x) … #define FW_PORT_CAP32_FEC_G(x) … /* macros to isolate various 32-bit Port Capabilities sub-fields */ #define CAP32_SPEED(__cap32) … #define CAP32_FEC(__cap32) … enum fw_port_action { … }; enum fw_port_l2cfg_ctlbf { … }; enum fw_port_dcb_versions { … }; enum fw_port_dcb_cfg { … }; enum fw_port_dcb_cfg_rc { … }; enum fw_port_dcb_type { … }; enum fw_port_dcb_feature_state { … }; struct fw_port_cmd { … }; #define FW_PORT_CMD_READ_S … #define FW_PORT_CMD_READ_V(x) … #define FW_PORT_CMD_READ_F … #define FW_PORT_CMD_PORTID_S … #define FW_PORT_CMD_PORTID_M … #define FW_PORT_CMD_PORTID_V(x) … #define FW_PORT_CMD_PORTID_G(x) … #define FW_PORT_CMD_ACTION_S … #define FW_PORT_CMD_ACTION_M … #define FW_PORT_CMD_ACTION_V(x) … #define FW_PORT_CMD_ACTION_G(x) … #define FW_PORT_CMD_OVLAN3_S … #define FW_PORT_CMD_OVLAN3_V(x) … #define FW_PORT_CMD_OVLAN2_S … #define FW_PORT_CMD_OVLAN2_V(x) … #define FW_PORT_CMD_OVLAN1_S … #define FW_PORT_CMD_OVLAN1_V(x) … #define FW_PORT_CMD_OVLAN0_S … #define FW_PORT_CMD_OVLAN0_V(x) … #define FW_PORT_CMD_IVLAN0_S … #define FW_PORT_CMD_IVLAN0_V(x) … #define FW_PORT_CMD_TXIPG_S … #define FW_PORT_CMD_TXIPG_V(x) … #define FW_PORT_CMD_LSTATUS_S … #define FW_PORT_CMD_LSTATUS_M … #define FW_PORT_CMD_LSTATUS_V(x) … #define FW_PORT_CMD_LSTATUS_G(x) … #define FW_PORT_CMD_LSTATUS_F … #define FW_PORT_CMD_LSPEED_S … #define FW_PORT_CMD_LSPEED_M … #define FW_PORT_CMD_LSPEED_V(x) … #define FW_PORT_CMD_LSPEED_G(x) … #define FW_PORT_CMD_TXPAUSE_S … #define FW_PORT_CMD_TXPAUSE_V(x) … #define FW_PORT_CMD_TXPAUSE_F … #define FW_PORT_CMD_RXPAUSE_S … #define FW_PORT_CMD_RXPAUSE_V(x) … #define FW_PORT_CMD_RXPAUSE_F … #define FW_PORT_CMD_MDIOCAP_S … #define FW_PORT_CMD_MDIOCAP_V(x) … #define FW_PORT_CMD_MDIOCAP_F … #define FW_PORT_CMD_MDIOADDR_S … #define FW_PORT_CMD_MDIOADDR_M … #define FW_PORT_CMD_MDIOADDR_G(x) … #define FW_PORT_CMD_LPTXPAUSE_S … #define FW_PORT_CMD_LPTXPAUSE_V(x) … #define FW_PORT_CMD_LPTXPAUSE_F … #define FW_PORT_CMD_LPRXPAUSE_S … #define FW_PORT_CMD_LPRXPAUSE_V(x) … #define FW_PORT_CMD_LPRXPAUSE_F … #define FW_PORT_CMD_PTYPE_S … #define FW_PORT_CMD_PTYPE_M … #define FW_PORT_CMD_PTYPE_G(x) … #define FW_PORT_CMD_LINKDNRC_S … #define FW_PORT_CMD_LINKDNRC_M … #define FW_PORT_CMD_LINKDNRC_G(x) … #define FW_PORT_CMD_MODTYPE_S … #define FW_PORT_CMD_MODTYPE_M … #define FW_PORT_CMD_MODTYPE_V(x) … #define FW_PORT_CMD_MODTYPE_G(x) … #define FW_PORT_CMD_DCBXDIS_S … #define FW_PORT_CMD_DCBXDIS_V(x) … #define FW_PORT_CMD_DCBXDIS_F … #define FW_PORT_CMD_APPLY_S … #define FW_PORT_CMD_APPLY_V(x) … #define FW_PORT_CMD_APPLY_F … #define FW_PORT_CMD_ALL_SYNCD_S … #define FW_PORT_CMD_ALL_SYNCD_V(x) … #define FW_PORT_CMD_ALL_SYNCD_F … #define FW_PORT_CMD_DCB_VERSION_S … #define FW_PORT_CMD_DCB_VERSION_M … #define FW_PORT_CMD_DCB_VERSION_G(x) … #define FW_PORT_CMD_LSTATUS32_S … #define FW_PORT_CMD_LSTATUS32_M … #define FW_PORT_CMD_LSTATUS32_V(x) … #define FW_PORT_CMD_LSTATUS32_G(x) … #define FW_PORT_CMD_LSTATUS32_F … #define FW_PORT_CMD_LINKDNRC32_S … #define FW_PORT_CMD_LINKDNRC32_M … #define FW_PORT_CMD_LINKDNRC32_V(x) … #define FW_PORT_CMD_LINKDNRC32_G(x) … #define FW_PORT_CMD_DCBXDIS32_S … #define FW_PORT_CMD_DCBXDIS32_M … #define FW_PORT_CMD_DCBXDIS32_V(x) … #define FW_PORT_CMD_DCBXDIS32_G(x) … #define FW_PORT_CMD_DCBXDIS32_F … #define FW_PORT_CMD_MDIOCAP32_S … #define FW_PORT_CMD_MDIOCAP32_M … #define FW_PORT_CMD_MDIOCAP32_V(x) … #define FW_PORT_CMD_MDIOCAP32_G(x) … #define FW_PORT_CMD_MDIOCAP32_F … #define FW_PORT_CMD_MDIOADDR32_S … #define FW_PORT_CMD_MDIOADDR32_M … #define FW_PORT_CMD_MDIOADDR32_V(x) … #define FW_PORT_CMD_MDIOADDR32_G(x) … #define FW_PORT_CMD_PORTTYPE32_S … #define FW_PORT_CMD_PORTTYPE32_M … #define FW_PORT_CMD_PORTTYPE32_V(x) … #define FW_PORT_CMD_PORTTYPE32_G(x) … #define FW_PORT_CMD_MODTYPE32_S … #define FW_PORT_CMD_MODTYPE32_M … #define FW_PORT_CMD_MODTYPE32_V(x) … #define FW_PORT_CMD_MODTYPE32_G(x) … #define FW_PORT_CMD_CBLLEN32_S … #define FW_PORT_CMD_CBLLEN32_M … #define FW_PORT_CMD_CBLLEN32_V(x) … #define FW_PORT_CMD_CBLLEN32_G(x) … #define FW_PORT_CMD_AUXLINFO32_S … #define FW_PORT_CMD_AUXLINFO32_M … #define FW_PORT_CMD_AUXLINFO32_V(x) … #define FW_PORT_CMD_AUXLINFO32_G(x) … #define FW_PORT_AUXLINFO32_KX4_S … #define FW_PORT_AUXLINFO32_KX4_M … #define FW_PORT_AUXLINFO32_KX4_V(x) … #define FW_PORT_AUXLINFO32_KX4_G(x) … #define FW_PORT_AUXLINFO32_KX4_F … #define FW_PORT_AUXLINFO32_KR_S … #define FW_PORT_AUXLINFO32_KR_M … #define FW_PORT_AUXLINFO32_KR_V(x) … #define FW_PORT_AUXLINFO32_KR_G(x) … #define FW_PORT_AUXLINFO32_KR_F … #define FW_PORT_CMD_MTU32_S … #define FW_PORT_CMD_MTU32_M … #define FW_PORT_CMD_MTU32_V(x) … #define FW_PORT_CMD_MTU32_G(x) … enum fw_port_type { … }; enum fw_port_module_type { … }; enum fw_port_mod_sub_type { … }; enum fw_port_stats_tx_index { … }; enum fw_port_stat_rx_index { … }; /* port stats */ #define FW_NUM_PORT_STATS … struct fw_port_stats_cmd { … }; /* port loopback stats */ #define FW_NUM_LB_STATS … enum fw_port_lb_stats_index { … }; struct fw_port_lb_stats_cmd { … }; enum fw_ptp_subop { … }; struct fw_ptp_cmd { … }; #define FW_PTP_CMD_PORTID_S … #define FW_PTP_CMD_PORTID_M … #define FW_PTP_CMD_PORTID_V(x) … #define FW_PTP_CMD_PORTID_G(x) … struct fw_rss_ind_tbl_cmd { … }; #define FW_RSS_IND_TBL_CMD_VIID_S … #define FW_RSS_IND_TBL_CMD_VIID_V(x) … #define FW_RSS_IND_TBL_CMD_IQ0_S … #define FW_RSS_IND_TBL_CMD_IQ0_V(x) … #define FW_RSS_IND_TBL_CMD_IQ1_S … #define FW_RSS_IND_TBL_CMD_IQ1_V(x) … #define FW_RSS_IND_TBL_CMD_IQ2_S … #define FW_RSS_IND_TBL_CMD_IQ2_V(x) … struct fw_rss_glb_config_cmd { … }; #define FW_RSS_GLB_CONFIG_CMD_MODE_S … #define FW_RSS_GLB_CONFIG_CMD_MODE_M … #define FW_RSS_GLB_CONFIG_CMD_MODE_V(x) … #define FW_RSS_GLB_CONFIG_CMD_MODE_G(x) … #define FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL … #define FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL … #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_S … #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_V(x) … #define FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F … #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_S … #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_V(x) … #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F … #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_S … #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_V(x) … #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F … #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_S … #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_V(x) … #define FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F … #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_S … #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_V(x) … #define FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F … #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_S … #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_V(x) … #define FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F … #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_S … #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_V(x) … #define FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F … #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_S … #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_V(x) … #define FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F … #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_S … #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_V(x) … #define FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F … struct fw_rss_vi_config_cmd { … }; #define FW_RSS_VI_CONFIG_CMD_VIID_S … #define FW_RSS_VI_CONFIG_CMD_VIID_V(x) … #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_S … #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_M … #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V(x) … #define FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(x) … #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_S … #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_V(x) … #define FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F … #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_S … #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_V(x) … #define FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F … #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_S … #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_V(x) … #define FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F … #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_S … #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_V(x) … #define FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F … #define FW_RSS_VI_CONFIG_CMD_UDPEN_S … #define FW_RSS_VI_CONFIG_CMD_UDPEN_V(x) … #define FW_RSS_VI_CONFIG_CMD_UDPEN_F … enum fw_sched_sc { … }; struct fw_sched_cmd { … }; struct fw_clip_cmd { … }; #define FW_CLIP_CMD_ALLOC_S … #define FW_CLIP_CMD_ALLOC_V(x) … #define FW_CLIP_CMD_ALLOC_F … #define FW_CLIP_CMD_FREE_S … #define FW_CLIP_CMD_FREE_V(x) … #define FW_CLIP_CMD_FREE_F … enum fw_error_type { … }; struct fw_error_cmd { … }; struct fw_debug_cmd { … }; #define FW_DEBUG_CMD_TYPE_S … #define FW_DEBUG_CMD_TYPE_M … #define FW_DEBUG_CMD_TYPE_G(x) … struct fw_hma_cmd { … }; #define FW_HMA_CMD_MODE_S … #define FW_HMA_CMD_MODE_M … #define FW_HMA_CMD_MODE_V(x) … #define FW_HMA_CMD_MODE_G(x) … #define FW_HMA_CMD_MODE_F … #define FW_HMA_CMD_SOC_S … #define FW_HMA_CMD_SOC_M … #define FW_HMA_CMD_SOC_V(x) … #define FW_HMA_CMD_SOC_G(x) … #define FW_HMA_CMD_SOC_F … #define FW_HMA_CMD_EOC_S … #define FW_HMA_CMD_EOC_M … #define FW_HMA_CMD_EOC_V(x) … #define FW_HMA_CMD_EOC_G(x) … #define FW_HMA_CMD_EOC_F … #define FW_HMA_CMD_PCIE_PARAMS_S … #define FW_HMA_CMD_PCIE_PARAMS_M … #define FW_HMA_CMD_PCIE_PARAMS_V(x) … #define FW_HMA_CMD_PCIE_PARAMS_G(x) … #define FW_HMA_CMD_NADDR_S … #define FW_HMA_CMD_NADDR_M … #define FW_HMA_CMD_NADDR_V(x) … #define FW_HMA_CMD_NADDR_G(x) … #define FW_HMA_CMD_SIZE_S … #define FW_HMA_CMD_SIZE_M … #define FW_HMA_CMD_SIZE_V(x) … #define FW_HMA_CMD_SIZE_G(x) … #define FW_HMA_CMD_ADDR_SIZE_S … #define FW_HMA_CMD_ADDR_SIZE_M … #define FW_HMA_CMD_ADDR_SIZE_V(x) … #define FW_HMA_CMD_ADDR_SIZE_G(x) … enum pcie_fw_eval { … }; #define PCIE_FW_ERR_S … #define PCIE_FW_ERR_V(x) … #define PCIE_FW_ERR_F … #define PCIE_FW_INIT_S … #define PCIE_FW_INIT_V(x) … #define PCIE_FW_INIT_F … #define PCIE_FW_HALT_S … #define PCIE_FW_HALT_V(x) … #define PCIE_FW_HALT_F … #define PCIE_FW_EVAL_S … #define PCIE_FW_EVAL_M … #define PCIE_FW_EVAL_G(x) … #define PCIE_FW_MASTER_VLD_S … #define PCIE_FW_MASTER_VLD_V(x) … #define PCIE_FW_MASTER_VLD_F … #define PCIE_FW_MASTER_S … #define PCIE_FW_MASTER_M … #define PCIE_FW_MASTER_V(x) … #define PCIE_FW_MASTER_G(x) … struct fw_hdr { … }; enum fw_hdr_chip { … }; #define FW_HDR_FW_VER_MAJOR_S … #define FW_HDR_FW_VER_MAJOR_M … #define FW_HDR_FW_VER_MAJOR_V(x) … #define FW_HDR_FW_VER_MAJOR_G(x) … #define FW_HDR_FW_VER_MINOR_S … #define FW_HDR_FW_VER_MINOR_M … #define FW_HDR_FW_VER_MINOR_V(x) … #define FW_HDR_FW_VER_MINOR_G(x) … #define FW_HDR_FW_VER_MICRO_S … #define FW_HDR_FW_VER_MICRO_M … #define FW_HDR_FW_VER_MICRO_V(x) … #define FW_HDR_FW_VER_MICRO_G(x) … #define FW_HDR_FW_VER_BUILD_S … #define FW_HDR_FW_VER_BUILD_M … #define FW_HDR_FW_VER_BUILD_V(x) … #define FW_HDR_FW_VER_BUILD_G(x) … enum fw_hdr_intfver { … }; enum fw_hdr_flags { … }; /* length of the formatting string */ #define FW_DEVLOG_FMT_LEN … /* maximum number of the formatting string parameters */ #define FW_DEVLOG_FMT_PARAMS_NUM … /* priority levels */ enum fw_devlog_level { … }; /* facilities that may send a log message */ enum fw_devlog_facility { … }; /* log message format */ struct fw_devlog_e { … }; struct fw_devlog_cmd { … }; #define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_S … #define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_M … #define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_G(x) … #define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_S … #define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_M … #define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_G(x) … /* P C I E F W P F 7 R E G I S T E R */ /* PF7 stores the Firmware Device Log parameters which allows Host Drivers to * access the "devlog" which needing to contact firmware. The encoding is * mostly the same as that returned by the DEVLOG command except for the size * which is encoded as the number of entries in multiples-1 of 128 here rather * than the memory size as is done in the DEVLOG command. Thus, 0 means 128 * and 15 means 2048. This of course in turn constrains the allowed values * for the devlog size ... */ #define PCIE_FW_PF_DEVLOG … #define PCIE_FW_PF_DEVLOG_NENTRIES128_S … #define PCIE_FW_PF_DEVLOG_NENTRIES128_M … #define PCIE_FW_PF_DEVLOG_NENTRIES128_V(x) … #define PCIE_FW_PF_DEVLOG_NENTRIES128_G(x) … #define PCIE_FW_PF_DEVLOG_ADDR16_S … #define PCIE_FW_PF_DEVLOG_ADDR16_M … #define PCIE_FW_PF_DEVLOG_ADDR16_V(x) … #define PCIE_FW_PF_DEVLOG_ADDR16_G(x) … #define PCIE_FW_PF_DEVLOG_MEMTYPE_S … #define PCIE_FW_PF_DEVLOG_MEMTYPE_M … #define PCIE_FW_PF_DEVLOG_MEMTYPE_V(x) … #define PCIE_FW_PF_DEVLOG_MEMTYPE_G(x) … #define MAX_IMM_OFLD_TX_DATA_WR_LEN … struct fw_crypto_lookaside_wr { … }; #define FW_CRYPTO_LOOKASIDE_WR_OPCODE_S … #define FW_CRYPTO_LOOKASIDE_WR_OPCODE_M … #define FW_CRYPTO_LOOKASIDE_WR_OPCODE_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_OPCODE_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_COMPL_S … #define FW_CRYPTO_LOOKASIDE_WR_COMPL_M … #define FW_CRYPTO_LOOKASIDE_WR_COMPL_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_COMPL_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_COMPL_F … #define FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_S … #define FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_M … #define FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_IMM_LEN_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_S … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_M … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_S … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_M … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_LEN16_S … #define FW_CRYPTO_LOOKASIDE_WR_LEN16_M … #define FW_CRYPTO_LOOKASIDE_WR_LEN16_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_LEN16_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_RX_CHID_S … #define FW_CRYPTO_LOOKASIDE_WR_RX_CHID_M … #define FW_CRYPTO_LOOKASIDE_WR_RX_CHID_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_RX_CHID_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_LCB_S … #define FW_CRYPTO_LOOKASIDE_WR_LCB_M … #define FW_CRYPTO_LOOKASIDE_WR_LCB_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_LCB_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_PHASH_S … #define FW_CRYPTO_LOOKASIDE_WR_PHASH_M … #define FW_CRYPTO_LOOKASIDE_WR_PHASH_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_PHASH_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_IV_S … #define FW_CRYPTO_LOOKASIDE_WR_IV_M … #define FW_CRYPTO_LOOKASIDE_WR_IV_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_IV_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_FQIDX_S … #define FW_CRYPTO_LOOKASIDE_WR_FQIDX_M … #define FW_CRYPTO_LOOKASIDE_WR_FQIDX_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_FQIDX_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_TX_CH_S … #define FW_CRYPTO_LOOKASIDE_WR_TX_CH_M … #define FW_CRYPTO_LOOKASIDE_WR_TX_CH_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_TX_CH_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_S … #define FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_M … #define FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_S … #define FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_M … #define FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_G(x) … #define FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_S … #define FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_M … #define FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_V(x) … #define FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_G(x) … struct fw_tlstx_data_wr { … }; #define FW_TLSTX_DATA_WR_OPCODE_S … #define FW_TLSTX_DATA_WR_OPCODE_M … #define FW_TLSTX_DATA_WR_OPCODE_V(x) … #define FW_TLSTX_DATA_WR_OPCODE_G(x) … #define FW_TLSTX_DATA_WR_COMPL_S … #define FW_TLSTX_DATA_WR_COMPL_M … #define FW_TLSTX_DATA_WR_COMPL_V(x) … #define FW_TLSTX_DATA_WR_COMPL_G(x) … #define FW_TLSTX_DATA_WR_COMPL_F … #define FW_TLSTX_DATA_WR_IMMDLEN_S … #define FW_TLSTX_DATA_WR_IMMDLEN_M … #define FW_TLSTX_DATA_WR_IMMDLEN_V(x) … #define FW_TLSTX_DATA_WR_IMMDLEN_G(x) … #define FW_TLSTX_DATA_WR_FLOWID_S … #define FW_TLSTX_DATA_WR_FLOWID_M … #define FW_TLSTX_DATA_WR_FLOWID_V(x) … #define FW_TLSTX_DATA_WR_FLOWID_G(x) … #define FW_TLSTX_DATA_WR_LEN16_S … #define FW_TLSTX_DATA_WR_LEN16_M … #define FW_TLSTX_DATA_WR_LEN16_V(x) … #define FW_TLSTX_DATA_WR_LEN16_G(x) … #define FW_TLSTX_DATA_WR_LSODISABLE_S … #define FW_TLSTX_DATA_WR_LSODISABLE_M … #define FW_TLSTX_DATA_WR_LSODISABLE_V(x) … #define FW_TLSTX_DATA_WR_LSODISABLE_G(x) … #define FW_TLSTX_DATA_WR_LSODISABLE_F … #define FW_TLSTX_DATA_WR_ALIGNPLD_S … #define FW_TLSTX_DATA_WR_ALIGNPLD_M … #define FW_TLSTX_DATA_WR_ALIGNPLD_V(x) … #define FW_TLSTX_DATA_WR_ALIGNPLD_G(x) … #define FW_TLSTX_DATA_WR_ALIGNPLD_F … #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_S … #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_M … #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_V(x) … #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_G(x) … #define FW_TLSTX_DATA_WR_ALIGNPLDSHOVE_F … #define FW_TLSTX_DATA_WR_FLAGS_S … #define FW_TLSTX_DATA_WR_FLAGS_M … #define FW_TLSTX_DATA_WR_FLAGS_V(x) … #define FW_TLSTX_DATA_WR_FLAGS_G(x) … #define FW_TLSTX_DATA_WR_CTXLOC_S … #define FW_TLSTX_DATA_WR_CTXLOC_M … #define FW_TLSTX_DATA_WR_CTXLOC_V(x) … #define FW_TLSTX_DATA_WR_CTXLOC_G(x) … #define FW_TLSTX_DATA_WR_IVDSGL_S … #define FW_TLSTX_DATA_WR_IVDSGL_M … #define FW_TLSTX_DATA_WR_IVDSGL_V(x) … #define FW_TLSTX_DATA_WR_IVDSGL_G(x) … #define FW_TLSTX_DATA_WR_IVDSGL_F … #define FW_TLSTX_DATA_WR_KEYSIZE_S … #define FW_TLSTX_DATA_WR_KEYSIZE_M … #define FW_TLSTX_DATA_WR_KEYSIZE_V(x) … #define FW_TLSTX_DATA_WR_KEYSIZE_G(x) … #define FW_TLSTX_DATA_WR_NUMIVS_S … #define FW_TLSTX_DATA_WR_NUMIVS_M … #define FW_TLSTX_DATA_WR_NUMIVS_V(x) … #define FW_TLSTX_DATA_WR_NUMIVS_G(x) … #define FW_TLSTX_DATA_WR_EXP_S … #define FW_TLSTX_DATA_WR_EXP_M … #define FW_TLSTX_DATA_WR_EXP_V(x) … #define FW_TLSTX_DATA_WR_EXP_G(x) … #define FW_TLSTX_DATA_WR_ADJUSTEDPLEN_S … #define FW_TLSTX_DATA_WR_ADJUSTEDPLEN_V(x) … #define FW_TLSTX_DATA_WR_EXPINPLENMAX_S … #define FW_TLSTX_DATA_WR_EXPINPLENMAX_V(x) … #define FW_TLSTX_DATA_WR_PDUSINPLENMAX_S … #define FW_TLSTX_DATA_WR_PDUSINPLENMAX_V(x) … #endif /* _T4FW_INTERFACE_H_ */
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