/* * This file is part of the Chelsio FCoE driver for Linux. * * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef __CSIO_WR_H__ #define __CSIO_WR_H__ #include <linux/cache.h> #include "csio_defs.h" #include "t4fw_api.h" #include "t4fw_api_stor.h" /* * SGE register field values. */ #define X_INGPCIEBOUNDARY_32B … #define X_INGPCIEBOUNDARY_64B … #define X_INGPCIEBOUNDARY_128B … #define X_INGPCIEBOUNDARY_256B … #define X_INGPCIEBOUNDARY_512B … #define X_INGPCIEBOUNDARY_1024B … #define X_INGPCIEBOUNDARY_2048B … #define X_INGPCIEBOUNDARY_4096B … /* GTS register */ #define X_TIMERREG_COUNTER0 … #define X_TIMERREG_COUNTER1 … #define X_TIMERREG_COUNTER2 … #define X_TIMERREG_COUNTER3 … #define X_TIMERREG_COUNTER4 … #define X_TIMERREG_COUNTER5 … #define X_TIMERREG_RESTART_COUNTER … #define X_TIMERREG_UPDATE_CIDX … /* * Egress Context field values */ #define X_FETCHBURSTMIN_16B … #define X_FETCHBURSTMIN_32B … #define X_FETCHBURSTMIN_64B … #define X_FETCHBURSTMIN_128B … #define X_FETCHBURSTMAX_64B … #define X_FETCHBURSTMAX_128B … #define X_FETCHBURSTMAX_256B … #define X_FETCHBURSTMAX_512B … #define X_HOSTFCMODE_NONE … #define X_HOSTFCMODE_INGRESS_QUEUE … #define X_HOSTFCMODE_STATUS_PAGE … #define X_HOSTFCMODE_BOTH … /* * Ingress Context field values */ #define X_UPDATESCHEDULING_TIMER … #define X_UPDATESCHEDULING_COUNTER_OPTTIMER … #define X_UPDATEDELIVERY_NONE … #define X_UPDATEDELIVERY_INTERRUPT … #define X_UPDATEDELIVERY_STATUS_PAGE … #define X_UPDATEDELIVERY_BOTH … #define X_INTERRUPTDESTINATION_PCIE … #define X_INTERRUPTDESTINATION_IQ … #define X_RSPD_TYPE_FLBUF … #define X_RSPD_TYPE_CPL … #define X_RSPD_TYPE_INTR … /* WR status is at the same position as retval in a CMD header */ #define csio_wr_status(_wr) … struct csio_hw; extern int csio_intr_coalesce_cnt; extern int csio_intr_coalesce_time; /* Ingress queue params */ struct csio_iq_params { … }; /* Egress queue params */ struct csio_eq_params { … }; struct csio_dma_buf { … }; /* Generic I/O request structure */ struct csio_ioreq { … } ____cacheline_aligned_in_smp; /* * Egress status page for egress cidx updates */ struct csio_qstatus_page { … }; enum { … }; /* Defines for type */ enum { … }; /* * Structure for footer (last 2 flits) of Ingress Queue Entry. */ struct csio_iqwr_footer { … }; #define IQWRF_NEWBUF … #define IQWRF_LEN_GET(x) … #define IQWRF_GEN_SHIFT … #define IQWRF_TYPE_GET(x) … /* * WR pair: * ======== * A WR can start towards the end of a queue, and then continue at the * beginning, since the queue is considered to be circular. This will * require a pair of address/len to be passed back to the caller - * hence the Work request pair structure. */ struct csio_wr_pair { … }; /* * The following structure is used by ingress processing to return the * free list buffers to consumers. */ struct csio_fl_dma_buf { … }; /* Data-types */ iq_handler_t; struct csio_iq { … }; struct csio_eq { … }; struct csio_fl { … }; struct csio_qstats { … }; /* Queue metadata */ struct csio_q { … } ____cacheline_aligned_in_smp; struct csio_sge { … }; /* Work request module */ struct csio_wrm { … }; #define csio_get_q(__hw, __idx) … #define csio_q_type(__hw, __idx) … #define csio_q_pidx(__hw, __idx) … #define csio_q_cidx(__hw, __idx) … #define csio_q_inc_idx(__hw, __idx) … #define csio_q_vstart(__hw, __idx) … #define csio_q_pstart(__hw, __idx) … #define csio_q_size(__hw, __idx) … #define csio_q_credits(__hw, __idx) … #define csio_q_portid(__hw, __idx) … #define csio_q_wr_sz(__hw, __idx) … #define csio_q_iqid(__hw, __idx) … #define csio_q_physiqid(__hw, __idx) … #define csio_q_iq_flq_idx(__hw, __idx) … #define csio_q_eqid(__hw, __idx) … #define csio_q_flid(__hw, __idx) … #define csio_q_physeqid(__hw, __idx) … #define csio_iq_has_fl(__iq) … #define csio_q_iq_to_flid(__hw, __iq_idx) … #define csio_q_set_intr_map(__hw, __iq_idx, __rel_iq_id) … #define csio_q_eq_wrap(__hw, __idx) … struct csio_mb; int csio_wr_alloc_q(struct csio_hw *, uint32_t, uint32_t, uint16_t, void *, uint32_t, int, iq_handler_t); int csio_wr_iq_create(struct csio_hw *, void *, int, uint32_t, uint8_t, bool, void (*)(struct csio_hw *, struct csio_mb *)); int csio_wr_eq_create(struct csio_hw *, void *, int, int, uint8_t, void (*)(struct csio_hw *, struct csio_mb *)); int csio_wr_destroy_queues(struct csio_hw *, bool cmd); int csio_wr_get(struct csio_hw *, int, uint32_t, struct csio_wr_pair *); void csio_wr_copy_to_wrp(void *, struct csio_wr_pair *, uint32_t, uint32_t); int csio_wr_issue(struct csio_hw *, int, bool); int csio_wr_process_iq(struct csio_hw *, struct csio_q *, void (*)(struct csio_hw *, void *, uint32_t, struct csio_fl_dma_buf *, void *), void *); int csio_wr_process_iq_idx(struct csio_hw *, int, void (*)(struct csio_hw *, void *, uint32_t, struct csio_fl_dma_buf *, void *), void *); void csio_wr_sge_init(struct csio_hw *); int csio_wrm_init(struct csio_wrm *, struct csio_hw *); void csio_wrm_exit(struct csio_wrm *, struct csio_hw *); #endif /* ifndef __CSIO_WR_H__ */
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