/* * This is the Fusion MPT base driver providing common API layer interface * for access to MPT (Message Passing Technology) firmware. * * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h * Copyright (C) 2012-2014 LSI Corporation * Copyright (C) 2013-2014 Avago Technologies * (mailto: [email protected]) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * NO WARRANTY * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is * solely responsible for determining the appropriateness of using and * distributing the Program and assumes all risks associated with its * exercise of rights under this Agreement, including but not limited to * the risks and costs of program errors, damage to or loss of data, * programs or equipment, and unavailability or interruption of operations. * DISCLAIMER OF LIABILITY * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, * USA. */ #ifndef MPT3SAS_BASE_H_INCLUDED #define MPT3SAS_BASE_H_INCLUDED #include "mpi/mpi2_type.h" #include "mpi/mpi2.h" #include "mpi/mpi2_ioc.h" #include "mpi/mpi2_cnfg.h" #include "mpi/mpi2_init.h" #include "mpi/mpi2_raid.h" #include "mpi/mpi2_tool.h" #include "mpi/mpi2_sas.h" #include "mpi/mpi2_pci.h" #include "mpi/mpi2_image.h" #include <scsi/scsi.h> #include <scsi/scsi_cmnd.h> #include <scsi/scsi_device.h> #include <scsi/scsi_host.h> #include <scsi/scsi_tcq.h> #include <scsi/scsi_transport_sas.h> #include <scsi/scsi_dbg.h> #include <scsi/scsi_eh.h> #include <linux/pci.h> #include <linux/poll.h> #include <linux/irq_poll.h> #include "mpt3sas_debug.h" #include "mpt3sas_trigger_diag.h" #include "mpt3sas_trigger_pages.h" /* driver versioning info */ #define MPT3SAS_DRIVER_NAME … #define MPT3SAS_AUTHOR … #define MPT3SAS_DESCRIPTION … #define MPT3SAS_DRIVER_VERSION … #define MPT3SAS_MAJOR_VERSION … #define MPT3SAS_MINOR_VERSION … #define MPT3SAS_BUILD_VERSION … #define MPT3SAS_RELEASE_VERSION … #define MPT2SAS_DRIVER_NAME … #define MPT2SAS_DESCRIPTION … #define MPT2SAS_DRIVER_VERSION … #define MPT2SAS_MAJOR_VERSION … #define MPT2SAS_MINOR_VERSION … #define MPT2SAS_BUILD_VERSION … #define MPT2SAS_RELEASE_VERSION … /* CoreDump: Default timeout */ #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS … #define MPT3SAS_COREDUMP_LOOP_DONE … #define MPT3SAS_TIMESYNC_TIMEOUT_SECONDS … #define MPT3SAS_TIMESYNC_UPDATE_INTERVAL … #define MPT3SAS_TIMESYNC_UNIT_MASK … #define MPT3SAS_TIMESYNC_MASK … #define SECONDS_PER_MIN … #define SECONDS_PER_HOUR … #define MPT3SAS_COREDUMP_LOOP_DONE … #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP … /* * Set MPT3SAS_SG_DEPTH value based on user input. */ #define MPT_MAX_PHYS_SEGMENTS … #define MPT_MIN_PHYS_SEGMENTS … #define MPT_KDUMP_MIN_PHYS_SEGMENTS … #define MCPU_MAX_CHAINS_PER_IO … #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE #define MPT3SAS_SG_DEPTH … #else #define MPT3SAS_SG_DEPTH … #endif #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE #define MPT2SAS_SG_DEPTH … #else #define MPT2SAS_SG_DEPTH … #endif /* * Generic Defines */ #define MPT3SAS_SATA_QUEUE_DEPTH … #define MPT3SAS_SAS_QUEUE_DEPTH … #define MPT3SAS_RAID_QUEUE_DEPTH … #define MPT3SAS_KDUMP_SCSI_IO_DEPTH … #define MPT3SAS_RAID_MAX_SECTORS … #define MPT3SAS_HOST_PAGE_SIZE_4K … #define MPT3SAS_NVME_QUEUE_DEPTH … #define MPT_NAME_LENGTH … #define MPT_STRING_LENGTH … #define MPI_FRAME_START_OFFSET … #define REPLY_FREE_POOL_SIZE … #define MPT_MAX_CALLBACKS … #define MPT_MAX_HBA_NUM_PHYS … #define INTERNAL_CMDS_COUNT … /* reserved for issuing internally framed scsi io cmds */ #define INTERNAL_SCSIIO_CMDS_COUNT … #define MPI3_HIM_MASK … #define MPT3SAS_INVALID_DEVICE_HANDLE … #define MAX_CHAIN_ELEMT_SZ … #define DEFAULT_NUM_FWCHAIN_ELEMTS … #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT … #define FW_IMG_HDR_READ_TIMEOUT … #define IOC_OPERATIONAL_WAIT_COUNT … /* * NVMe defines */ #define NVME_PRP_SIZE … #define NVME_ERROR_RESPONSE_SIZE … #define NVME_TASK_ABORT_MIN_TIMEOUT … #define NVME_TASK_ABORT_MAX_TIMEOUT … #define NVME_TASK_MNGT_CUSTOM_MASK … #define NVME_PRP_PAGE_SIZE … struct mpt3sas_nvme_cmd { … }; /* * logging format */ #define ioc_err(ioc, fmt, ...) … #define ioc_notice(ioc, fmt, ...) … #define ioc_warn(ioc, fmt, ...) … #define ioc_info(ioc, fmt, ...) … /* * WarpDrive Specific Log codes */ #define MPT2_WARPDRIVE_LOGENTRY … #define MPT2_WARPDRIVE_LC_SSDT … #define MPT2_WARPDRIVE_LC_SSDLW … #define MPT2_WARPDRIVE_LC_SSDLF … #define MPT2_WARPDRIVE_LC_BRMF … /* * per target private data */ #define MPT_TARGET_FLAGS_RAID_COMPONENT … #define MPT_TARGET_FLAGS_VOLUME … #define MPT_TARGET_FLAGS_DELETED … #define MPT_TARGET_FASTPATH_IO … #define MPT_TARGET_FLAGS_PCIE_DEVICE … #define SAS2_PCI_DEVICE_B0_REVISION … #define SAS3_PCI_DEVICE_C0_REVISION … /* Atlas PCIe Switch Management Port */ #define MPI26_ATLAS_PCIe_SWITCH_DEVID … /* * Intel HBA branding */ #define MPT2SAS_INTEL_RMS25JB080_BRANDING … #define MPT2SAS_INTEL_RMS25JB040_BRANDING … #define MPT2SAS_INTEL_RMS25KB080_BRANDING … #define MPT2SAS_INTEL_RMS25KB040_BRANDING … #define MPT2SAS_INTEL_RMS25LB040_BRANDING … #define MPT2SAS_INTEL_RMS25LB080_BRANDING … #define MPT2SAS_INTEL_RMS2LL080_BRANDING … #define MPT2SAS_INTEL_RMS2LL040_BRANDING … #define MPT2SAS_INTEL_RS25GB008_BRANDING … #define MPT2SAS_INTEL_SSD910_BRANDING … #define MPT3SAS_INTEL_RMS3JC080_BRANDING … #define MPT3SAS_INTEL_RS3GC008_BRANDING … #define MPT3SAS_INTEL_RS3FC044_BRANDING … #define MPT3SAS_INTEL_RS3UC080_BRANDING … /* * Intel HBA SSDIDs */ #define MPT2SAS_INTEL_RMS25JB080_SSDID … #define MPT2SAS_INTEL_RMS25JB040_SSDID … #define MPT2SAS_INTEL_RMS25KB080_SSDID … #define MPT2SAS_INTEL_RMS25KB040_SSDID … #define MPT2SAS_INTEL_RMS25LB040_SSDID … #define MPT2SAS_INTEL_RMS25LB080_SSDID … #define MPT2SAS_INTEL_RMS2LL080_SSDID … #define MPT2SAS_INTEL_RMS2LL040_SSDID … #define MPT2SAS_INTEL_RS25GB008_SSDID … #define MPT2SAS_INTEL_SSD910_SSDID … #define MPT3SAS_INTEL_RMS3JC080_SSDID … #define MPT3SAS_INTEL_RS3GC008_SSDID … #define MPT3SAS_INTEL_RS3FC044_SSDID … #define MPT3SAS_INTEL_RS3UC080_SSDID … /* * Dell HBA branding */ #define MPT2SAS_DELL_BRANDING_SIZE … #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING … #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING … #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING … #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING … #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING … #define MPT2SAS_DELL_PERC_H200_BRANDING … #define MPT2SAS_DELL_6GBPS_SAS_BRANDING … #define MPT3SAS_DELL_12G_HBA_BRANDING … /* * Dell HBA SSDIDs */ #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID … #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID … #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID … #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID … #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID … #define MPT2SAS_DELL_PERC_H200_SSDID … #define MPT2SAS_DELL_6GBPS_SAS_SSDID … #define MPT3SAS_DELL_12G_HBA_SSDID … /* * Cisco HBA branding */ #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING … #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING … #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING … #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING … /* * Cisco HBA SSSDIDs */ #define MPT3SAS_CISCO_12G_8E_HBA_SSDID … #define MPT3SAS_CISCO_12G_8I_HBA_SSDID … #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID … #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID … /* * status bits for ioc->diag_buffer_status */ #define MPT3_DIAG_BUFFER_IS_REGISTERED … #define MPT3_DIAG_BUFFER_IS_RELEASED … #define MPT3_DIAG_BUFFER_IS_DIAG_RESET … #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED … #define MPT3_DIAG_BUFFER_IS_APP_OWNED … /* * HP HBA branding */ #define MPT2SAS_HP_3PAR_SSVID … #define MPT2SAS_HP_2_4_INTERNAL_BRANDING … #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING … #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING … #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING … #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING … /* * HO HBA SSDIDs */ #define MPT2SAS_HP_2_4_INTERNAL_SSDID … #define MPT2SAS_HP_2_4_EXTERNAL_SSDID … #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID … #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID … #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID … /* * Combined Reply Queue constants, * There are twelve Supplemental Reply Post Host Index Registers * and each register is at offset 0x10 bytes from the previous one. */ #define MAX_COMBINED_MSIX_VECTORS(gen35) … #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 … #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 … #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET … #define MPT3_MIN_IRQS … /* OEM Identifiers */ #define MFG10_OEM_ID_INVALID … #define MFG10_OEM_ID_DELL … #define MFG10_OEM_ID_FSC … #define MFG10_OEM_ID_SUN … #define MFG10_OEM_ID_IBM … /* GENERIC Flags 0*/ #define MFG10_GF0_OCE_DISABLED … #define MFG10_GF0_R1E_DRIVE_COUNT … #define MFG10_GF0_R10_DISPLAY … #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE … #define MFG10_GF0_SINGLE_DRIVE_R0 … #define VIRTUAL_IO_FAILED_RETRY … /* High IOPs definitions */ #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH … #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES … #define MPT3SAS_HIGH_IOPS_BATCH_COUNT … #define MPT3SAS_GEN35_MAX_MSIX_QUEUES … #define RDPQ_MAX_INDEX_IN_ONE_CHUNK … /* OEM Specific Flags will come from OEM specific header files */ struct Mpi2ManufacturingPage10_t { … }; /* Miscellaneous options */ struct Mpi2ManufacturingPage11_t { … }; /** * struct MPT3SAS_TARGET - starget private hostdata * @starget: starget object * @sas_address: target sas address * @raid_device: raid_device pointer to access volume data * @handle: device handle * @num_luns: number luns * @flags: MPT_TARGET_FLAGS_XXX flags * @deleted: target flaged for deletion * @tm_busy: target is busy with TM request. * @port: hba port entry containing target's port number info * @sas_dev: The sas_device associated with this target * @pcie_dev: The pcie device associated with this target */ struct MPT3SAS_TARGET { … }; /* * per device private data */ #define MPT_DEVICE_FLAGS_INIT … #define MFG_PAGE10_HIDE_SSDS_MASK … #define MFG_PAGE10_HIDE_ALL_DISKS … #define MFG_PAGE10_EXPOSE_ALL_DISKS … #define MFG_PAGE10_HIDE_IF_VOL_PRESENT … /** * struct MPT3SAS_DEVICE - sdev private hostdata * @sas_target: starget private hostdata * @lun: lun number * @flags: MPT_DEVICE_XXX flags * @configured_lun: lun is configured * @block: device is in SDEV_BLOCK state * @tlr_snoop_check: flag used in determining whether to disable TLR * @eedp_enable: eedp support enable bit * @eedp_type: 0(type_1), 1(type_2), 2(type_3) * @eedp_block_length: block size * @ata_command_pending: SATL passthrough outstanding for device */ struct MPT3SAS_DEVICE { … }; #define MPT3_CMD_NOT_USED … #define MPT3_CMD_COMPLETE … #define MPT3_CMD_PENDING … #define MPT3_CMD_REPLY_VALID … #define MPT3_CMD_RESET … #define MPT3_CMD_COMPLETE_ASYNC … /** * struct _internal_cmd - internal commands struct * @mutex: mutex * @done: completion * @reply: reply message pointer * @sense: sense data * @status: MPT3_CMD_XXX status * @smid: system message id */ struct _internal_cmd { … }; /** * struct _sas_device - attached device information * @list: sas device list * @starget: starget object * @sas_address: device sas address * @device_name: retrieved from the SAS IDENTIFY frame. * @handle: device handle * @sas_address_parent: sas address of parent expander or sas host * @enclosure_handle: enclosure handle * @enclosure_logical_id: enclosure logical identifier * @volume_handle: volume handle (valid when hidden raid member) * @volume_wwid: volume unique identifier * @device_info: bitfield provides detailed info about the device * @id: target id * @channel: target channel * @slot: number number * @phy: phy identifier provided in sas device page 0 * @responding: used in _scsih_sas_device_mark_responding * @fast_path: fast path feature enable bit * @pfa_led_on: flag for PFA LED status * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() * addition routine. * @chassis_slot: chassis slot * @is_chassis_slot_valid: chassis slot valid or not * @port: hba port entry containing device's port number info * @rphy: device's sas_rphy address used to identify this device structure in * target_alloc callback function */ struct _sas_device { … }; static inline void sas_device_get(struct _sas_device *s) { … } static inline void sas_device_free(struct kref *r) { … } static inline void sas_device_put(struct _sas_device *s) { … } /* * struct _pcie_device - attached PCIe device information * @list: pcie device list * @starget: starget object * @wwid: device WWID * @handle: device handle * @device_info: bitfield provides detailed info about the device * @id: target id * @channel: target channel * @slot: slot number * @port_num: port number * @responding: used in _scsih_pcie_device_mark_responding * @fast_path: fast path feature enable bit * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for * NVMe device only * @enclosure_handle: enclosure handle * @enclosure_logical_id: enclosure logical identifier * @enclosure_level: The level of device's enclosure from the controller * @connector_name: ASCII value of the Connector's name * @serial_number: pointer of serial number string allocated runtime * @access_status: Device's Access Status * @shutdown_latency: NVMe device's RTD3 Entry Latency * @refcount: reference count for deletion */ struct _pcie_device { … }; /** * pcie_device_get - Increment the pcie device reference count * * @p: pcie_device object * * When ever this function called it will increment the * reference count of the pcie device for which this function called. * */ static inline void pcie_device_get(struct _pcie_device *p) { … } /** * pcie_device_free - Release the pcie device object * @r - kref object * * Free's the pcie device object. It will be called when reference count * reaches to zero. */ static inline void pcie_device_free(struct kref *r) { … } /** * pcie_device_put - Decrement the pcie device reference count * * @p: pcie_device object * * When ever this function called it will decrement the * reference count of the pcie device for which this function called. * * When refernce count reaches to Zero, this will call pcie_device_free to the * pcie_device object. */ static inline void pcie_device_put(struct _pcie_device *p) { … } /** * struct _raid_device - raid volume link list * @list: sas device list * @starget: starget object * @sdev: scsi device struct (volumes are single lun) * @wwid: unique identifier for the volume * @handle: device handle * @block_size: Block size of the volume * @id: target id * @channel: target channel * @volume_type: the raid level * @device_info: bitfield provides detailed info about the hidden components * @num_pds: number of hidden raid components * @responding: used in _scsih_raid_device_mark_responding * @percent_complete: resync percent complete * @direct_io_enabled: Whether direct io to PDs are allowed or not * @stripe_exponent: X where 2powX is the stripe sz in blocks * @block_exponent: X where 2powX is the block sz in bytes * @max_lba: Maximum number of LBA in the volume * @stripe_sz: Stripe Size of the volume * @device_info: Device info of the volume member disk * @pd_handle: Array of handles of the physical drives for direct I/O in le16 */ #define MPT_MAX_WARPDRIVE_PDS … struct _raid_device { … }; /** * struct _boot_device - boot device info * * @channel: sas, raid, or pcie channel * @device: holds pointer for struct _sas_device, struct _raid_device or * struct _pcie_device */ struct _boot_device { … }; /** * struct _sas_port - wide/narrow sas port information * @port_list: list of ports belonging to expander * @num_phys: number of phys belonging to this port * @remote_identify: attached device identification * @rphy: sas transport rphy object * @port: sas transport wide/narrow port object * @hba_port: hba port entry containing port's port number info * @phy_list: _sas_phy list objects belonging to this port */ struct _sas_port { … }; /** * struct _sas_phy - phy information * @port_siblings: list of phys belonging to a port * @identify: phy identification * @remote_identify: attached device identification * @phy: sas transport phy object * @phy_id: unique phy id * @handle: device handle for this phy * @attached_handle: device handle for attached device * @phy_belongs_to_port: port has been created for this phy * @port: hba port entry containing port number info */ struct _sas_phy { … }; /** * struct _sas_node - sas_host/expander information * @list: list of expanders * @parent_dev: parent device class * @num_phys: number phys belonging to this sas_host/expander * @sas_address: sas address of this sas_host/expander * @handle: handle for this sas_host/expander * @sas_address_parent: sas address of parent expander or sas host * @enclosure_handle: handle for this a member of an enclosure * @device_info: bitwise defining capabilities of this sas_host/expander * @responding: used in _scsih_expander_device_mark_responding * @nr_phys_allocated: Allocated memory for this many count phys * @phy: a list of phys that make up this sas_host/expander * @sas_port_list: list of ports attached to this sas_host/expander * @port: hba port entry containing node's port number info * @rphy: sas_rphy object of this expander */ struct _sas_node { … }; /** * struct _enclosure_node - enclosure information * @list: list of enclosures * @pg0: enclosure pg0; */ struct _enclosure_node { … }; /** * enum reset_type - reset state * @FORCE_BIG_HAMMER: issue diagnostic reset * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer */ enum reset_type { … }; /** * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) * @pcie_sgl: PCIe native SGL for NVMe devices * @pcie_sgl_dma: physical address */ struct pcie_sg_list { … }; /** * struct chain_tracker - firmware chain tracker * @chain_buffer: chain buffer * @chain_buffer_dma: physical address * @tracker_list: list of free request (ioc->free_chain_list) */ struct chain_tracker { … }; struct chain_lookup { … }; /** * struct scsiio_tracker - scsi mf request tracker * @smid: system message id * @cb_idx: callback index * @direct_io: To indicate whether I/O is direct (WARPDRIVE) * @chain_list: list of associated firmware chain tracker * @msix_io: IO's msix */ struct scsiio_tracker { … }; /** * struct request_tracker - firmware request tracker * @smid: system message id * @cb_idx: callback index * @tracker_list: list of free request (ioc->free_list) */ struct request_tracker { … }; /** * struct _tr_list - target reset list * @handle: device handle * @state: state machine */ struct _tr_list { … }; /** * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list * @handle: device handle */ struct _sc_list { … }; /** * struct _event_ack_list - delayed event acknowledgment list * @Event: Event ID * @EventContext: used to track the event uniquely */ struct _event_ack_list { … }; /** * struct adapter_reply_queue - the reply queue struct * @ioc: per adapter object * @msix_index: msix index into vector table * @vector: irq vector * @reply_post_host_index: head index in the pool where FW completes IO * @reply_post_free: reply post base virt address * @name: the name registered to request_irq() * @busy: isr is actively processing replies on another cpu * @os_irq: irq number * @irqpoll: irq_poll object * @irq_poll_scheduled: Tells whether irq poll is scheduled or not * @is_iouring_poll_q: Tells whether reply queues is assigned * to io uring poll queues or not * @list: this list */ struct adapter_reply_queue { … }; /** * struct io_uring_poll_queue - the io uring poll queue structure * @busy: Tells whether io uring poll queue is busy or not * @pause: Tells whether IOs are paused on io uring poll queue or not * @reply_q: reply queue mapped for io uring poll queue */ struct io_uring_poll_queue { … }; MPT_ADD_SGE; /* SAS3.0 support */ MPT_BUILD_SG_SCMD; MPT_BUILD_SG; MPT_BUILD_ZERO_LEN_SGE; /* SAS3.5 support */ NVME_BUILD_PRP; /* To support atomic and non atomic descriptors*/ PUT_SMID_IO_FP_HIP; PUT_SMID_DEFAULT; BASE_READ_REG; /* * To get high iops reply queue's msix index when high iops mode is enabled * else get the msix index of general reply queues. */ GET_MSIX_INDEX; /* IOC Facts and Port Facts converted from little endian to cpu */ mpi3_version_union; struct mpt3sas_facts { … }; struct mpt3sas_port_facts { … }; struct reply_post_struct { … }; /** * struct virtual_phy - vSES phy structure * sas_address: SAS Address of vSES device * phy_mask: vSES device's phy number * flags: flags used to manage this structure */ struct virtual_phy { … }; #define MPT_VPHY_FLAG_DIRTY_PHY … /** * struct hba_port - Saves each HBA's Wide/Narrow port info * @sas_address: sas address of this wide/narrow port's attached device * @phy_mask: HBA PHY's belonging to this port * @port_id: port number * @flags: hba port flags * @vphys_mask : mask of vSES devices Phy number * @vphys_list : list containing vSES device structures */ struct hba_port { … }; /* hba port flags */ #define HBA_PORT_FLAG_DIRTY_PORT … #define HBA_PORT_FLAG_NEW_PORT … #define MULTIPATH_DISABLED_PORT_ID … /** * struct htb_rel_query - diagnostic buffer release reason * @unique_id - unique id associated with this buffer. * @buffer_rel_condition - Release condition ioctl/sysfs/reset * @reserved * @trigger_type - Master/Event/scsi/MPI * @trigger_info_dwords - Data Correspondig to trigger type */ struct htb_rel_query { … }; /* Buffer_rel_condition bit fields */ /* Bit 0 - Diag Buffer not Released */ #define MPT3_DIAG_BUFFER_NOT_RELEASED … /* Bit 0 - Diag Buffer Released */ #define MPT3_DIAG_BUFFER_RELEASED … /* * Bit 1 - Diag Buffer Released by IOCTL, * This bit is valid only if Bit 0 is one */ #define MPT3_DIAG_BUFFER_REL_IOCTL … /* * Bit 2 - Diag Buffer Released by Trigger, * This bit is valid only if Bit 0 is one */ #define MPT3_DIAG_BUFFER_REL_TRIGGER … /* * Bit 3 - Diag Buffer Released by SysFs, * This bit is valid only if Bit 0 is one */ #define MPT3_DIAG_BUFFER_REL_SYSFS … /* DIAG RESET Master trigger flags */ #define MPT_DIAG_RESET_ISSUED_BY_DRIVER … #define MPT_DIAG_RESET_ISSUED_BY_USER … MPT3SAS_FLUSH_RUNNING_CMDS; /** * struct MPT3SAS_ADAPTER - per adapter struct * @list: ioc_list * @shost: shost object * @id: unique adapter id * @cpu_count: number online cpus * @name: generic ioc string * @tmp_string: tmp string used for logging * @pdev: pci pdev object * @pio_chip: physical io register space * @chip: memory mapped register space * @chip_phys: physical addrss prior to mapping * @logging_level: see mpt3sas_debug.h * @fwfault_debug: debuging FW timeouts * @ir_firmware: IR firmware present * @bars: bitmask of BAR's that must be configured * @mask_interrupts: ignore interrupt * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and * pci resource handling * @fault_reset_work_q_name: fw fault work queue * @fault_reset_work_q: "" * @fault_reset_work: "" * @firmware_event_thread: fw event work queue * @fw_event_lock: * @fw_event_list: list of fw events * @current_evet: current processing firmware event * @fw_event_cleanup: set to one while cleaning up the fw events * @aen_event_read_flag: event log was read * @broadcast_aen_busy: broadcast aen waiting to be serviced * @shost_recovery: host reset in progress * @ioc_reset_in_progress_lock: * @ioc_link_reset_in_progress: phy/hard reset in progress * @ignore_loginfos: ignore loginfos during task management * @remove_host: flag for when driver unloads, to avoid sending dev resets * @pci_error_recovery: flag to prevent ioc access until slot reset completes * @wait_for_discovery_to_complete: flag set at driver load time when * waiting on reporting devices * @is_driver_loading: flag set at driver load time * @port_enable_failed: flag set when port enable has failed * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work * @start_scan_failed: means port enable failed, return's the ioc_status * @msix_enable: flag indicating msix is enabled * @msix_vector_count: number msix vectors * @cpu_msix_table: table for mapping cpus to msix index * @cpu_msix_table_sz: table size * @total_io_cnt: Gives total IO count, used to load balance the interrupts * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state * @timestamp_update_count: Counter to fire timeSync command * time_sync_interval: Time sync interval read from man page 11 * @high_iops_outstanding: used to load balance the interrupts * within high iops reply queues * @msix_load_balance: Enables load balancing of interrupts across * the multiple MSIXs * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands * @thresh_hold: Max number of reply descriptors processed * before updating Host Index * @iopoll_q_start_index: starting index of io uring poll queues * in reply queue list * @drv_internal_flags: Bit map internal to driver * @drv_support_bitmap: driver's supported feature bit map * @use_32bit_dma: Flag to use 32 bit consistent dma mask * @scsi_io_cb_idx: shost generated commands * @tm_cb_idx: task management commands * @scsih_cb_idx: scsih internal commands * @transport_cb_idx: transport internal commands * @ctl_cb_idx: clt internal commands * @base_cb_idx: base internal commands * @config_cb_idx: base internal commands * @tm_tr_cb_idx : device removal target reset handshake * @tm_tr_volume_cb_idx : volume removal target reset * @base_cmds: * @transport_cmds: * @scsih_cmds: * @tm_cmds: * @ctl_cmds: * @config_cmds: * @base_add_sg_single: handler for either 32/64 bit sgl's * @event_type: bits indicating which events to log * @event_context: unique id for each logged event * @event_log: event log pointer * @event_masks: events that are masked * @max_shutdown_latency: timeout value for NVMe shutdown operation, * which is equal that NVMe drive's RTD3 Entry Latency * which has reported maximum RTD3 Entry Latency value * among attached NVMe drives. * @facts: static facts data * @prev_fw_facts: previous fw facts data * @pfacts: static port facts data * @manu_pg0: static manufacturing page 0 * @manu_pg10: static manufacturing page 10 * @manu_pg11: static manufacturing page 11 * @bios_pg2: static bios page 2 * @bios_pg3: static bios page 3 * @ioc_pg8: static ioc page 8 * @iounit_pg0: static iounit page 0 * @iounit_pg1: static iounit page 1 * @sas_hba: sas host object * @sas_expander_list: expander object list * @enclosure_list: enclosure object list * @sas_node_lock: * @sas_device_list: sas device object list * @sas_device_init_list: sas device object list (used only at init time) * @sas_device_lock: * @pcie_device_list: pcie device object list * @pcie_device_init_list: pcie device object list (used only at init time) * @pcie_device_lock: * @io_missing_delay: time for IO completed by fw when PDR enabled * @device_missing_delay: time for device missing by fw when PDR enabled * @sas_id : used for setting volume target IDs * @pcie_target_id: used for setting pcie target IDs * @blocking_handles: bitmask used to identify which devices need blocking * @pd_handles : bitmask for PD handles * @pd_handles_sz : size of pd_handle bitmask * @config_page_sz: config page size * @config_page: reserve memory for config page payload * @config_page_dma: * @hba_queue_depth: hba request queue depth * @sge_size: sg element size for either 32/64 bit * @scsiio_depth: SCSI_IO queue depth * @request_sz: per request frame size * @request: pool of request frames * @request_dma: * @request_dma_sz: * @scsi_lookup: firmware request tracker list * @scsi_lookup_lock: * @free_list: free list of request * @pending_io_count: * @reset_wq: * @chain: pool of chains * @chain_dma: * @max_sges_in_main_message: number sg elements in main message * @max_sges_in_chain_message: number sg elements per chain * @chains_needed_per_io: max chains per io * @chain_depth: total chains allocated * @chain_segment_sz: gives the max number of * SGEs accommodate on single chain buffer * @hi_priority_smid: * @hi_priority: * @hi_priority_dma: * @hi_priority_depth: * @hpr_lookup: * @hpr_free_list: * @internal_smid: * @internal: * @internal_dma: * @internal_depth: * @internal_lookup: * @internal_free_list: * @sense: pool of sense * @sense_dma: * @sense_dma_pool: * @reply_depth: hba reply queue depth: * @reply_sz: per reply frame size: * @reply: pool of replys: * @reply_dma: * @reply_dma_pool: * @reply_free_queue_depth: reply free depth * @reply_free: pool for reply free queue (32 bit addr) * @reply_free_dma: * @reply_free_dma_pool: * @reply_free_host_index: tail index in pool to insert free replys * @reply_post_queue_depth: reply post queue depth * @reply_post_struct: struct for reply_post_free physical & virt address * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init * @rdpq_array_enable: rdpq_array support is enabled in the driver * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag * is assigned only ones * @reply_queue_count: number of reply queue's * @reply_queue_list: link list contaning the reply queue info * @msix96_vector: 96 MSI-X vector support * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue * @delayed_tr_list: target reset link list * @delayed_tr_volume_list: volume target reset link list * @delayed_sc_list: * @delayed_event_ack_list: * @temp_sensors_count: flag to carry the number of temperature sensors * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and * pci resource handling. PCI resource freeing will lead to free * vital hardware/memory resource, which might be in use by cli/sysfs * path functions resulting in Null pointer reference followed by kernel * crash. To avoid the above race condition we use mutex syncrhonization * which ensures the syncrhonization between cli/sysfs_show path. * @atomic_desc_capable: Atomic Request Descriptor support. * @GET_MSIX_INDEX: Get the msix index of high iops queues. * @multipath_on_hba: flag to determine multipath on hba is enabled or not * @port_table_list: list containing HBA's wide/narrow port's info */ struct MPT3SAS_ADAPTER { … }; struct mpt3sas_debugfs_buffer { … }; #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE … #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY … #define MPT_DRV_INTERNAL_FIRST_PE_ISSUED … MPT_CALLBACK; /* * struct ATTO_SAS_NVRAM - ATTO NVRAM settings stored * in Manufacturing page 1 used to get * ATTO SasAddr. */ struct ATTO_SAS_NVRAM { … }; #define ATTO_SAS_ADDR_DEVNAME_BIAS … ATTO_SAS_ADDRESS; /* base shared API */ extern struct list_head mpt3sas_ioc_list; extern char driver_name[MPT_NAME_LENGTH]; /* spinlock on list operations over IOCs * Case: when multiple warpdrive cards(IOCs) are in use * Each IOC will added to the ioc list structure on initialization. * Watchdog threads run at regular intervals to check IOC for any * fault conditions which will trigger the dead_ioc thread to * deallocate pci resource, resulting deleting the IOC netry from list, * this deletion need to protected by spinlock to enusre that * ioc removal is syncrhonized, if not synchronized it might lead to * list_del corruption as the ioc list is traversed in cli path. */ extern spinlock_t gioc_lock; void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc); int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, enum reset_type type); void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll); void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle); void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 msix_task); void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid); void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid); /* hi-priority queue */ u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, struct scsi_cmnd *scmd); void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, struct scsiio_tracker *st); u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); void mpt3sas_base_initialize_callback_handler(void); u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); void mpt3sas_base_release_callback_handler(u8 cb_idx); u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply); u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply); void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr); u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); #define mpt3sas_print_fault_code(ioc, fault_code) … void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code); #define mpt3sas_print_coredump_info(ioc, fault_code) … int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc, const char *caller); int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, Mpi2SasIoUnitControlReply_t *mpi_reply, Mpi2SasIoUnitControlRequest_t *mpi_request); int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type); void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, u16 device_missing_delay, u8 io_missing_delay); int mpt3sas_base_check_for_fault_and_issue_reset( struct MPT3SAS_ADAPTER *ioc); int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc); u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc, u8 status, void *mpi_request, int sz); #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) … int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count); int mpt3sas_base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, enum reset_type type); void mpt3sas_base_free_irq(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_disable_msix(struct MPT3SAS_ADAPTER *ioc); int mpt3sas_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num); void mpt3sas_base_pause_mq_polling(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_base_resume_mq_polling(struct MPT3SAS_ADAPTER *ioc); int mpt3sas_base_unlock_and_get_host_diagnostic(struct MPT3SAS_ADAPTER *ioc, u32 *host_diagnostic); void mpt3sas_base_lock_host_diagnostic(struct MPT3SAS_ADAPTER *ioc); /* scsih shared API */ struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, u16 smid); u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply); void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_scsih_clear_outstanding_scsi_tm_commands( struct MPT3SAS_ADAPTER *ioc); void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc); int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, uint channel, uint id, u64 lun, u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method); int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, uint channel, uint id, u64 lun, u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method); void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, struct hba_port *port); void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, struct hba_port *port); u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, u16 smid); struct hba_port * mpt3sas_get_port_by_id(struct MPT3SAS_ADAPTER *ioc, u8 port, u8 bypass_dirty_port_flag); struct _sas_node *mpt3sas_scsih_expander_find_by_handle( struct MPT3SAS_ADAPTER *ioc, u16 handle); struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( struct MPT3SAS_ADAPTER *ioc, u64 sas_address, struct hba_port *port); struct _sas_device *mpt3sas_get_sdev_by_addr( struct MPT3SAS_ADAPTER *ioc, u64 sas_address, struct hba_port *port); struct _sas_device *__mpt3sas_get_sdev_by_addr( struct MPT3SAS_ADAPTER *ioc, u64 sas_address, struct hba_port *port); struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); struct _raid_device * mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth); struct _sas_device * __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy); struct virtual_phy * mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc, struct hba_port *port, u32 phy); /* config shared API */ u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply); int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, u8 *num_phys); int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); int mpt3sas_config_get_manufacturing_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage1_t *config_page); int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, u16 sz); int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, struct Mpi2ManufacturingPage10_t *config_page); int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, struct Mpi2ManufacturingPage11_t *config_page); int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, struct Mpi2ManufacturingPage11_t *config_page); int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage2_t *config_page); int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage3_t *config_page); int mpt3sas_config_set_bios_pg4(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage4_t *config_page, int sz_config_page); int mpt3sas_config_get_bios_pg4(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage4_t *config_page, int sz_config_page); int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage0_t *config_page); int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_pcie_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeIOUnitPage1_t *config_page, u16 sz); int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, u16 sz); int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage1_t *config_page); int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage1_t *config_page); int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page); int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz); int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz); int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOCPage1_t *config_page); int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOCPage1_t *config_page); int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2IOCPage8_t *config_page); int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, u32 phy_number, u16 handle); int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, u32 handle); int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, u8 *num_pds); int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, u32 handle, u16 sz); int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, u32 form, u32 form_specific); int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, u16 *volume_handle); int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, u16 volume_handle, u64 *wwid); int mpt3sas_config_get_driver_trigger_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage0_t *config_page); int mpt3sas_config_get_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage1_t *config_page); int mpt3sas_config_get_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage2_t *config_page); int mpt3sas_config_get_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage3_t *config_page); int mpt3sas_config_get_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage4_t *config_page); int mpt3sas_config_update_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc, struct SL_WH_MASTER_TRIGGER_T *master_tg, bool set); int mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc, struct SL_WH_EVENT_TRIGGERS_T *event_tg, bool set); int mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc, struct SL_WH_SCSI_TRIGGERS_T *scsi_tg, bool set); int mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc, struct SL_WH_MPI_TRIGGERS_T *mpi_tg, bool set); /* ctl shared API */ extern const struct attribute_group *mpt3sas_host_groups[]; extern const struct attribute_group *mpt3sas_dev_groups[]; void mpt3sas_ctl_init(ushort hbas_to_enumerate); void mpt3sas_ctl_exit(ushort hbas_to_enumerate); void mpt3sas_ctl_release(struct MPT3SAS_ADAPTER *ioc); u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply); void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc); u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply); void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, Mpi2EventNotificationReply_t *mpi_reply); void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, u8 bits_to_register); int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, u8 *issue_reset); /* transport shared API */ extern struct scsi_transport_template *mpt3sas_transport_template; u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply); struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 sas_address, struct hba_port *port); void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, u64 sas_address_parent, struct hba_port *port); int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, struct device *parent_dev); void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, u16 handle, u8 phy_number, u8 link_rate, struct hba_port *port); extern struct sas_function_template mpt3sas_transport_functions; extern struct scsi_transport_template *mpt3sas_transport_template; void mpt3sas_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc, struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy); void mpt3sas_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc, struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy, u64 sas_address, struct hba_port *port); /* trigger data externs */ void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, u32 trigger_bitmask); void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, u16 log_entry_qualifier); void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, u8 asc, u8 ascq); void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, u32 loginfo); /* warpdrive APIs */ u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, struct _raid_device *raid_device); void mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request); void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc); void mpt3sas_init_debugfs(void); void mpt3sas_exit_debugfs(void); /** * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device * @device_info: bitfield providing information about the device. * Context: none * * Returns 1 if scsi device. */ static inline int mpt3sas_scsih_is_pcie_scsi_device(u32 device_info) { … } #endif /* MPT3SAS_BASE_H_INCLUDED */
Codebase Browser
linux