/* * This file is part of the Chelsio T4 Ethernet driver for Linux. * * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef __CXGB4_H__ #define __CXGB4_H__ #include "t4_hw.h" #include <linux/bitops.h> #include <linux/cache.h> #include <linux/ethtool.h> #include <linux/interrupt.h> #include <linux/list.h> #include <linux/netdevice.h> #include <linux/pci.h> #include <linux/spinlock.h> #include <linux/timer.h> #include <linux/vmalloc.h> #include <linux/rhashtable.h> #include <linux/etherdevice.h> #include <linux/net_tstamp.h> #include <linux/ptp_clock_kernel.h> #include <linux/ptp_classify.h> #include <linux/crash_dump.h> #include <linux/thermal.h> #include <asm/io.h> #include "t4_chip_type.h" #include "cxgb4_uld.h" #include "t4fw_api.h" #define CH_WARN(adap, fmt, ...) … extern struct list_head adapter_list; extern struct list_head uld_list; extern struct mutex uld_mutex; /* Suspend an Ethernet Tx queue with fewer available descriptors than this. * This is the same as calc_tx_descs() for a TSO packet with * nr_frags == MAX_SKB_FRAGS. */ #define ETHTXQ_STOP_THRES … #define FW_PARAM_DEV(param) … #define FW_PARAM_PFVF(param) … enum { … }; enum { … }; enum { … }; enum { … }; enum dev_master { … }; enum dev_state { … }; enum cc_pause { … }; enum cc_fec { … }; enum { … }; enum cxgb4_netdev_tls_ops { … }; struct cxgb4_bootcfg_data { … }; struct cxgb4_pcir_data { … }; /* BIOS boot headers */ struct cxgb4_pci_exp_rom_header { … }; /* Legacy PCI Expansion ROM Header */ struct legacy_pci_rom_hdr { … }; #define CXGB4_HDR_CODE1 … #define CXGB4_HDR_CODE2 … #define CXGB4_HDR_INDI … /* BOOT constants */ enum { … }; struct port_stats { … }; struct lb_port_stats { … }; struct tp_tcp_stats { … }; struct tp_usm_stats { … }; struct tp_fcoe_stats { … }; struct tp_err_stats { … }; struct tp_cpl_stats { … }; struct tp_rdma_stats { … }; struct sge_params { … }; struct tp_params { … }; struct vpd_params { … }; /* Maximum resources provisioned for a PCI PF. */ struct pf_resources { … }; struct pci_params { … }; struct devlog_params { … }; /* Stores chip specific parameters */ struct arch_specific_params { … }; struct adapter_params { … }; /* State needed to monitor the forward progress of SGE Ingress DMA activities * and possible hangs. */ struct sge_idma_monitor_state { … }; /* Firmware Mailbox Command/Reply log. All values are in Host-Endian format. * The access and execute times are signed in order to accommodate negative * error returns. */ struct mbox_cmd { … }; struct mbox_cmd_log { … }; /* Given a pointer to a Firmware Mailbox Command Log and a log entry index, * return a pointer to the specified entry. */ static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log, unsigned int entry_idx) { … } #define FW_VERSION(chip) … #define FW_INTFVER(chip, intf) … struct cxgb4_ethtool_lb_test { … }; struct fw_info { … }; struct trace_params { … }; struct cxgb4_fw_data { … }; /* Firmware Port Capabilities types. */ fw_port_cap16_t; /* 16-bit Port Capabilities integral value */ fw_port_cap32_t; /* 32-bit Port Capabilities integral value */ enum fw_caps { … }; struct link_config { … }; #define FW_LEN16(fw_struct) … enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; #define PRIV_FLAG_PORT_TX_VM … #define PRIV_FLAGS_ADAP … #define PRIV_FLAGS_PORT … struct adapter; struct sge_rspq; #include "cxgb4_dcb.h" #ifdef CONFIG_CHELSIO_T4_FCOE #include "cxgb4_fcoe.h" #endif /* CONFIG_CHELSIO_T4_FCOE */ struct port_info { … }; struct dentry; struct work_struct; enum { … }; enum { … }; #define CXGB4_MIRROR_RXQ_DEFAULT_DESC_NUM … #define CXGB4_MIRROR_RXQ_DEFAULT_DESC_SIZE … #define CXGB4_MIRROR_RXQ_DEFAULT_INTR_USEC … #define CXGB4_MIRROR_RXQ_DEFAULT_PKT_CNT … #define CXGB4_MIRROR_FLQ_DEFAULT_DESC_NUM … struct rx_sw_desc; struct sge_fl { … }; /* A packet gather list */ struct pkt_gl { … }; rspq_handler_t; rspq_flush_handler_t; /* LRO related declarations for ULD */ struct t4_lro_mgr { … }; struct sge_rspq { … }; struct sge_eth_stats { … }; struct sge_eth_rxq { … } ____cacheline_aligned_in_smp; struct sge_ofld_stats { … }; struct sge_ofld_rxq { … } ____cacheline_aligned_in_smp; struct tx_desc { … }; struct ulptx_sgl; struct tx_sw_desc { … }; struct sge_txq { … }; struct sge_eth_txq { … } ____cacheline_aligned_in_smp; struct sge_uld_txq { … } ____cacheline_aligned_in_smp; struct sge_ctrl_txq { … } ____cacheline_aligned_in_smp; struct sge_uld_rxq_info { … }; struct sge_uld_txq_info { … }; /* struct to maintain ULD list to reallocate ULD resources on hotplug */ struct cxgb4_uld_list { … }; enum sge_eosw_state { … }; struct sge_eosw_txq { … }; struct sge_eohw_txq { … }; struct sge { … }; #define for_each_ethrxq(sge, i) … #define for_each_ofldtxq(sge, i) … struct l2t_data; #ifdef CONFIG_PCI_IOV /* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial * Configuration initialization for T5 only has SR-IOV functionality enabled * on PF0-3 in order to simplify everything. */ #define NUM_OF_PF_WITH_SRIOV … #endif struct doorbell_stats { … }; struct hash_mac_addr { … }; struct msix_bmap { … }; struct msix_info { … }; struct vf_info { … }; enum { … }; struct hma_data { … }; struct mbox_list { … }; #if IS_ENABLED(CONFIG_THERMAL) struct ch_thermal { … }; #endif struct mps_entries_ref { … }; struct cxgb4_ethtool_filter_info { … }; struct cxgb4_ethtool_filter { … }; struct adapter { … }; /* Support for "sched-class" command to allow a TX Scheduling Class to be * programmed with various parameters. */ struct ch_sched_params { … }; enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; /* Support for "sched_queue" command to allow one or more NIC TX Queues * to be bound to a TX Scheduling Class. */ struct ch_sched_queue { … }; /* Support for "sched_flowc" command to allow one or more FLOWC * to be bound to a TX Scheduling Class. */ struct ch_sched_flowc { … }; /* Defined bit width of user definable filter tuples */ #define ETHTYPE_BITWIDTH … #define FRAG_BITWIDTH … #define MACIDX_BITWIDTH … #define FCOE_BITWIDTH … #define IPORT_BITWIDTH … #define MATCHTYPE_BITWIDTH … #define PROTO_BITWIDTH … #define TOS_BITWIDTH … #define PF_BITWIDTH … #define VF_BITWIDTH … #define IVLAN_BITWIDTH … #define OVLAN_BITWIDTH … #define ENCAP_VNI_BITWIDTH … /* Filter matching rules. These consist of a set of ingress packet field * (value, mask) tuples. The associated ingress packet field matches the * tuple when ((field & mask) == value). (Thus a wildcard "don't care" field * rule can be constructed by specifying a tuple of (0, 0).) A filter rule * matches an ingress packet when all of the individual individual field * matching rules are true. * * Partial field masks are always valid, however, while it may be easy to * understand their meanings for some fields (e.g. IP address to match a * subnet), for others making sensible partial masks is less intuitive (e.g. * MPS match type) ... * * Most of the following data structures are modeled on T4 capabilities. * Drivers for earlier chips use the subsets which make sense for those chips. * We really need to come up with a hardware-independent mechanism to * represent hardware filter capabilities ... */ struct ch_filter_tuple { … }; /* A filter ioctl command. */ struct ch_filter_specification { … }; enum { … }; enum { … }; enum { … }; #define CXGB4_FILTER_TYPE_MAX … /* Host shadow copy of ingress filter entry. This is in host native format * and doesn't match the ordering or bit order, etc. of the hardware of the * firmware command. The use of bit-field structure elements is purely to * remind ourselves of the field size limitations and save memory in the case * where the filter table is large. */ struct filter_entry { … }; static inline int is_offload(const struct adapter *adap) { … } static inline int is_hashfilter(const struct adapter *adap) { … } static inline int is_pci_uld(const struct adapter *adap) { … } static inline int is_uld(const struct adapter *adap) { … } static inline int is_ethofld(const struct adapter *adap) { … } static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) { … } static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val) { … } #ifndef readq static inline u64 readq(const volatile void __iomem *addr) { return readl(addr) + ((u64)readl(addr + 4) << 32); } static inline void writeq(u64 val, volatile void __iomem *addr) { writel(val, addr); writel(val >> 32, addr + 4); } #endif static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr) { … } static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val) { … } /** * t4_set_hw_addr - store a port's MAC address in SW * @adapter: the adapter * @port_idx: the port index * @hw_addr: the Ethernet address * * Store the Ethernet address of the given port in SW. Called by the common * code when it retrieves a port's Ethernet address from EEPROM. */ static inline void t4_set_hw_addr(struct adapter *adapter, int port_idx, u8 hw_addr[]) { … } /** * netdev2pinfo - return the port_info structure associated with a net_device * @dev: the netdev * * Return the struct port_info associated with a net_device */ static inline struct port_info *netdev2pinfo(const struct net_device *dev) { … } /** * adap2pinfo - return the port_info of a port * @adap: the adapter * @idx: the port index * * Return the port_info structure for the port of the given index. */ static inline struct port_info *adap2pinfo(struct adapter *adap, int idx) { … } /** * netdev2adap - return the adapter structure associated with a net_device * @dev: the netdev * * Return the struct adapter associated with a net_device */ static inline struct adapter *netdev2adap(const struct net_device *dev) { … } /* Return a version number to identify the type of adapter. The scheme is: * - bits 0..9: chip version * - bits 10..15: chip revision * - bits 16..23: register dump version */ static inline unsigned int mk_adap_vers(struct adapter *ap) { … } /* Return a queue's interrupt hold-off time in us. 0 means no timer. */ static inline unsigned int qtimer_val(const struct adapter *adap, const struct sge_rspq *q) { … } /* driver name used for ethtool_drvinfo */ extern char cxgb4_driver_name[]; void t4_os_portmod_changed(struct adapter *adap, int port_id); void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat); void t4_free_sge_resources(struct adapter *adap); void t4_free_ofld_rxqs(struct adapter *adap, int n, struct sge_ofld_rxq *q); irq_handler_t t4_intr_handler(struct adapter *adap); netdev_tx_t t4_start_xmit(struct sk_buff *skb, struct net_device *dev); int cxgb4_selftest_lb_pkt(struct net_device *netdev); int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp, const struct pkt_gl *gl); int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb); int t4_ofld_send(struct adapter *adap, struct sk_buff *skb); int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, struct net_device *dev, int intr_idx, struct sge_fl *fl, rspq_handler_t hnd, rspq_flush_handler_t flush_handler, int cong); int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, struct net_device *dev, struct netdev_queue *netdevq, unsigned int iqid, u8 dbqt); int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq, struct net_device *dev, unsigned int iqid, unsigned int cmplqid); int t4_sge_mod_ctrl_txq(struct adapter *adap, unsigned int eqid, unsigned int cmplqid); int t4_sge_alloc_uld_txq(struct adapter *adap, struct sge_uld_txq *txq, struct net_device *dev, unsigned int iqid, unsigned int uld_type); int t4_sge_alloc_ethofld_txq(struct adapter *adap, struct sge_eohw_txq *txq, struct net_device *dev, u32 iqid); void t4_sge_free_ethofld_txq(struct adapter *adap, struct sge_eohw_txq *txq); irqreturn_t t4_sge_intr_msix(int irq, void *cookie); int t4_sge_init(struct adapter *adap); void t4_sge_start(struct adapter *adap); void t4_sge_stop(struct adapter *adap); int t4_sge_eth_txq_egress_update(struct adapter *adap, struct sge_eth_txq *q, int maxreclaim); void cxgb4_set_ethtool_ops(struct net_device *netdev); int cxgb4_write_rss(const struct port_info *pi, const u16 *queues); enum cpl_tx_tnl_lso_type cxgb_encap_offload_supported(struct sk_buff *skb); extern int dbfifo_int_thresh; #define for_each_port(adapter, iter) … static inline int is_bypass(struct adapter *adap) { … } static inline int is_bypass_device(int device) { … } static inline int is_10gbt_device(int device) { … } static inline unsigned int core_ticks_per_usec(const struct adapter *adap) { … } static inline unsigned int us_to_core_ticks(const struct adapter *adap, unsigned int us) { … } static inline unsigned int core_ticks_to_us(const struct adapter *adapter, unsigned int ticks) { … } static inline unsigned int dack_ticks_to_usec(const struct adapter *adap, unsigned int ticks) { … } void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val); int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl, bool sleep_ok, int timeout); int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl, bool sleep_ok); static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl, int timeout) { … } static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl) { … } static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl) { … } /** * hash_mac_addr - return the hash value of a MAC address * @addr: the 48-bit Ethernet MAC address * * Hashes a MAC address according to the hash function used by HW inexact * (hash) address matching. */ static inline int hash_mac_addr(const u8 *addr) { … } int cxgb4_set_rspq_intr_params(struct sge_rspq *q, unsigned int us, unsigned int cnt); static inline void init_rspq(struct adapter *adap, struct sge_rspq *q, unsigned int us, unsigned int cnt, unsigned int size, unsigned int iqe_size) { … } /** * t4_is_inserted_mod_type - is a plugged in Firmware Module Type * @fw_mod_type: the Firmware Mofule Type * * Return whether the Firmware Module Type represents a real Transceiver * Module/Cable Module Type which has been inserted. */ static inline bool t4_is_inserted_mod_type(unsigned int fw_mod_type) { … } void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, unsigned int data_reg, const u32 *vals, unsigned int nregs, unsigned int start_idx); void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, unsigned int data_reg, u32 *vals, unsigned int nregs, unsigned int start_idx); void t4_hw_pci_read_cfg4(struct adapter *adapter, int reg, u32 *val); struct fw_filter_wr; void t4_intr_enable(struct adapter *adapter); void t4_intr_disable(struct adapter *adapter); int t4_slow_intr_handler(struct adapter *adapter); int t4_wait_dev_ready(void __iomem *regs); fw_port_cap32_t t4_link_acaps(struct adapter *adapter, unsigned int port, struct link_config *lc); int t4_link_l1cfg_core(struct adapter *adap, unsigned int mbox, unsigned int port, struct link_config *lc, u8 sleep_ok, int timeout); static inline int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox, unsigned int port, struct link_config *lc) { … } static inline int t4_link_l1cfg_ns(struct adapter *adapter, unsigned int mbox, unsigned int port, struct link_config *lc) { … } int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); u32 t4_read_pcie_cfg4(struct adapter *adap, int reg); u32 t4_get_util_window(struct adapter *adap); void t4_setup_memwin(struct adapter *adap, u32 memwin_base, u32 window); int t4_memory_rw_init(struct adapter *adap, int win, int mtype, u32 *mem_off, u32 *mem_base, u32 *mem_aperture); void t4_memory_update_win(struct adapter *adap, int win, u32 addr); void t4_memory_rw_residual(struct adapter *adap, u32 off, u32 addr, u8 *buf, int dir); #define T4_MEMORY_WRITE … #define T4_MEMORY_READ … int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, u32 len, void *buf, int dir); static inline int t4_memory_write(struct adapter *adap, int mtype, u32 addr, u32 len, __be32 *buf) { … } unsigned int t4_get_regs_len(struct adapter *adapter); void t4_get_regs(struct adapter *adap, void *buf, size_t buf_size); int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); int t4_seeprom_wp(struct adapter *adapter, bool enable); int t4_get_raw_vpd_params(struct adapter *adapter, struct vpd_params *p); int t4_get_vpd_params(struct adapter *adapter, struct vpd_params *p); int t4_get_pfres(struct adapter *adapter); int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords, u32 *data, int byte_oriented); int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); int t4_load_phy_fw(struct adapter *adap, int win, int (*phy_fw_version)(const u8 *, size_t), const u8 *phy_fw_data, size_t phy_fw_size); int t4_phy_fw_ver(struct adapter *adap, int *phy_fw_ver); int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op); int t4_fw_upgrade(struct adapter *adap, unsigned int mbox, const u8 *fw_data, unsigned int size, int force); int t4_fl_pkt_align(struct adapter *adap); unsigned int t4_flash_cfg_addr(struct adapter *adapter); int t4_check_fw_version(struct adapter *adap); int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); int t4_get_fw_version(struct adapter *adapter, u32 *vers); int t4_get_bs_version(struct adapter *adapter, u32 *vers); int t4_get_tp_version(struct adapter *adapter, u32 *vers); int t4_get_exprom_version(struct adapter *adapter, u32 *vers); int t4_get_scfg_version(struct adapter *adapter, u32 *vers); int t4_get_vpd_version(struct adapter *adapter, u32 *vers); int t4_get_version_info(struct adapter *adapter); void t4_dump_version_info(struct adapter *adapter); int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, const u8 *fw_data, unsigned int fw_size, struct fw_hdr *card_fw, enum dev_state state, int *reset); int t4_prep_adapter(struct adapter *adapter); int t4_shutdown_adapter(struct adapter *adapter); enum t4_bar2_qtype { … }; int t4_bar2_sge_qregs(struct adapter *adapter, unsigned int qid, enum t4_bar2_qtype qtype, int user, u64 *pbar2_qoffset, unsigned int *pbar2_qid); unsigned int qtimer_val(const struct adapter *adap, const struct sge_rspq *q); int t4_init_devlog_params(struct adapter *adapter); int t4_init_sge_params(struct adapter *adapter); int t4_init_tp_params(struct adapter *adap, bool sleep_ok); int t4_filter_field_shift(const struct adapter *adap, int filter_sel); int t4_init_rss_mode(struct adapter *adap, int mbox); int t4_init_portinfo(struct port_info *pi, int mbox, int port, int pf, int vf, u8 mac[]); int t4_port_init(struct adapter *adap, int mbox, int pf, int vf); int t4_init_port_mirror(struct port_info *pi, u8 mbox, u8 port, u8 pf, u8 vf, u16 *mirror_viid); void t4_fatal_err(struct adapter *adapter); unsigned int t4_chip_rss_size(struct adapter *adapter); int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, int start, int n, const u16 *rspq, unsigned int nrspq); int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, unsigned int flags); int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, unsigned int flags, unsigned int defq); int t4_read_rss(struct adapter *adapter, u16 *entries); void t4_read_rss_key(struct adapter *adapter, u32 *key, bool sleep_ok); void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx, bool sleep_ok); void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp, bool sleep_ok); void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, u32 *vfl, u32 *vfh, bool sleep_ok); u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok); u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok); unsigned int t4_get_mps_bg_map(struct adapter *adapter, int pidx); unsigned int t4_get_tp_ch_map(struct adapter *adapter, int pidx); void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, unsigned int *valp); int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, const unsigned int *valp); int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); const char *t4_get_port_type_description(enum fw_port_type port_type); void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); void t4_get_port_stats_offset(struct adapter *adap, int idx, struct port_stats *stats, struct port_stats *offset); void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, unsigned int mask, unsigned int val); void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st, bool sleep_ok); void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st, bool sleep_ok); void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st, bool sleep_ok); void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st, bool sleep_ok); void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, struct tp_tcp_stats *v6, bool sleep_ok); void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, struct tp_fcoe_stats *st, bool sleep_ok); void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, const unsigned short *alpha, const unsigned short *beta); void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, enum dev_master master, enum dev_state *state); int t4_fw_bye(struct adapter *adap, unsigned int mbox); int t4_early_init(struct adapter *adap, unsigned int mbox); int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); int t4_fixup_host_params(struct adapter *adap, unsigned int page_size, unsigned int cache_line_size); int t4_fw_initialize(struct adapter *adap, unsigned int mbox); int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, u32 *val); int t4_query_params_ns(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, u32 *val); int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, u32 *val, int rw, bool sleep_ok); int t4_set_params_timeout(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, const u32 *val, int timeout); int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, const u32 *val); int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, unsigned int rxqi, unsigned int rxq, unsigned int tc, unsigned int vi, unsigned int cmask, unsigned int pmask, unsigned int nexact, unsigned int rcaps, unsigned int wxcaps); int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, unsigned int *rss_size, u8 *vivld, u8 *vin); int t4_free_vi(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int viid); int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, unsigned int viid_mirror, int mtu, int promisc, int all_multi, int bcast, int vlanex, bool sleep_ok); int t4_free_raw_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int idx, u8 lookup_type, u8 port_id, bool sleep_ok); int t4_free_encap_mac_filt(struct adapter *adap, unsigned int viid, int idx, bool sleep_ok); int t4_alloc_encap_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int vni, unsigned int vni_mask, u8 dip_hit, u8 lookup_type, bool sleep_ok); int t4_alloc_raw_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int idx, u8 lookup_type, u8 port_id, bool sleep_ok); int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, bool free, unsigned int naddr, const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok); int t4_free_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, unsigned int naddr, const u8 **addr, bool sleep_ok); int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, int idx, const u8 *addr, bool persist, u8 *smt_idx); int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, bool ucast, u64 vec, bool sleep_ok); int t4_enable_vi_params(struct adapter *adap, unsigned int mbox, unsigned int viid, bool rx_en, bool tx_en, bool dcb_en); int t4_enable_pi_params(struct adapter *adap, unsigned int mbox, struct port_info *pi, bool rx_en, bool tx_en, bool dcb_en); int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, bool rx_en, bool tx_en); int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, unsigned int nblinks); int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, unsigned int mmd, unsigned int reg, u16 *valp); int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, unsigned int mmd, unsigned int reg, u16 val); int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int iqtype, unsigned int iqid, unsigned int fl0id, unsigned int fl1id); int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int iqtype, unsigned int iqid, unsigned int fl0id, unsigned int fl1id); int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int eqid); int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int eqid); int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int eqid); int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox, int ctxt_type); int t4_read_sge_dbqtimers(struct adapter *adap, unsigned int ndbqtimers, u16 *dbqtimers); void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl); int t4_update_port_info(struct port_info *pi); int t4_get_link_params(struct port_info *pi, unsigned int *link_okp, unsigned int *speedp, unsigned int *mtup); int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); void t4_db_full(struct adapter *adapter); void t4_db_dropped(struct adapter *adapter); int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, int filter_index, int enable); void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, int filter_index, int *enabled); int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val); void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, unsigned int *ipg, bool sleep_ok); int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, enum ctxt_type ctype, u32 *data); int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype, u32 *data); int t4_sched_params(struct adapter *adapter, u8 type, u8 level, u8 mode, u8 rateunit, u8 ratemode, u8 channel, u8 class, u32 minrate, u32 maxrate, u16 weight, u16 pktsize, u16 burstsize); void t4_sge_decode_idma_state(struct adapter *adapter, int state); void t4_idma_monitor_init(struct adapter *adapter, struct sge_idma_monitor_state *idma); void t4_idma_monitor(struct adapter *adapter, struct sge_idma_monitor_state *idma, int hz, int ticks); int t4_set_vf_mac_acl(struct adapter *adapter, unsigned int vf, unsigned int naddr, u8 *addr); void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs, u32 start_index, bool sleep_ok); void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs, u32 start_index, bool sleep_ok); void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs, u32 start_index, bool sleep_ok); void t4_uld_mem_free(struct adapter *adap); int t4_uld_mem_alloc(struct adapter *adap); void t4_uld_clean_up(struct adapter *adap); void t4_register_netevent_notifier(void); int t4_i2c_rd(struct adapter *adap, unsigned int mbox, int port, unsigned int devid, unsigned int offset, unsigned int len, u8 *buf); int t4_load_boot(struct adapter *adap, u8 *boot_data, unsigned int boot_addr, unsigned int size); int t4_load_bootcfg(struct adapter *adap, const u8 *cfg_data, unsigned int size); void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, struct sge_fl *fl); void free_tx_desc(struct adapter *adap, struct sge_txq *q, unsigned int n, bool unmap); void cxgb4_eosw_txq_free_desc(struct adapter *adap, struct sge_eosw_txq *txq, u32 ndesc); int cxgb4_ethofld_send_flowc(struct net_device *dev, u32 eotid, u32 tc); void cxgb4_ethofld_restart(struct tasklet_struct *t); int cxgb4_ethofld_rx_handler(struct sge_rspq *q, const __be64 *rsp, const struct pkt_gl *si); void free_txq(struct adapter *adap, struct sge_txq *q); void cxgb4_reclaim_completed_tx(struct adapter *adap, struct sge_txq *q, bool unmap); int cxgb4_map_skb(struct device *dev, const struct sk_buff *skb, dma_addr_t *addr); void cxgb4_inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q, void *pos); void cxgb4_write_sgl(const struct sk_buff *skb, struct sge_txq *q, struct ulptx_sgl *sgl, u64 *end, unsigned int start, const dma_addr_t *addr); void cxgb4_write_partial_sgl(const struct sk_buff *skb, struct sge_txq *q, struct ulptx_sgl *sgl, u64 *end, const dma_addr_t *addr, u32 start, u32 send_len); void cxgb4_ring_tx_db(struct adapter *adap, struct sge_txq *q, int n); int t4_set_vlan_acl(struct adapter *adap, unsigned int mbox, unsigned int vf, u16 vlan); int cxgb4_dcb_enabled(const struct net_device *dev); int cxgb4_thermal_init(struct adapter *adap); int cxgb4_thermal_remove(struct adapter *adap); int cxgb4_set_msix_aff(struct adapter *adap, unsigned short vec, cpumask_var_t *aff_mask, int idx); void cxgb4_clear_msix_aff(unsigned short vec, cpumask_var_t aff_mask); int cxgb4_change_mac(struct port_info *pi, unsigned int viid, int *tcam_idx, const u8 *addr, bool persistent, u8 *smt_idx); int cxgb4_alloc_mac_filt(struct adapter *adap, unsigned int viid, bool free, unsigned int naddr, const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok); int cxgb4_free_mac_filt(struct adapter *adap, unsigned int viid, unsigned int naddr, const u8 **addr, bool sleep_ok); int cxgb4_init_mps_ref_entries(struct adapter *adap); void cxgb4_free_mps_ref_entries(struct adapter *adap); int cxgb4_alloc_encap_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int vni, unsigned int vni_mask, u8 dip_hit, u8 lookup_type, bool sleep_ok); int cxgb4_free_encap_mac_filt(struct adapter *adap, unsigned int viid, int idx, bool sleep_ok); int cxgb4_free_raw_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int idx, u8 lookup_type, u8 port_id, bool sleep_ok); int cxgb4_alloc_raw_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int idx, u8 lookup_type, u8 port_id, bool sleep_ok); int cxgb4_update_mac_filt(struct port_info *pi, unsigned int viid, int *tcam_idx, const u8 *addr, bool persistent, u8 *smt_idx); int cxgb4_get_msix_idx_from_bmap(struct adapter *adap); void cxgb4_free_msix_idx_in_bmap(struct adapter *adap, u32 msix_idx); void cxgb4_enable_rx(struct adapter *adap, struct sge_rspq *q); void cxgb4_quiesce_rx(struct sge_rspq *q); int cxgb4_port_mirror_alloc(struct net_device *dev); void cxgb4_port_mirror_free(struct net_device *dev); #if IS_ENABLED(CONFIG_CHELSIO_TLS_DEVICE) int cxgb4_set_ktls_feature(struct adapter *adap, bool enable); #endif #endif /* __CXGB4_H__ */
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