/* * libcxgb_ppm.h: Chelsio common library for T3/T4/T5 iSCSI ddp operation * * Copyright (c) 2016 Chelsio Communications, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Written by: Karen Xie ([email protected]) */ #ifndef __LIBCXGB_PPM_H__ #define __LIBCXGB_PPM_H__ #include <linux/kernel.h> #include <linux/errno.h> #include <linux/types.h> #include <linux/debugfs.h> #include <linux/list.h> #include <linux/netdevice.h> #include <linux/scatterlist.h> #include <linux/skbuff.h> #include <linux/vmalloc.h> #include <linux/bitmap.h> struct cxgbi_pagepod_hdr { … }; #define PPOD_PAGES_MAX … struct cxgbi_pagepod { … }; /* ddp tag format * for a 32-bit tag: * bit # * 31 ..... ..... 0 * X Y...Y Z...Z, where * ^ ^^^^^ ^^^^ * | | |____ when ddp bit = 0: color bits * | | * | |____ when ddp bit = 0: idx into the ddp memory region * | * |____ ddp bit: 0 - ddp tag, 1 - non-ddp tag * * [page selector:2] [sw/free bits] [0] [idx] [color:6] */ #define DDP_PGIDX_MAX … #define DDP_PGSZ_BASE_SHIFT … struct cxgbi_task_tag_info { … }; struct cxgbi_tag_format { … }; struct cxgbi_ppod_data { … }; /* per cpu ppm pool */ struct cxgbi_ppm_pool { … } ____cacheline_aligned_in_smp; struct cxgbi_ppm { … }; #define DDP_THRESHOLD … #define PPOD_PAGES_SHIFT … #define IPPOD_SIZE … #define PPOD_SIZE_SHIFT … /* page pods are allocated in groups of this size (must be power of 2) */ #define PPOD_CLUSTER_SIZE … #define ULPMEM_DSGL_MAX_NPPODS … #define ULPMEM_IDATA_MAX_NPPODS … #define PCIE_MEMWIN_MAX_NPPODS … #define PPOD_COLOR_SHIFT … #define PPOD_COLOR(x) … #define PPOD_IDX_SHIFT … #define PPOD_IDX_MAX_SIZE … #define PPOD_TID_SHIFT … #define PPOD_TID(x) … #define PPOD_TAG_SHIFT … #define PPOD_TAG(x) … #define PPOD_VALID_SHIFT … #define PPOD_VALID(x) … #define PPOD_VALID_FLAG … #define PPOD_PI_EXTRACT_CTL_SHIFT … #define PPOD_PI_EXTRACT_CTL(x) … #define PPOD_PI_EXTRACT_CTL_FLAG … #define PPOD_PI_TYPE_SHIFT … #define PPOD_PI_TYPE_MASK … #define PPOD_PI_TYPE(x) … #define PPOD_PI_CHECK_CTL_SHIFT … #define PPOD_PI_CHECK_CTL_MASK … #define PPOD_PI_CHECK_CTL(x) … #define PPOD_PI_REPORT_CTL_SHIFT … #define PPOD_PI_REPORT_CTL_MASK … #define PPOD_PI_REPORT_CTL(x) … static inline int cxgbi_ppm_is_ddp_tag(struct cxgbi_ppm *ppm, u32 tag) { … } static inline int cxgbi_ppm_sw_tag_is_usable(struct cxgbi_ppm *ppm, u32 tag) { … } static inline int cxgbi_ppm_make_non_ddp_tag(struct cxgbi_ppm *ppm, u32 sw_tag, u32 *final_tag) { … } static inline u32 cxgbi_ppm_decode_non_ddp_tag(struct cxgbi_ppm *ppm, u32 tag) { … } static inline u32 cxgbi_ppm_ddp_tag_get_idx(struct cxgbi_ppm *ppm, u32 ddp_tag) { … } static inline u32 cxgbi_ppm_make_ddp_tag(unsigned int hw_idx, unsigned char color) { … } static inline unsigned long cxgbi_ppm_get_tag_caller_data(struct cxgbi_ppm *ppm, u32 ddp_tag) { … } /* sw bits are the free bits */ static inline int cxgbi_ppm_ddp_tag_update_sw_bits(struct cxgbi_ppm *ppm, u32 val, u32 orig_tag, u32 *final_tag) { … } static inline void cxgbi_ppm_ppod_clear(struct cxgbi_pagepod *ppod) { … } static inline void cxgbi_tagmask_check(unsigned int tagmask, struct cxgbi_tag_format *tformat) { … } int cxgbi_ppm_find_page_index(struct cxgbi_ppm *ppm, unsigned long pgsz); void cxgbi_ppm_make_ppod_hdr(struct cxgbi_ppm *ppm, u32 tag, unsigned int tid, unsigned int offset, unsigned int length, struct cxgbi_pagepod_hdr *hdr); void cxgbi_ppm_ppod_release(struct cxgbi_ppm *, u32 idx); int cxgbi_ppm_ppods_reserve(struct cxgbi_ppm *, unsigned short nr_pages, u32 per_tag_pg_idx, u32 *ppod_idx, u32 *ddp_tag, unsigned long caller_data); int cxgbi_ppm_init(void **ppm_pp, struct net_device *, struct pci_dev *, void *lldev, struct cxgbi_tag_format *, unsigned int iscsi_size, unsigned int llimit, unsigned int start, unsigned int reserve_factor, unsigned int edram_start, unsigned int edram_size); int cxgbi_ppm_release(struct cxgbi_ppm *ppm); void cxgbi_tagmask_check(unsigned int tagmask, struct cxgbi_tag_format *); unsigned int cxgbi_tagmask_set(unsigned int ppmax); #endif /*__LIBCXGB_PPM_H__*/
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