linux/drivers/spi/spi-microchip-core-qspi.c

// SPDX-License-Identifier: (GPL-2.0)
/*
 * Microchip coreQSPI QSPI controller driver
 *
 * Copyright (C) 2018-2022 Microchip Technology Inc. and its subsidiaries
 *
 * Author: Naga Sureshkumar Relli <[email protected]>
 *
 */

#include <linux/clk.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>

/*
 * QSPI Control register mask defines
 */
#define CONTROL_ENABLE
#define CONTROL_MASTER
#define CONTROL_XIP
#define CONTROL_XIPADDR
#define CONTROL_CLKIDLE
#define CONTROL_SAMPLE_MASK
#define CONTROL_MODE0
#define CONTROL_MODE12_MASK
#define CONTROL_MODE12_EX_RO
#define CONTROL_MODE12_EX_RW
#define CONTROL_MODE12_FULL
#define CONTROL_FLAGSX4
#define CONTROL_CLKRATE_MASK
#define CONTROL_CLKRATE_SHIFT

/*
 * QSPI Frames register mask defines
 */
#define FRAMES_TOTALBYTES_MASK
#define FRAMES_CMDBYTES_MASK
#define FRAMES_CMDBYTES_SHIFT
#define FRAMES_SHIFT
#define FRAMES_IDLE_MASK
#define FRAMES_IDLE_SHIFT
#define FRAMES_FLAGBYTE
#define FRAMES_FLAGWORD

/*
 * QSPI Interrupt Enable register mask defines
 */
#define IEN_TXDONE
#define IEN_RXDONE
#define IEN_RXAVAILABLE
#define IEN_TXAVAILABLE
#define IEN_RXFIFOEMPTY
#define IEN_TXFIFOFULL

/*
 * QSPI Status register mask defines
 */
#define STATUS_TXDONE
#define STATUS_RXDONE
#define STATUS_RXAVAILABLE
#define STATUS_TXAVAILABLE
#define STATUS_RXFIFOEMPTY
#define STATUS_TXFIFOFULL
#define STATUS_READY
#define STATUS_FLAGSX4
#define STATUS_MASK

#define BYTESUPPER_MASK
#define BYTESLOWER_MASK

#define MAX_DIVIDER
#define MIN_DIVIDER
#define MAX_DATA_CMD_LEN

/* QSPI ready time out value */
#define TIMEOUT_MS

/*
 * QSPI Register offsets.
 */
#define REG_CONTROL
#define REG_FRAMES
#define REG_IEN
#define REG_STATUS
#define REG_DIRECT_ACCESS
#define REG_UPPER_ACCESS
#define REG_RX_DATA
#define REG_TX_DATA
#define REG_X4_RX_DATA
#define REG_X4_TX_DATA
#define REG_FRAMESUP

/**
 * struct mchp_coreqspi - Defines qspi driver instance
 * @regs:              Virtual address of the QSPI controller registers
 * @clk:               QSPI Operating clock
 * @data_completion:   completion structure
 * @op_lock:           lock access to the device
 * @txbuf:             TX buffer
 * @rxbuf:             RX buffer
 * @irq:               IRQ number
 * @tx_len:            Number of bytes left to transfer
 * @rx_len:            Number of bytes left to receive
 */
struct mchp_coreqspi {};

static int mchp_coreqspi_set_mode(struct mchp_coreqspi *qspi, const struct spi_mem_op *op)
{}

static inline void mchp_coreqspi_read_op(struct mchp_coreqspi *qspi)
{}

static inline void mchp_coreqspi_write_op(struct mchp_coreqspi *qspi, bool word)
{}

static void mchp_coreqspi_enable_ints(struct mchp_coreqspi *qspi)
{}

static void mchp_coreqspi_disable_ints(struct mchp_coreqspi *qspi)
{}

static irqreturn_t mchp_coreqspi_isr(int irq, void *dev_id)
{}

static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_device *spi)
{}

static int mchp_coreqspi_setup_op(struct spi_device *spi_dev)
{}

static inline void mchp_coreqspi_config_op(struct mchp_coreqspi *qspi, const struct spi_mem_op *op)
{}

static int mchp_qspi_wait_for_ready(struct spi_mem *mem)
{}

static int mchp_coreqspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
{}

static bool mchp_coreqspi_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
{}

static int mchp_coreqspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
{}

static const struct spi_controller_mem_ops mchp_coreqspi_mem_ops =;

static int mchp_coreqspi_probe(struct platform_device *pdev)
{}

static void mchp_coreqspi_remove(struct platform_device *pdev)
{}

static const struct of_device_id mchp_coreqspi_of_match[] =;
MODULE_DEVICE_TABLE(of, mchp_coreqspi_of_match);

static struct platform_driver mchp_coreqspi_driver =;
module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();