linux/drivers/net/mdio/mdio-bitbang.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Bitbanged MDIO support.
 *
 * Author: Scott Wood <[email protected]>
 * Copyright (c) 2007 Freescale Semiconductor
 *
 * Based on CPM2 MDIO code which is:
 *
 * Copyright (c) 2003 Intracom S.A.
 *  by Pantelis Antoniou <[email protected]>
 *
 * 2005 (c) MontaVista Software, Inc.
 * Vitaly Bordug <[email protected]>
 */

#include <linux/delay.h>
#include <linux/mdio-bitbang.h>
#include <linux/module.h>
#include <linux/types.h>

#define MDIO_READ …
#define MDIO_WRITE …

#define MDIO_C45 …
#define MDIO_C45_ADDR …
#define MDIO_C45_READ …
#define MDIO_C45_WRITE …

#define MDIO_SETUP_TIME …
#define MDIO_HOLD_TIME …

/* Minimum MDC period is 400 ns, plus some margin for error.  MDIO_DELAY
 * is done twice per period.
 */
#define MDIO_DELAY …

/* The PHY may take up to 300 ns to produce data, plus some margin
 * for error.
 */
#define MDIO_READ_DELAY …

/* MDIO must already be configured as output. */
static void mdiobb_send_bit(struct mdiobb_ctrl *ctrl, int val)
{ … }

/* MDIO must already be configured as input. */
static int mdiobb_get_bit(struct mdiobb_ctrl *ctrl)
{ … }

/* MDIO must already be configured as output. */
static void mdiobb_send_num(struct mdiobb_ctrl *ctrl, u16 val, int bits)
{ … }

/* MDIO must already be configured as input. */
static u16 mdiobb_get_num(struct mdiobb_ctrl *ctrl, int bits)
{ … }

/* Utility to send the preamble, address, and
 * register (common to read and write).
 */
static void mdiobb_cmd(struct mdiobb_ctrl *ctrl, int op, u8 phy, u8 reg)
{ … }

/* In clause 45 mode all commands are prefixed by MDIO_ADDR to specify the
   lower 16 bits of the 21 bit address. This transfer is done identically to a
   MDIO_WRITE except for a different code. Theoretically clause 45 and normal
   devices can exist on the same bus. Normal devices should ignore the MDIO_ADDR
   phase. */
static void mdiobb_cmd_addr(struct mdiobb_ctrl *ctrl, int phy, int dev_addr,
			    int reg)
{ … }

static int mdiobb_read_common(struct mii_bus *bus, int phy)
{ … }

int mdiobb_read_c22(struct mii_bus *bus, int phy, int reg)
{ … }
EXPORT_SYMBOL(…);

int mdiobb_read_c45(struct mii_bus *bus, int phy, int devad, int reg)
{ … }
EXPORT_SYMBOL(…);

static int mdiobb_write_common(struct mii_bus *bus, u16 val)
{ … }

int mdiobb_write_c22(struct mii_bus *bus, int phy, int reg, u16 val)
{ … }
EXPORT_SYMBOL(…);

int mdiobb_write_c45(struct mii_bus *bus, int phy, int devad, int reg, u16 val)
{ … }
EXPORT_SYMBOL(…);

struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl)
{ … }
EXPORT_SYMBOL(…);

void free_mdio_bitbang(struct mii_bus *bus)
{ … }
EXPORT_SYMBOL(…);

MODULE_LICENSE(…) …;
MODULE_DESCRIPTION(…) …;