linux/drivers/net/can/at91_can.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * at91_can.c - CAN network driver for AT91 SoC CAN controller
 *
 * (C) 2007 by Hans J. Koch <[email protected]>
 * (C) 2008, 2009, 2010, 2011, 2023 by Marc Kleine-Budde <[email protected]>
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/errno.h>
#include <linux/ethtool.h>
#include <linux/if_arp.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/rtnetlink.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/types.h>

#include <linux/can/dev.h>
#include <linux/can/error.h>
#include <linux/can/rx-offload.h>

#define AT91_MB_MASK(i)

/* Common registers */
enum at91_reg {};

/* Mailbox registers (0 <= i <= 15) */
#define AT91_MMR(i)
#define AT91_MAM(i)
#define AT91_MID(i)
#define AT91_MFID(i)
#define AT91_MSR(i)
#define AT91_MDL(i)
#define AT91_MDH(i)
#define AT91_MCR(i)

/* Register bits */
#define AT91_MR_CANEN
#define AT91_MR_LPM
#define AT91_MR_ABM
#define AT91_MR_OVL
#define AT91_MR_TEOF
#define AT91_MR_TTM
#define AT91_MR_TIMFRZ
#define AT91_MR_DRPT

#define AT91_SR_RBSY
#define AT91_SR_TBSY
#define AT91_SR_OVLSY

#define AT91_BR_PHASE2_MASK
#define AT91_BR_PHASE1_MASK
#define AT91_BR_PROPAG_MASK
#define AT91_BR_SJW_MASK
#define AT91_BR_BRP_MASK
#define AT91_BR_SMP

#define AT91_TIM_TIMER_MASK

#define AT91_ECR_REC_MASK
#define AT91_ECR_TEC_MASK

#define AT91_TCR_TIMRST

#define AT91_MMR_MTIMEMARK_MASK
#define AT91_MMR_PRIOR_MASK
#define AT91_MMR_MOT_MASK

#define AT91_MID_MIDVB_MASK
#define AT91_MID_MIDVA_MASK
#define AT91_MID_MIDE

#define AT91_MSR_MTIMESTAMP_MASK
#define AT91_MSR_MDLC_MASK
#define AT91_MSR_MRTR
#define AT91_MSR_MABT
#define AT91_MSR_MRDY
#define AT91_MSR_MMI

#define AT91_MCR_MDLC_MASK
#define AT91_MCR_MRTR
#define AT91_MCR_MACR
#define AT91_MCR_MTCR

/* Mailbox Modes */
enum at91_mb_mode {};

/* Interrupt mask bits */
#define AT91_IRQ_ERRA
#define AT91_IRQ_WARN
#define AT91_IRQ_ERRP
#define AT91_IRQ_BOFF
#define AT91_IRQ_SLEEP
#define AT91_IRQ_WAKEUP
#define AT91_IRQ_TOVF
#define AT91_IRQ_TSTP
#define AT91_IRQ_CERR
#define AT91_IRQ_SERR
#define AT91_IRQ_AERR
#define AT91_IRQ_FERR
#define AT91_IRQ_BERR

#define AT91_IRQ_ERR_ALL
#define AT91_IRQ_ERR_FRAME
#define AT91_IRQ_ERR_LINE

#define AT91_IRQ_ALL

enum at91_devtype {};

struct at91_devtype_data {};

struct at91_priv {};

static inline struct at91_priv *rx_offload_to_priv(struct can_rx_offload *offload)
{}

static const struct at91_devtype_data at91_at91sam9263_data =;

static const struct at91_devtype_data at91_at91sam9x5_data =;

static const struct can_bittiming_const at91_bittiming_const =;

#define AT91_IS(_model)

AT91_IS(9263);
AT91_IS(9X5);

static inline unsigned int get_mb_rx_first(const struct at91_priv *priv)
{}

static inline unsigned int get_mb_rx_last(const struct at91_priv *priv)
{}

static inline unsigned int get_mb_tx_shift(const struct at91_priv *priv)
{}

static inline unsigned int get_mb_tx_num(const struct at91_priv *priv)
{}

static inline unsigned int get_mb_tx_first(const struct at91_priv *priv)
{}

static inline unsigned int get_mb_tx_last(const struct at91_priv *priv)
{}

static inline unsigned int get_head_prio_shift(const struct at91_priv *priv)
{}

static inline unsigned int get_head_prio_mask(const struct at91_priv *priv)
{}

static inline unsigned int get_head_mb_mask(const struct at91_priv *priv)
{}

static inline unsigned int get_head_mask(const struct at91_priv *priv)
{}

static inline unsigned int get_irq_mb_rx(const struct at91_priv *priv)
{}

static inline unsigned int get_irq_mb_tx(const struct at91_priv *priv)
{}

static inline unsigned int get_tx_head_mb(const struct at91_priv *priv)
{}

static inline unsigned int get_tx_head_prio(const struct at91_priv *priv)
{}

static inline unsigned int get_tx_tail_mb(const struct at91_priv *priv)
{}

static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg)
{}

static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg,
			      u32 value)
{}

static inline void set_mb_mode_prio(const struct at91_priv *priv,
				    unsigned int mb, enum at91_mb_mode mode,
				    u8 prio)
{}

static inline void set_mb_mode(const struct at91_priv *priv, unsigned int mb,
			       enum at91_mb_mode mode)
{}

static inline u32 at91_can_id_to_reg_mid(canid_t can_id)
{}

static void at91_setup_mailboxes(struct net_device *dev)
{}

static int at91_set_bittiming(struct net_device *dev)
{}

static int at91_get_berr_counter(const struct net_device *dev,
				 struct can_berr_counter *bec)
{}

static void at91_chip_start(struct net_device *dev)
{}

static void at91_chip_stop(struct net_device *dev, enum can_state state)
{}

/* theory of operation:
 *
 * According to the datasheet priority 0 is the highest priority, 15
 * is the lowest. If two mailboxes have the same priority level the
 * message of the mailbox with the lowest number is sent first.
 *
 * We use the first TX mailbox (AT91_MB_TX_FIRST) with prio 0, then
 * the next mailbox with prio 0, and so on, until all mailboxes are
 * used. Then we start from the beginning with mailbox
 * AT91_MB_TX_FIRST, but with prio 1, mailbox AT91_MB_TX_FIRST + 1
 * prio 1. When we reach the last mailbox with prio 15, we have to
 * stop sending, waiting for all messages to be delivered, then start
 * again with mailbox AT91_MB_TX_FIRST prio 0.
 *
 * We use the priv->tx_head as counter for the next transmission
 * mailbox, but without the offset AT91_MB_TX_FIRST. The lower bits
 * encode the mailbox number, the upper 4 bits the mailbox priority:
 *
 * priv->tx_head = (prio << get_next_prio_shift(priv)) |
 *                 (mb - get_mb_tx_first(priv));
 *
 */
static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
{}

static inline u32 at91_get_timestamp(const struct at91_priv *priv)
{}

static inline struct sk_buff *
at91_alloc_can_err_skb(struct net_device *dev,
		       struct can_frame **cf, u32 *timestamp)
{}

/**
 * at91_rx_overflow_err - send error frame due to rx overflow
 * @dev: net device
 */
static void at91_rx_overflow_err(struct net_device *dev)
{}

/**
 * at91_mailbox_read - read CAN msg from mailbox
 * @offload: rx-offload
 * @mb: mailbox number to read from
 * @timestamp: pointer to 32 bit timestamp
 * @drop: true indicated mailbox to mark as read and drop frame
 *
 * Reads a CAN message from the given mailbox if not empty.
 */
static struct sk_buff *at91_mailbox_read(struct can_rx_offload *offload,
					 unsigned int mb, u32 *timestamp,
					 bool drop)
{}

/* theory of operation:
 *
 * priv->tx_tail holds the number of the oldest can_frame put for
 * transmission into the hardware, but not yet ACKed by the CAN tx
 * complete IRQ.
 *
 * We iterate from priv->tx_tail to priv->tx_head and check if the
 * packet has been transmitted, echo it back to the CAN framework. If
 * we discover a not yet transmitted package, stop looking for more.
 *
 */
static void at91_irq_tx(struct net_device *dev, u32 reg_sr)
{}

static void at91_irq_err_line(struct net_device *dev, const u32 reg_sr)
{}

static void at91_irq_err_frame(struct net_device *dev, const u32 reg_sr)
{}

static u32 at91_get_reg_sr_rx(const struct at91_priv *priv, u32 *reg_sr_p)
{}

static irqreturn_t at91_irq(int irq, void *dev_id)
{}

static int at91_open(struct net_device *dev)
{}

/* stop CAN bus activity
 */
static int at91_close(struct net_device *dev)
{}

static int at91_set_mode(struct net_device *dev, enum can_mode mode)
{}

static const struct net_device_ops at91_netdev_ops =;

static const struct ethtool_ops at91_ethtool_ops =;

static ssize_t mb0_id_show(struct device *dev,
			   struct device_attribute *attr, char *buf)
{}

static ssize_t mb0_id_store(struct device *dev,
			    struct device_attribute *attr,
			    const char *buf, size_t count)
{}

static DEVICE_ATTR_RW(mb0_id);

static struct attribute *at91_sysfs_attrs[] =;

static const struct attribute_group at91_sysfs_attr_group =;

#if defined(CONFIG_OF)
static const struct of_device_id at91_can_dt_ids[] =;
MODULE_DEVICE_TABLE(of, at91_can_dt_ids);
#endif

static const struct at91_devtype_data *at91_can_get_driver_data(struct platform_device *pdev)
{}

static int at91_can_probe(struct platform_device *pdev)
{}

static void at91_can_remove(struct platform_device *pdev)
{}

static const struct platform_device_id at91_can_id_table[] =;
MODULE_DEVICE_TABLE(platform, at91_can_id_table);

static struct platform_driver at91_can_driver =;

module_platform_driver();

MODULE_AUTHOR();
MODULE_LICENSE();
MODULE_DESCRIPTION();