// SPDX-License-Identifier: GPL-2.0-or-later /* Xilinx CAN device driver * * Copyright (C) 2012 - 2022 Xilinx, Inc. * Copyright (C) 2009 PetaLogix. All rights reserved. * Copyright (C) 2017 - 2018 Sandvik Mining and Construction Oy * * Description: * This driver is developed for AXI CAN IP, AXI CANFD IP, CANPS and CANFD PS Controller. */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/errno.h> #include <linux/ethtool.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/netdevice.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/property.h> #include <linux/skbuff.h> #include <linux/spinlock.h> #include <linux/string.h> #include <linux/types.h> #include <linux/can/dev.h> #include <linux/can/error.h> #include <linux/phy/phy.h> #include <linux/pm_runtime.h> #include <linux/reset.h> #include <linux/u64_stats_sync.h> #define DRIVER_NAME … /* CAN registers set */ enum xcan_reg { … }; #define XCAN_FRAME_ID_OFFSET(frame_base) … #define XCAN_FRAME_DLC_OFFSET(frame_base) … #define XCAN_FRAME_DW1_OFFSET(frame_base) … #define XCAN_FRAME_DW2_OFFSET(frame_base) … #define XCANFD_FRAME_DW_OFFSET(frame_base) … #define XCAN_CANFD_FRAME_SIZE … #define XCAN_TXMSG_FRAME_OFFSET(n) … #define XCAN_RXMSG_FRAME_OFFSET(n) … #define XCAN_RXMSG_2_FRAME_OFFSET(n) … /* the single TX mailbox used by this driver on CAN FD HW */ #define XCAN_TX_MAILBOX_IDX … /* CAN register bit masks - XCAN_<REG>_<BIT>_MASK */ #define XCAN_SRR_CEN_MASK … #define XCAN_SRR_RESET_MASK … #define XCAN_MSR_LBACK_MASK … #define XCAN_MSR_SLEEP_MASK … #define XCAN_BRPR_BRP_MASK … #define XCAN_BRPR_TDCO_MASK … #define XCAN_2_BRPR_TDCO_MASK … #define XCAN_BTR_SJW_MASK … #define XCAN_BTR_TS2_MASK … #define XCAN_BTR_TS1_MASK … #define XCAN_BTR_SJW_MASK_CANFD … #define XCAN_BTR_TS2_MASK_CANFD … #define XCAN_BTR_TS1_MASK_CANFD … #define XCAN_ECR_REC_MASK … #define XCAN_ECR_TEC_MASK … #define XCAN_ESR_ACKER_MASK … #define XCAN_ESR_BERR_MASK … #define XCAN_ESR_STER_MASK … #define XCAN_ESR_FMER_MASK … #define XCAN_ESR_CRCER_MASK … #define XCAN_SR_TDCV_MASK … #define XCAN_SR_TXFLL_MASK … #define XCAN_SR_ESTAT_MASK … #define XCAN_SR_ERRWRN_MASK … #define XCAN_SR_NORMAL_MASK … #define XCAN_SR_LBACK_MASK … #define XCAN_SR_CONFIG_MASK … #define XCAN_IXR_RXMNF_MASK … #define XCAN_IXR_TXFEMP_MASK … #define XCAN_IXR_WKUP_MASK … #define XCAN_IXR_SLP_MASK … #define XCAN_IXR_BSOFF_MASK … #define XCAN_IXR_ERROR_MASK … #define XCAN_IXR_RXNEMP_MASK … #define XCAN_IXR_RXOFLW_MASK … #define XCAN_IXR_RXOK_MASK … #define XCAN_IXR_TXFLL_MASK … #define XCAN_IXR_TXOK_MASK … #define XCAN_IXR_ARBLST_MASK … #define XCAN_IXR_E2BERX_MASK … #define XCAN_IXR_E1BERX_MASK … #define XCAN_IXR_E2BETXOL_MASK … #define XCAN_IXR_E1BETXOL_MASK … #define XCAN_IXR_E2BETXTL_MASK … #define XCAN_IXR_E1BETXTL_MASK … #define XCAN_IXR_ECC_MASK … #define XCAN_IDR_ID1_MASK … #define XCAN_IDR_SRR_MASK … #define XCAN_IDR_IDE_MASK … #define XCAN_IDR_ID2_MASK … #define XCAN_IDR_RTR_MASK … #define XCAN_DLCR_DLC_MASK … #define XCAN_FSR_FL_MASK … #define XCAN_2_FSR_FL_MASK … #define XCAN_FSR_IRI_MASK … #define XCAN_FSR_RI_MASK … #define XCAN_2_FSR_RI_MASK … #define XCAN_DLCR_EDL_MASK … #define XCAN_DLCR_BRS_MASK … #define XCAN_ECC_CFG_REECRX_MASK … #define XCAN_ECC_CFG_REECTXOL_MASK … #define XCAN_ECC_CFG_REECTXTL_MASK … #define XCAN_ECC_1BIT_CNT_MASK … #define XCAN_ECC_2BIT_CNT_MASK … /* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */ #define XCAN_BRPR_TDC_ENABLE … #define XCAN_BTR_SJW_SHIFT … #define XCAN_BTR_TS2_SHIFT … #define XCAN_BTR_SJW_SHIFT_CANFD … #define XCAN_BTR_TS2_SHIFT_CANFD … #define XCAN_IDR_ID1_SHIFT … #define XCAN_IDR_ID2_SHIFT … #define XCAN_DLCR_DLC_SHIFT … #define XCAN_ESR_REC_SHIFT … /* CAN frame length constants */ #define XCAN_FRAME_MAX_DATA_LEN … #define XCANFD_DW_BYTES … #define XCAN_TIMEOUT … /* TX-FIFO-empty interrupt available */ #define XCAN_FLAG_TXFEMP … /* RX Match Not Finished interrupt available */ #define XCAN_FLAG_RXMNF … /* Extended acceptance filters with control at 0xE0 */ #define XCAN_FLAG_EXT_FILTERS … /* TX mailboxes instead of TX FIFO */ #define XCAN_FLAG_TX_MAILBOXES … /* RX FIFO with each buffer in separate registers at 0x1100 * instead of the regular FIFO at 0x50 */ #define XCAN_FLAG_RX_FIFO_MULTI … #define XCAN_FLAG_CANFD_2 … enum xcan_ip_type { … }; struct xcan_devtype_data { … }; /** * struct xcan_priv - This definition define CAN driver instance * @can: CAN private data structure. * @tx_lock: Lock for synchronizing TX interrupt handling * @tx_head: Tx CAN packets ready to send on the queue * @tx_tail: Tx CAN packets successfully sended on the queue * @tx_max: Maximum number packets the driver can send * @napi: NAPI structure * @read_reg: For reading data from CAN registers * @write_reg: For writing data to CAN registers * @dev: Network device data structure * @reg_base: Ioremapped address to registers * @irq_flags: For request_irq() * @bus_clk: Pointer to struct clk * @can_clk: Pointer to struct clk * @devtype: Device type specific constants * @transceiver: Optional pointer to associated CAN transceiver * @rstc: Pointer to reset control * @ecc_enable: ECC enable flag * @syncp: synchronization for ECC error stats * @ecc_rx_2_bit_errors: RXFIFO 2bit ECC count * @ecc_rx_1_bit_errors: RXFIFO 1bit ECC count * @ecc_txol_2_bit_errors: TXOLFIFO 2bit ECC count * @ecc_txol_1_bit_errors: TXOLFIFO 1bit ECC count * @ecc_txtl_2_bit_errors: TXTLFIFO 2bit ECC count * @ecc_txtl_1_bit_errors: TXTLFIFO 1bit ECC count */ struct xcan_priv { … }; /* CAN Bittiming constants as per Xilinx CAN specs */ static const struct can_bittiming_const xcan_bittiming_const = …; /* AXI CANFD Arbitration Bittiming constants as per AXI CANFD 1.0 spec */ static const struct can_bittiming_const xcan_bittiming_const_canfd = …; /* AXI CANFD Data Bittiming constants as per AXI CANFD 1.0 specs */ static const struct can_bittiming_const xcan_data_bittiming_const_canfd = …; /* AXI CANFD 2.0 Arbitration Bittiming constants as per AXI CANFD 2.0 spec */ static const struct can_bittiming_const xcan_bittiming_const_canfd2 = …; /* AXI CANFD 2.0 Data Bittiming constants as per AXI CANFD 2.0 spec */ static const struct can_bittiming_const xcan_data_bittiming_const_canfd2 = …; /* Transmission Delay Compensation constants for CANFD 1.0 */ static const struct can_tdc_const xcan_tdc_const_canfd = …; /* Transmission Delay Compensation constants for CANFD 2.0 */ static const struct can_tdc_const xcan_tdc_const_canfd2 = …; enum xcan_stats_type { … }; static const char xcan_priv_flags_strings[][ETH_GSTRING_LEN] = …; /** * xcan_write_reg_le - Write a value to the device register little endian * @priv: Driver private data structure * @reg: Register offset * @val: Value to write at the Register offset * * Write data to the paricular CAN register */ static void xcan_write_reg_le(const struct xcan_priv *priv, enum xcan_reg reg, u32 val) { … } /** * xcan_read_reg_le - Read a value from the device register little endian * @priv: Driver private data structure * @reg: Register offset * * Read data from the particular CAN register * Return: value read from the CAN register */ static u32 xcan_read_reg_le(const struct xcan_priv *priv, enum xcan_reg reg) { … } /** * xcan_write_reg_be - Write a value to the device register big endian * @priv: Driver private data structure * @reg: Register offset * @val: Value to write at the Register offset * * Write data to the paricular CAN register */ static void xcan_write_reg_be(const struct xcan_priv *priv, enum xcan_reg reg, u32 val) { … } /** * xcan_read_reg_be - Read a value from the device register big endian * @priv: Driver private data structure * @reg: Register offset * * Read data from the particular CAN register * Return: value read from the CAN register */ static u32 xcan_read_reg_be(const struct xcan_priv *priv, enum xcan_reg reg) { … } /** * xcan_rx_int_mask - Get the mask for the receive interrupt * @priv: Driver private data structure * * Return: The receive interrupt mask used by the driver on this HW */ static u32 xcan_rx_int_mask(const struct xcan_priv *priv) { … } /** * set_reset_mode - Resets the CAN device mode * @ndev: Pointer to net_device structure * * This is the driver reset mode routine.The driver * enters into configuration mode. * * Return: 0 on success and failure value on error */ static int set_reset_mode(struct net_device *ndev) { … } /** * xcan_set_bittiming - CAN set bit timing routine * @ndev: Pointer to net_device structure * * This is the driver set bittiming routine. * Return: 0 on success and failure value on error */ static int xcan_set_bittiming(struct net_device *ndev) { … } /** * xcan_chip_start - This the drivers start routine * @ndev: Pointer to net_device structure * * This is the drivers start routine. * Based on the State of the CAN device it puts * the CAN device into a proper mode. * * Return: 0 on success and failure value on error */ static int xcan_chip_start(struct net_device *ndev) { … } /** * xcan_do_set_mode - This sets the mode of the driver * @ndev: Pointer to net_device structure * @mode: Tells the mode of the driver * * This check the drivers state and calls the corresponding modes to set. * * Return: 0 on success and failure value on error */ static int xcan_do_set_mode(struct net_device *ndev, enum can_mode mode) { … } /** * xcan_write_frame - Write a frame to HW * @ndev: Pointer to net_device structure * @skb: sk_buff pointer that contains data to be Txed * @frame_offset: Register offset to write the frame to */ static void xcan_write_frame(struct net_device *ndev, struct sk_buff *skb, int frame_offset) { … } /** * xcan_start_xmit_fifo - Starts the transmission (FIFO mode) * @skb: sk_buff pointer that contains data to be Txed * @ndev: Pointer to net_device structure * * Return: 0 on success, -ENOSPC if FIFO is full. */ static int xcan_start_xmit_fifo(struct sk_buff *skb, struct net_device *ndev) { … } /** * xcan_start_xmit_mailbox - Starts the transmission (mailbox mode) * @skb: sk_buff pointer that contains data to be Txed * @ndev: Pointer to net_device structure * * Return: 0 on success, -ENOSPC if there is no space */ static int xcan_start_xmit_mailbox(struct sk_buff *skb, struct net_device *ndev) { … } /** * xcan_start_xmit - Starts the transmission * @skb: sk_buff pointer that contains data to be Txed * @ndev: Pointer to net_device structure * * This function is invoked from upper layers to initiate transmission. * * Return: NETDEV_TX_OK on success and NETDEV_TX_BUSY when the tx queue is full */ static netdev_tx_t xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev) { … } /** * xcan_rx - Is called from CAN isr to complete the received * frame processing * @ndev: Pointer to net_device structure * @frame_base: Register offset to the frame to be read * * This function is invoked from the CAN isr(poll) to process the Rx frames. It * does minimal processing and invokes "netif_receive_skb" to complete further * processing. * Return: 1 on success and 0 on failure. */ static int xcan_rx(struct net_device *ndev, int frame_base) { … } /** * xcanfd_rx - Is called from CAN isr to complete the received * frame processing * @ndev: Pointer to net_device structure * @frame_base: Register offset to the frame to be read * * This function is invoked from the CAN isr(poll) to process the Rx frames. It * does minimal processing and invokes "netif_receive_skb" to complete further * processing. * Return: 1 on success and 0 on failure. */ static int xcanfd_rx(struct net_device *ndev, int frame_base) { … } /** * xcan_current_error_state - Get current error state from HW * @ndev: Pointer to net_device structure * * Checks the current CAN error state from the HW. Note that this * only checks for ERROR_PASSIVE and ERROR_WARNING. * * Return: * ERROR_PASSIVE or ERROR_WARNING if either is active, ERROR_ACTIVE * otherwise. */ static enum can_state xcan_current_error_state(struct net_device *ndev) { … } /** * xcan_set_error_state - Set new CAN error state * @ndev: Pointer to net_device structure * @new_state: The new CAN state to be set * @cf: Error frame to be populated or NULL * * Set new CAN error state for the device, updating statistics and * populating the error frame if given. */ static void xcan_set_error_state(struct net_device *ndev, enum can_state new_state, struct can_frame *cf) { … } /** * xcan_update_error_state_after_rxtx - Update CAN error state after RX/TX * @ndev: Pointer to net_device structure * * If the device is in a ERROR-WARNING or ERROR-PASSIVE state, check if * the performed RX/TX has caused it to drop to a lesser state and set * the interface state accordingly. */ static void xcan_update_error_state_after_rxtx(struct net_device *ndev) { … } /** * xcan_err_interrupt - error frame Isr * @ndev: net_device pointer * @isr: interrupt status register value * * This is the CAN error interrupt and it will * check the type of error and forward the error * frame to upper layers. */ static void xcan_err_interrupt(struct net_device *ndev, u32 isr) { … } /** * xcan_state_interrupt - It will check the state of the CAN device * @ndev: net_device pointer * @isr: interrupt status register value * * This will checks the state of the CAN device * and puts the device into appropriate state. */ static void xcan_state_interrupt(struct net_device *ndev, u32 isr) { … } /** * xcan_rx_fifo_get_next_frame - Get register offset of next RX frame * @priv: Driver private data structure * * Return: Register offset of the next frame in RX FIFO. */ static int xcan_rx_fifo_get_next_frame(struct xcan_priv *priv) { … } /** * xcan_rx_poll - Poll routine for rx packets (NAPI) * @napi: napi structure pointer * @quota: Max number of rx packets to be processed. * * This is the poll routine for rx part. * It will process the packets maximux quota value. * * Return: number of packets received */ static int xcan_rx_poll(struct napi_struct *napi, int quota) { … } /** * xcan_tx_interrupt - Tx Done Isr * @ndev: net_device pointer * @isr: Interrupt status register value */ static void xcan_tx_interrupt(struct net_device *ndev, u32 isr) { … } /** * xcan_interrupt - CAN Isr * @irq: irq number * @dev_id: device id pointer * * This is the xilinx CAN Isr. It checks for the type of interrupt * and invokes the corresponding ISR. * * Return: * IRQ_NONE - If CAN device is in sleep mode, IRQ_HANDLED otherwise */ static irqreturn_t xcan_interrupt(int irq, void *dev_id) { … } /** * xcan_chip_stop - Driver stop routine * @ndev: Pointer to net_device structure * * This is the drivers stop routine. It will disable the * interrupts and put the device into configuration mode. */ static void xcan_chip_stop(struct net_device *ndev) { … } /** * xcan_open - Driver open routine * @ndev: Pointer to net_device structure * * This is the driver open routine. * Return: 0 on success and failure value on error */ static int xcan_open(struct net_device *ndev) { … } /** * xcan_close - Driver close routine * @ndev: Pointer to net_device structure * * Return: 0 always */ static int xcan_close(struct net_device *ndev) { … } /** * xcan_get_berr_counter - error counter routine * @ndev: Pointer to net_device structure * @bec: Pointer to can_berr_counter structure * * This is the driver error counter routine. * Return: 0 on success and failure value on error */ static int xcan_get_berr_counter(const struct net_device *ndev, struct can_berr_counter *bec) { … } /** * xcan_get_auto_tdcv - Get Transmitter Delay Compensation Value * @ndev: Pointer to net_device structure * @tdcv: Pointer to TDCV value * * Return: 0 on success */ static int xcan_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv) { … } static void xcan_get_strings(struct net_device *ndev, u32 stringset, u8 *buf) { … } static int xcan_get_sset_count(struct net_device *netdev, int sset) { … } static void xcan_get_ethtool_stats(struct net_device *ndev, struct ethtool_stats *stats, u64 *data) { … } static const struct net_device_ops xcan_netdev_ops = …; static const struct ethtool_ops xcan_ethtool_ops = …; /** * xcan_suspend - Suspend method for the driver * @dev: Address of the device structure * * Put the driver into low power mode. * Return: 0 on success and failure value on error */ static int __maybe_unused xcan_suspend(struct device *dev) { … } /** * xcan_resume - Resume from suspend * @dev: Address of the device structure * * Resume operation after suspend. * Return: 0 on success and failure value on error */ static int __maybe_unused xcan_resume(struct device *dev) { … } /** * xcan_runtime_suspend - Runtime suspend method for the driver * @dev: Address of the device structure * * Put the driver into low power mode. * Return: 0 always */ static int __maybe_unused xcan_runtime_suspend(struct device *dev) { … } /** * xcan_runtime_resume - Runtime resume from suspend * @dev: Address of the device structure * * Resume operation after suspend. * Return: 0 on success and failure value on error */ static int __maybe_unused xcan_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops xcan_dev_pm_ops = …; static const struct xcan_devtype_data xcan_zynq_data = …; static const struct xcan_devtype_data xcan_axi_data = …; static const struct xcan_devtype_data xcan_canfd_data = …; static const struct xcan_devtype_data xcan_canfd2_data = …; /* Match table for OF platform binding */ static const struct of_device_id xcan_of_match[] = …; MODULE_DEVICE_TABLE(of, xcan_of_match); /** * xcan_probe - Platform registration call * @pdev: Handle to the platform device structure * * This function does all the memory allocation and registration for the CAN * device. * * Return: 0 on success and failure value on error */ static int xcan_probe(struct platform_device *pdev) { … } /** * xcan_remove - Unregister the device after releasing the resources * @pdev: Handle to the platform device structure * * This function frees all the resources allocated to the device. * Return: 0 always */ static void xcan_remove(struct platform_device *pdev) { … } static struct platform_driver xcan_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …;
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