linux/drivers/net/dsa/mv88e6xxx/chip.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Marvell 88e6xxx Ethernet switch single-chip support
 *
 * Copyright (c) 2008 Marvell Semiconductor
 *
 * Copyright (c) 2016 Andrew Lunn <[email protected]>
 *
 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
 *	Vivien Didelot <[email protected]>
 */

#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/dsa/mv88e6xxx.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/if_bridge.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/jiffies.h>
#include <linux/list.h>
#include <linux/mdio.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_mdio.h>
#include <linux/platform_data/mv88e6xxx.h>
#include <linux/netdevice.h>
#include <linux/gpio/consumer.h>
#include <linux/phylink.h>
#include <net/dsa.h>

#include "chip.h"
#include "devlink.h"
#include "global1.h"
#include "global2.h"
#include "hwtstamp.h"
#include "phy.h"
#include "port.h"
#include "ptp.h"
#include "serdes.h"
#include "smi.h"

static void assert_reg_lock(struct mv88e6xxx_chip *chip)
{}

int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val)
{}

int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val)
{}

int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg,
			u16 mask, u16 val)
{}

int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg,
		       int bit, int val)
{}

struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_g1_irq_mask(struct irq_data *d)
{}

static void mv88e6xxx_g1_irq_unmask(struct irq_data *d)
{}

static irqreturn_t mv88e6xxx_g1_irq_thread_work(struct mv88e6xxx_chip *chip)
{}

static irqreturn_t mv88e6xxx_g1_irq_thread_fn(int irq, void *dev_id)
{}

static void mv88e6xxx_g1_irq_bus_lock(struct irq_data *d)
{}

static void mv88e6xxx_g1_irq_bus_sync_unlock(struct irq_data *d)
{}

static const struct irq_chip mv88e6xxx_g1_irq_chip =;

static int mv88e6xxx_g1_irq_domain_map(struct irq_domain *d,
				       unsigned int irq,
				       irq_hw_number_t hwirq)
{}

static const struct irq_domain_ops mv88e6xxx_g1_irq_domain_ops =;

/* To be called with reg_lock held */
static void mv88e6xxx_g1_irq_free_common(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_g1_irq_free(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_g1_irq_setup_common(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_g1_irq_setup(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_irq_poll(struct kthread_work *work)
{}

static int mv88e6xxx_irq_poll_setup(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_irq_poll_free(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_port_config_interface(struct mv88e6xxx_chip *chip,
					   int port, phy_interface_t interface)
{}

static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
				    int link, int speed, int duplex, int pause,
				    phy_interface_t mode)
{}

static int mv88e6xxx_phy_is_internal(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_port_ppu_updates(struct mv88e6xxx_chip *chip, int port)
{}

static const u8 mv88e6185_phy_interface_modes[] =;

static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static void mv88e6185_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static const u8 mv88e6xxx_phy_interface_modes[] =;

static void mv88e6xxx_translate_cmode(u8 cmode, unsigned long *supported)
{}

static void
mv88e6250_setup_supported_interfaces(struct mv88e6xxx_chip *chip, int port,
				     struct phylink_config *config)
{}

static void mv88e6250_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static int mv88e63xx_get_port_serdes_cmode(struct mv88e6xxx_chip *chip, int port)
{}

static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static void mv88e632x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static void mv88e6390_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
				       struct phylink_config *config)
{}

static void mv88e6390x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
					struct phylink_config *config)
{}

static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
					struct phylink_config *config)
{}

static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,
			       struct phylink_config *config)
{}

static struct phylink_pcs *
mv88e6xxx_mac_select_pcs(struct phylink_config *config,
			 phy_interface_t interface)
{}

static int mv88e6xxx_mac_prepare(struct phylink_config *config,
				 unsigned int mode, phy_interface_t interface)
{}

static void mv88e6xxx_mac_config(struct phylink_config *config,
				 unsigned int mode,
				 const struct phylink_link_state *state)
{}

static int mv88e6xxx_mac_finish(struct phylink_config *config,
				unsigned int mode, phy_interface_t interface)
{}

static void mv88e6xxx_mac_link_down(struct phylink_config *config,
				    unsigned int mode,
				    phy_interface_t interface)
{}

static void mv88e6xxx_mac_link_up(struct phylink_config *config,
				  struct phy_device *phydev,
				  unsigned int mode, phy_interface_t interface,
				  int speed, int duplex,
				  bool tx_pause, bool rx_pause)
{}

static int mv88e6xxx_stats_snapshot(struct mv88e6xxx_chip *chip, int port)
{}

#define MV88E6XXX_HW_STAT_MAPPER(_fn)

#define MV88E6XXX_HW_STAT_ENTRY(_string, _size, _reg, _type)
static const struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] =;

#define MV88E6XXX_HW_STAT_ENUM(_string, _size, _reg, _type)
enum mv88e6xxx_hw_stat_id {};

static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_chip *chip,
					    const struct mv88e6xxx_hw_stat *s,
					    int port, u16 bank1_select,
					    u16 histogram)
{}

static int mv88e6xxx_stats_get_strings(struct mv88e6xxx_chip *chip,
				       uint8_t *data, int types)
{}

static int mv88e6095_stats_get_strings(struct mv88e6xxx_chip *chip,
				       uint8_t *data)
{}

static int mv88e6250_stats_get_strings(struct mv88e6xxx_chip *chip,
				       uint8_t *data)
{}

static int mv88e6320_stats_get_strings(struct mv88e6xxx_chip *chip,
				       uint8_t *data)
{}

static const uint8_t *mv88e6xxx_atu_vtu_stats_strings[] =;

static void mv88e6xxx_atu_vtu_get_strings(uint8_t *data)
{}

static void mv88e6xxx_get_strings(struct dsa_switch *ds, int port,
				  u32 stringset, uint8_t *data)
{}

static int mv88e6xxx_stats_get_sset_count(struct mv88e6xxx_chip *chip,
					  int types)
{}

static int mv88e6095_stats_get_sset_count(struct mv88e6xxx_chip *chip)
{}

static int mv88e6250_stats_get_sset_count(struct mv88e6xxx_chip *chip)
{}

static int mv88e6320_stats_get_sset_count(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_get_sset_count(struct dsa_switch *ds, int port, int sset)
{}

static size_t mv88e6095_stats_get_stat(struct mv88e6xxx_chip *chip, int port,
				       const struct mv88e6xxx_hw_stat *stat,
				       uint64_t *data)
{}

static size_t mv88e6250_stats_get_stat(struct mv88e6xxx_chip *chip, int port,
				       const struct mv88e6xxx_hw_stat *stat,
				       uint64_t *data)
{}

static size_t mv88e6320_stats_get_stat(struct mv88e6xxx_chip *chip, int port,
				       const struct mv88e6xxx_hw_stat *stat,
				       uint64_t *data)
{}

static size_t mv88e6390_stats_get_stat(struct mv88e6xxx_chip *chip, int port,
				       const struct mv88e6xxx_hw_stat *stat,
				       uint64_t *data)
{}

static size_t mv88e6xxx_stats_get_stat(struct mv88e6xxx_chip *chip, int port,
				       const struct mv88e6xxx_hw_stat *stat,
				       uint64_t *data)
{}

static size_t mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port,
					uint64_t *data)
{}

static void mv88e6xxx_atu_vtu_get_stats(struct mv88e6xxx_chip *chip, int port,
					uint64_t *data)
{}

static void mv88e6xxx_get_stats(struct mv88e6xxx_chip *chip, int port,
				uint64_t *data)
{}

static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port,
					uint64_t *data)
{}

static void mv88e6xxx_get_eth_mac_stats(struct dsa_switch *ds, int port,
					struct ethtool_eth_mac_stats *mac_stats)
{}

static void mv88e6xxx_get_rmon_stats(struct dsa_switch *ds, int port,
				     struct ethtool_rmon_stats *rmon_stats,
				     const struct ethtool_rmon_hist_range **ranges)
{}

static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)
{}

static void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
			       struct ethtool_regs *regs, void *_p)
{}

static int mv88e6xxx_get_mac_eee(struct dsa_switch *ds, int port,
				 struct ethtool_keee *e)
{}

static int mv88e6xxx_set_mac_eee(struct dsa_switch *ds, int port,
				 struct ethtool_keee *e)
{}

/* Mask of the local ports allowed to receive frames from a given fabric port */
static u16 mv88e6xxx_port_vlan(struct mv88e6xxx_chip *chip, int dev, int port)
{}

static int mv88e6xxx_port_vlan_map(struct mv88e6xxx_chip *chip, int port)
{}

static void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port,
					 u8 state)
{}

static int mv88e6xxx_pri_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_devmap_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_trunk_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_pot_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_rsvd2cpu_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_atu_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_irl_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_mac_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)
{}

static int mv88e6xxx_pvt_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_port_fast_age_fid(struct mv88e6xxx_chip *chip, int port,
				       u16 fid)
{}

static void mv88e6xxx_port_fast_age(struct dsa_switch *ds, int port)
{}

static int mv88e6xxx_vtu_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_vtu_get(struct mv88e6xxx_chip *chip, u16 vid,
			     struct mv88e6xxx_vtu_entry *entry)
{}

int mv88e6xxx_vtu_walk(struct mv88e6xxx_chip *chip,
		       int (*cb)(struct mv88e6xxx_chip *chip,
				 const struct mv88e6xxx_vtu_entry *entry,
				 void *priv),
		       void *priv)
{}

static int mv88e6xxx_vtu_loadpurge(struct mv88e6xxx_chip *chip,
				   struct mv88e6xxx_vtu_entry *entry)
{}

static int mv88e6xxx_fid_map_vlan(struct mv88e6xxx_chip *chip,
				  const struct mv88e6xxx_vtu_entry *entry,
				  void *_fid_bitmap)
{}

int mv88e6xxx_fid_map(struct mv88e6xxx_chip *chip, unsigned long *fid_bitmap)
{}

static int mv88e6xxx_atu_new(struct mv88e6xxx_chip *chip, u16 *fid)
{}

static int mv88e6xxx_stu_loadpurge(struct mv88e6xxx_chip *chip,
				   struct mv88e6xxx_stu_entry *entry)
{}

static int mv88e6xxx_stu_setup(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_sid_get(struct mv88e6xxx_chip *chip, u8 *sid)
{}

static int mv88e6xxx_mst_put(struct mv88e6xxx_chip *chip, u8 sid)
{}

static int mv88e6xxx_mst_get(struct mv88e6xxx_chip *chip, struct net_device *br,
			     u16 msti, u8 *sid)
{}

static int mv88e6xxx_port_mst_state_set(struct dsa_switch *ds, int port,
					const struct switchdev_mst_state *st)
{}

static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port,
					u16 vid)
{}

static int mv88e6xxx_port_commit_pvid(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,
					 bool vlan_filtering,
					 struct netlink_ext_ack *extack)
{}

static int
mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port,
			    const struct switchdev_obj_port_vlan *vlan)
{}

static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,
					const unsigned char *addr, u16 vid,
					u8 state)
{}

static int mv88e6xxx_policy_apply(struct mv88e6xxx_chip *chip, int port,
				  const struct mv88e6xxx_policy *policy)
{}

static int mv88e6xxx_policy_insert(struct mv88e6xxx_chip *chip, int port,
				   struct ethtool_rx_flow_spec *fs)
{}

static int mv88e6xxx_get_rxnfc(struct dsa_switch *ds, int port,
			       struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
{}

static int mv88e6xxx_set_rxnfc(struct dsa_switch *ds, int port,
			       struct ethtool_rxnfc *rxnfc)
{}

static int mv88e6xxx_port_add_broadcast(struct mv88e6xxx_chip *chip, int port,
					u16 vid)
{}

static int mv88e6xxx_broadcast_setup(struct mv88e6xxx_chip *chip, u16 vid)
{}

struct mv88e6xxx_port_broadcast_sync_ctx {};

static int
mv88e6xxx_port_broadcast_sync_vlan(struct mv88e6xxx_chip *chip,
				   const struct mv88e6xxx_vtu_entry *vlan,
				   void *_ctx)
{}

static int mv88e6xxx_port_broadcast_sync(struct mv88e6xxx_chip *chip, int port,
					 bool flood)
{}

static int mv88e6xxx_port_vlan_join(struct mv88e6xxx_chip *chip, int port,
				    u16 vid, u8 member, bool warn)
{}

static int mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port,
				   const struct switchdev_obj_port_vlan *vlan,
				   struct netlink_ext_ack *extack)
{}

static int mv88e6xxx_port_vlan_leave(struct mv88e6xxx_chip *chip,
				     int port, u16 vid)
{}

static int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,
				   const struct switchdev_obj_port_vlan *vlan)
{}

static int mv88e6xxx_port_vlan_fast_age(struct dsa_switch *ds, int port, u16 vid)
{}

static int mv88e6xxx_vlan_msti_set(struct dsa_switch *ds,
				   struct dsa_bridge bridge,
				   const struct switchdev_vlan_msti *msti)
{}

static int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
				  const unsigned char *addr, u16 vid,
				  struct dsa_db db)
{}

static int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
				  const unsigned char *addr, u16 vid,
				  struct dsa_db db)
{}

static int mv88e6xxx_port_db_dump_fid(struct mv88e6xxx_chip *chip,
				      u16 fid, u16 vid, int port,
				      dsa_fdb_dump_cb_t *cb, void *data)
{}

struct mv88e6xxx_port_db_dump_vlan_ctx {};

static int mv88e6xxx_port_db_dump_vlan(struct mv88e6xxx_chip *chip,
				       const struct mv88e6xxx_vtu_entry *entry,
				       void *_data)
{}

static int mv88e6xxx_port_db_dump(struct mv88e6xxx_chip *chip, int port,
				  dsa_fdb_dump_cb_t *cb, void *data)
{}

static int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port,
				   dsa_fdb_dump_cb_t *cb, void *data)
{}

static int mv88e6xxx_bridge_map(struct mv88e6xxx_chip *chip,
				struct dsa_bridge bridge)
{}

/* Treat the software bridge as a virtual single-port switch behind the
 * CPU and map in the PVT. First dst->last_switch elements are taken by
 * physical switches, so start from beyond that range.
 */
static int mv88e6xxx_map_virtual_bridge_to_pvt(struct dsa_switch *ds,
					       unsigned int bridge_num)
{}

static int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
				      struct dsa_bridge bridge,
				      bool *tx_fwd_offload,
				      struct netlink_ext_ack *extack)
{}

static void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port,
					struct dsa_bridge bridge)
{}

static int mv88e6xxx_crosschip_bridge_join(struct dsa_switch *ds,
					   int tree_index, int sw_index,
					   int port, struct dsa_bridge bridge,
					   struct netlink_ext_ack *extack)
{}

static void mv88e6xxx_crosschip_bridge_leave(struct dsa_switch *ds,
					     int tree_index, int sw_index,
					     int port, struct dsa_bridge bridge)
{}

static int mv88e6xxx_software_reset(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_hardware_reset(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_disable_ports(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_switch_reset(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_set_port_mode(struct mv88e6xxx_chip *chip, int port,
				   enum mv88e6xxx_frame_mode frame,
				   enum mv88e6xxx_egress_mode egress, u16 etype)
{}

static int mv88e6xxx_set_port_mode_normal(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_set_port_mode_dsa(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_set_port_mode_edsa(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_setup_port_mode(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_setup_message_port(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_setup_egress_floods(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_set_egress_port(struct mv88e6xxx_chip *chip,
				     enum mv88e6xxx_egress_direction direction,
				     int port)
{}

static int mv88e6xxx_setup_upstream_port(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
{}

static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port)
{}

static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
{}

static int mv88e6xxx_set_ageing_time(struct dsa_switch *ds,
				     unsigned int ageing_time)
{}

static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)
{}

/* Check if the errata has already been applied. */
static bool mv88e6390_setup_errata_applied(struct mv88e6xxx_chip *chip)
{}

/* The 6390 copper ports have an errata which require poking magic
 * values into undocumented hidden registers and then performing a
 * software reset.
 */
static int mv88e6390_setup_errata(struct mv88e6xxx_chip *chip)
{}

/* prod_id for switch families which do not have a PHY model number */
static const u16 family_prod_id_table[] =;

static int mv88e6xxx_mdio_read(struct mii_bus *bus, int phy, int reg)
{}

static int mv88e6xxx_mdio_read_c45(struct mii_bus *bus, int phy, int devad,
				   int reg)
{}

static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
{}

static int mv88e6xxx_mdio_write_c45(struct mii_bus *bus, int phy, int devad,
				    int reg, u16 val)
{}

static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip,
				   struct device_node *np,
				   bool external)
{}

static void mv88e6xxx_mdios_unregister(struct mv88e6xxx_chip *chip)

{}

static int mv88e6xxx_mdios_register(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_teardown(struct dsa_switch *ds)
{}

static int mv88e6xxx_setup(struct dsa_switch *ds)
{}

static int mv88e6xxx_port_setup(struct dsa_switch *ds, int port)
{}

static void mv88e6xxx_port_teardown(struct dsa_switch *ds, int port)
{}

static int mv88e6xxx_get_eeprom_len(struct dsa_switch *ds)
{}

static int mv88e6xxx_get_eeprom(struct dsa_switch *ds,
				struct ethtool_eeprom *eeprom, u8 *data)
{}

static int mv88e6xxx_set_eeprom(struct dsa_switch *ds,
				struct ethtool_eeprom *eeprom, u8 *data)
{}

static const struct mv88e6xxx_ops mv88e6085_ops =;

static const struct mv88e6xxx_ops mv88e6095_ops =;

static const struct mv88e6xxx_ops mv88e6097_ops =;

static const struct mv88e6xxx_ops mv88e6123_ops =;

static const struct mv88e6xxx_ops mv88e6131_ops =;

static const struct mv88e6xxx_ops mv88e6141_ops =;

static const struct mv88e6xxx_ops mv88e6161_ops =;

static const struct mv88e6xxx_ops mv88e6165_ops =;

static const struct mv88e6xxx_ops mv88e6171_ops =;

static const struct mv88e6xxx_ops mv88e6172_ops =;

static const struct mv88e6xxx_ops mv88e6175_ops =;

static const struct mv88e6xxx_ops mv88e6176_ops =;

static const struct mv88e6xxx_ops mv88e6185_ops =;

static const struct mv88e6xxx_ops mv88e6190_ops =;

static const struct mv88e6xxx_ops mv88e6190x_ops =;

static const struct mv88e6xxx_ops mv88e6191_ops =;

static const struct mv88e6xxx_ops mv88e6240_ops =;

static const struct mv88e6xxx_ops mv88e6250_ops =;

static const struct mv88e6xxx_ops mv88e6290_ops =;

static const struct mv88e6xxx_ops mv88e6320_ops =;

static const struct mv88e6xxx_ops mv88e6321_ops =;

static const struct mv88e6xxx_ops mv88e6341_ops =;

static const struct mv88e6xxx_ops mv88e6350_ops =;

static const struct mv88e6xxx_ops mv88e6351_ops =;

static const struct mv88e6xxx_ops mv88e6352_ops =;

static const struct mv88e6xxx_ops mv88e6390_ops =;

static const struct mv88e6xxx_ops mv88e6390x_ops =;

static const struct mv88e6xxx_ops mv88e6393x_ops =;

static const struct mv88e6xxx_info mv88e6xxx_table[] =;

static const struct mv88e6xxx_info *mv88e6xxx_lookup_info(unsigned int prod_num)
{}

static int mv88e6xxx_detect(struct mv88e6xxx_chip *chip)
{}

static int mv88e6xxx_single_chip_detect(struct mv88e6xxx_chip *chip,
					struct mdio_device *mdiodev)
{}

static struct mv88e6xxx_chip *mv88e6xxx_alloc_chip(struct device *dev)
{}

static enum dsa_tag_protocol mv88e6xxx_get_tag_protocol(struct dsa_switch *ds,
							int port,
							enum dsa_tag_protocol m)
{}

static int mv88e6xxx_change_tag_protocol(struct dsa_switch *ds,
					 enum dsa_tag_protocol proto)
{}

static int mv88e6xxx_port_mdb_add(struct dsa_switch *ds, int port,
				  const struct switchdev_obj_port_mdb *mdb,
				  struct dsa_db db)
{}

static int mv88e6xxx_port_mdb_del(struct dsa_switch *ds, int port,
				  const struct switchdev_obj_port_mdb *mdb,
				  struct dsa_db db)
{}

static int mv88e6xxx_port_mirror_add(struct dsa_switch *ds, int port,
				     struct dsa_mall_mirror_tc_entry *mirror,
				     bool ingress,
				     struct netlink_ext_ack *extack)
{}

static void mv88e6xxx_port_mirror_del(struct dsa_switch *ds, int port,
				      struct dsa_mall_mirror_tc_entry *mirror)
{}

static int mv88e6xxx_port_pre_bridge_flags(struct dsa_switch *ds, int port,
					   struct switchdev_brport_flags flags,
					   struct netlink_ext_ack *extack)
{}

static int mv88e6xxx_port_bridge_flags(struct dsa_switch *ds, int port,
				       struct switchdev_brport_flags flags,
				       struct netlink_ext_ack *extack)
{}

static bool mv88e6xxx_lag_can_offload(struct dsa_switch *ds,
				      struct dsa_lag lag,
				      struct netdev_lag_upper_info *info,
				      struct netlink_ext_ack *extack)
{}

static int mv88e6xxx_lag_sync_map(struct dsa_switch *ds, struct dsa_lag lag)
{}

static const u8 mv88e6xxx_lag_mask_table[8][8] =;

static void mv88e6xxx_lag_set_port_mask(u16 *mask, int port,
					int num_tx, int nth)
{}

static int mv88e6xxx_lag_sync_masks(struct dsa_switch *ds)
{}

static int mv88e6xxx_lag_sync_masks_map(struct dsa_switch *ds,
					struct dsa_lag lag)
{}

static int mv88e6xxx_port_lag_change(struct dsa_switch *ds, int port)
{}

static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port,
				   struct dsa_lag lag,
				   struct netdev_lag_upper_info *info,
				   struct netlink_ext_ack *extack)
{}

static int mv88e6xxx_port_lag_leave(struct dsa_switch *ds, int port,
				    struct dsa_lag lag)
{}

static int mv88e6xxx_crosschip_lag_change(struct dsa_switch *ds, int sw_index,
					  int port)
{}

static int mv88e6xxx_crosschip_lag_join(struct dsa_switch *ds, int sw_index,
					int port, struct dsa_lag lag,
					struct netdev_lag_upper_info *info,
					struct netlink_ext_ack *extack)
{}

static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index,
					 int port, struct dsa_lag lag)
{}

static const struct phylink_mac_ops mv88e6xxx_phylink_mac_ops =;

static const struct dsa_switch_ops mv88e6xxx_switch_ops =;

static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip)
{}

static void mv88e6xxx_unregister_switch(struct mv88e6xxx_chip *chip)
{}

static const void *pdata_device_get_match_data(struct device *dev)
{}

/* There is no suspend to RAM support at DSA level yet, the switch configuration
 * would be lost after a power cycle so prevent it to be suspended.
 */
static int __maybe_unused mv88e6xxx_suspend(struct device *dev)
{}

static int __maybe_unused mv88e6xxx_resume(struct device *dev)
{}

static SIMPLE_DEV_PM_OPS(mv88e6xxx_pm_ops, mv88e6xxx_suspend, mv88e6xxx_resume);

static int mv88e6xxx_probe(struct mdio_device *mdiodev)
{}

static void mv88e6xxx_remove(struct mdio_device *mdiodev)
{}

static void mv88e6xxx_shutdown(struct mdio_device *mdiodev)
{}

static const struct of_device_id mv88e6xxx_of_match[] =;

MODULE_DEVICE_TABLE(of, mv88e6xxx_of_match);

static struct mdio_driver mv88e6xxx_driver =;

mdio_module_driver(mv88e6xxx_driver);

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();