/* SPDX-License-Identifier: GPL-2.0 * Copyright 2019-2021 NXP */ #ifndef _NET_DSA_TAG_OCELOT_H #define _NET_DSA_TAG_OCELOT_H #include <linux/if_bridge.h> #include <linux/if_vlan.h> #include <linux/kthread.h> #include <linux/packing.h> #include <linux/skbuff.h> #include <net/dsa.h> struct ocelot_skb_cb { … }; #define OCELOT_SKB_CB(skb) … #define IFH_TAG_TYPE_C … #define IFH_TAG_TYPE_S … #define IFH_REW_OP_NOOP … #define IFH_REW_OP_DSCP … #define IFH_REW_OP_ONE_STEP_PTP … #define IFH_REW_OP_TWO_STEP_PTP … #define IFH_REW_OP_ORIGIN_PTP … #define OCELOT_TAG_LEN … #define OCELOT_SHORT_PREFIX_LEN … #define OCELOT_LONG_PREFIX_LEN … #define OCELOT_TOTAL_TAG_LEN … /* The CPU injection header and the CPU extraction header can have 3 types of * prefixes: long, short and no prefix. The format of the header itself is the * same in all 3 cases. * * Extraction with long prefix: * * +-------------------+-------------------+------+------+------------+-------+ * | ff:ff:ff:ff:ff:ff | fe:ff:ff:ff:ff:ff | 8880 | 000a | extraction | frame | * | | | | | header | | * +-------------------+-------------------+------+------+------------+-------+ * 48 bits 48 bits 16 bits 16 bits 128 bits * * Extraction with short prefix: * * +------+------+------------+-------+ * | 8880 | 000a | extraction | frame | * | | | header | | * +------+------+------------+-------+ * 16 bits 16 bits 128 bits * * Extraction with no prefix: * * +------------+-------+ * | extraction | frame | * | header | | * +------------+-------+ * 128 bits * * * Injection with long prefix: * * +-------------------+-------------------+------+------+------------+-------+ * | any dmac | any smac | 8880 | 000a | injection | frame | * | | | | | header | | * +-------------------+-------------------+------+------+------------+-------+ * 48 bits 48 bits 16 bits 16 bits 128 bits * * Injection with short prefix: * * +------+------+------------+-------+ * | 8880 | 000a | injection | frame | * | | | header | | * +------+------+------------+-------+ * 16 bits 16 bits 128 bits * * Injection with no prefix: * * +------------+-------+ * | injection | frame | * | header | | * +------------+-------+ * 128 bits * * The injection header looks like this (network byte order, bit 127 * is part of lowest address byte in memory, bit 0 is part of highest * address byte): * * +------+------+------+------+------+------+------+------+ * 127:120 |BYPASS| MASQ | MASQ_PORT |REW_OP|REW_OP| * +------+------+------+------+------+------+------+------+ * 119:112 | REW_OP | * +------+------+------+------+------+------+------+------+ * 111:104 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 103: 96 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 95: 88 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 87: 80 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 79: 72 | RSV | * +------+------+------+------+------+------+------+------+ * 71: 64 | RSV | DEST | * +------+------+------+------+------+------+------+------+ * 63: 56 | DEST | * +------+------+------+------+------+------+------+------+ * 55: 48 | RSV | * +------+------+------+------+------+------+------+------+ * 47: 40 | RSV | SRC_PORT | RSV |TFRM_TIMER| * +------+------+------+------+------+------+------+------+ * 39: 32 | TFRM_TIMER | RSV | * +------+------+------+------+------+------+------+------+ * 31: 24 | RSV | DP | POP_CNT | CPUQ | * +------+------+------+------+------+------+------+------+ * 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE| * +------+------+------+------+------+------+------+------+ * 15: 8 | PCP | DEI | VID | * +------+------+------+------+------+------+------+------+ * 7: 0 | VID | * +------+------+------+------+------+------+------+------+ * * And the extraction header looks like this: * * +------+------+------+------+------+------+------+------+ * 127:120 | RSV | REW_OP | * +------+------+------+------+------+------+------+------+ * 119:112 | REW_OP | REW_VAL | * +------+------+------+------+------+------+------+------+ * 111:104 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 103: 96 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 95: 88 | REW_VAL | * +------+------+------+------+------+------+------+------+ * 87: 80 | REW_VAL | LLEN | * +------+------+------+------+------+------+------+------+ * 79: 72 | LLEN | WLEN | * +------+------+------+------+------+------+------+------+ * 71: 64 | WLEN | RSV | * +------+------+------+------+------+------+------+------+ * 63: 56 | RSV | * +------+------+------+------+------+------+------+------+ * 55: 48 | RSV | * +------+------+------+------+------+------+------+------+ * 47: 40 | RSV | SRC_PORT | ACL_ID | * +------+------+------+------+------+------+------+------+ * 39: 32 | ACL_ID | RSV | SFLOW_ID | * +------+------+------+------+------+------+------+------+ * 31: 24 |ACL_HIT| DP | LRN_FLAGS | CPUQ | * +------+------+------+------+------+------+------+------+ * 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE| * +------+------+------+------+------+------+------+------+ * 15: 8 | PCP | DEI | VID | * +------+------+------+------+------+------+------+------+ * 7: 0 | VID | * +------+------+------+------+------+------+------+------+ */ struct felix_deferred_xmit_work { … }; struct ocelot_8021q_tagger_data { … }; static inline struct ocelot_8021q_tagger_data * ocelot_8021q_tagger_data(struct dsa_switch *ds) { … } static inline void ocelot_xfh_get_rew_val(void *extraction, u64 *rew_val) { … } static inline void ocelot_xfh_get_len(void *extraction, u64 *len) { … } static inline void ocelot_xfh_get_src_port(void *extraction, u64 *src_port) { … } static inline void ocelot_xfh_get_qos_class(void *extraction, u64 *qos_class) { … } static inline void ocelot_xfh_get_tag_type(void *extraction, u64 *tag_type) { … } static inline void ocelot_xfh_get_vlan_tci(void *extraction, u64 *vlan_tci) { … } static inline void ocelot_ifh_set_bypass(void *injection, u64 bypass) { … } static inline void ocelot_ifh_set_rew_op(void *injection, u64 rew_op) { … } static inline void ocelot_ifh_set_dest(void *injection, u64 dest) { … } static inline void ocelot_ifh_set_qos_class(void *injection, u64 qos_class) { … } static inline void seville_ifh_set_dest(void *injection, u64 dest) { … } static inline void ocelot_ifh_set_src(void *injection, u64 src) { … } static inline void ocelot_ifh_set_tag_type(void *injection, u64 tag_type) { … } static inline void ocelot_ifh_set_vlan_tci(void *injection, u64 vlan_tci) { … } /* Determine the PTP REW_OP to use for injecting the given skb */ static inline u32 ocelot_ptp_rew_op(struct sk_buff *skb) { … } /** * ocelot_xmit_get_vlan_info: Determine VLAN_TCI and TAG_TYPE for injected frame * @skb: Pointer to socket buffer * @br: Pointer to bridge device that the port is under, if any * @vlan_tci: * @tag_type: * * If the port is under a VLAN-aware bridge, remove the VLAN header from the * payload and move it into the DSA tag, which will make the switch classify * the packet to the bridge VLAN. Otherwise, leave the classified VLAN at zero, * which is the pvid of standalone ports (OCELOT_STANDALONE_PVID), although not * of VLAN-unaware bridge ports (that would be ocelot_vlan_unaware_pvid()). * Anyway, VID 0 is fine because it is stripped on egress for these port modes, * and source address learning is not performed for packets injected from the * CPU anyway, so it doesn't matter that the VID is "wrong". */ static inline void ocelot_xmit_get_vlan_info(struct sk_buff *skb, struct net_device *br, u64 *vlan_tci, u64 *tag_type) { … } #endif
Codebase Browser
linux