/* starfire.c: Linux device driver for the Adaptec Starfire network adapter. */ /* Written 1998-2000 by Donald Becker. Current maintainer is Ion Badulescu <ionut ta badula tod org>. Please send all bug reports to me, and not to Donald Becker, as this code has been heavily modified from Donald's original version. This software may be used and distributed according to the terms of the GNU General Public License (GPL), incorporated herein by reference. Drivers based on or derived from this code fall under the GPL and must retain the authorship, copyright and license notice. This file is not a complete program and may only be used when the entire operating system is licensed under the GPL. The information below comes from Donald Becker's original driver: The author may be reached as [email protected], or C/O Scyld Computing Corporation 410 Severn Ave., Suite 210 Annapolis MD 21403 Support and updates available at http://www.scyld.com/network/starfire.html [link no longer provides useful info -jgarzik] */ #define DRV_NAME … #include <linux/interrupt.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/pci.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/init.h> #include <linux/delay.h> #include <linux/crc32.h> #include <linux/ethtool.h> #include <linux/mii.h> #include <linux/if_vlan.h> #include <linux/mm.h> #include <linux/firmware.h> #include <asm/processor.h> /* Processor type for cache alignment. */ #include <linux/uaccess.h> #include <asm/io.h> /* * The current frame processor firmware fails to checksum a fragment * of length 1. If and when this is fixed, the #define below can be removed. */ #define HAS_BROKEN_FIRMWARE /* * If using the broken firmware, data must be padded to the next 32-bit boundary. */ #ifdef HAS_BROKEN_FIRMWARE #define PADDING_MASK … #endif /* * Define this if using the driver with the zero-copy patch */ #define ZEROCOPY #if IS_ENABLED(CONFIG_VLAN_8021Q) #define VLAN_SUPPORT #endif /* The user-configurable values. These may be modified when a driver module is loaded.*/ /* Used for tuning interrupt latency vs. overhead. */ static int intr_latency; static int small_frames; static int debug = …; /* 1 normal messages, 0 quiet .. 7 verbose. */ static int max_interrupt_work = …; static int mtu; /* Maximum number of multicast addresses to filter (vs. rx-all-multicast). The Starfire has a 512 element hash table based on the Ethernet CRC. */ static const int multicast_filter_limit = …; /* Whether to do TCP/UDP checksums in hardware */ static int enable_hw_cksum = …; #define PKT_BUF_SZ … /* * Set the copy breakpoint for the copy-only-tiny-frames scheme. * Setting to > 1518 effectively disables this feature. * * NOTE: * The ia64 doesn't allow for unaligned loads even of integers being * misaligned on a 2 byte boundary. Thus always force copying of * packets as the starfire doesn't allow for misaligned DMAs ;-( * 23/10/2000 - Jes * * The Alpha and the Sparc don't like unaligned loads, either. On Sparc64, * at least, having unaligned frames leads to a rather serious performance * penalty. -Ion */ #if defined(__ia64__) || defined(__alpha__) || defined(__sparc__) static int rx_copybreak = PKT_BUF_SZ; #else static int rx_copybreak /* = 0 */; #endif /* PCI DMA burst size -- on sparc64 we want to force it to 64 bytes, on the others the default of 128 is fine. */ #ifdef __sparc__ #define DMA_BURST_SIZE … #else #define DMA_BURST_SIZE … #endif /* Operational parameters that are set at compile time. */ /* The "native" ring sizes are either 256 or 2048. However in some modes a descriptor may be marked to wrap the ring earlier. */ #define RX_RING_SIZE … #define TX_RING_SIZE … /* The completion queues are fixed at 1024 entries i.e. 4K or 8KB. */ #define DONE_Q_SIZE … /* All queues must be aligned on a 256-byte boundary */ #define QUEUE_ALIGN … #if RX_RING_SIZE > 256 #define RX_Q_ENTRIES … #else #define RX_Q_ENTRIES … #endif /* Operational parameters that usually are not changed. */ /* Time in jiffies before concluding the transmitter is hung. */ #define TX_TIMEOUT … #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT /* 64-bit dma_addr_t */ #define ADDR_64BITS … #define netdrv_addr_t … #define cpu_to_dma(x) … #define dma_to_cpu(x) … #define RX_DESC_Q_ADDR_SIZE … #define TX_DESC_Q_ADDR_SIZE … #define RX_COMPL_Q_ADDR_SIZE … #define TX_COMPL_Q_ADDR_SIZE … #define RX_DESC_ADDR_SIZE … #else /* 32-bit dma_addr_t */ #define netdrv_addr_t … #define cpu_to_dma … #define dma_to_cpu … #define RX_DESC_Q_ADDR_SIZE … #define TX_DESC_Q_ADDR_SIZE … #define RX_COMPL_Q_ADDR_SIZE … #define TX_COMPL_Q_ADDR_SIZE … #define RX_DESC_ADDR_SIZE … #endif #define skb_first_frag_len(skb) … #define skb_num_frags(skb) … /* Firmware names */ #define FIRMWARE_RX … #define FIRMWARE_TX … MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); module_param(max_interrupt_work, int, 0); module_param(mtu, int, 0); module_param(debug, int, 0); module_param(rx_copybreak, int, 0); module_param(intr_latency, int, 0); module_param(small_frames, int, 0); module_param(enable_hw_cksum, int, 0); MODULE_PARM_DESC(…) …; MODULE_PARM_DESC(…) …; MODULE_PARM_DESC(…) …; MODULE_PARM_DESC(…) …; MODULE_PARM_DESC(…) …; MODULE_PARM_DESC(…) …; MODULE_PARM_DESC(…) …; /* Theory of Operation I. Board Compatibility This driver is for the Adaptec 6915 "Starfire" 64 bit PCI Ethernet adapter. II. Board-specific settings III. Driver operation IIIa. Ring buffers The Starfire hardware uses multiple fixed-size descriptor queues/rings. The ring sizes are set fixed by the hardware, but may optionally be wrapped earlier by the END bit in the descriptor. This driver uses that hardware queue size for the Rx ring, where a large number of entries has no ill effect beyond increases the potential backlog. The Tx ring is wrapped with the END bit, since a large hardware Tx queue disables the queue layer priority ordering and we have no mechanism to utilize the hardware two-level priority queue. When modifying the RX/TX_RING_SIZE pay close attention to page sizes and the ring-empty warning levels. IIIb/c. Transmit/Receive Structure See the Adaptec manual for the many possible structures, and options for each structure. There are far too many to document all of them here. For transmit this driver uses type 0/1 transmit descriptors (depending on the 32/64 bitness of the architecture), and relies on automatic minimum-length padding. It does not use the completion queue consumer index, but instead checks for non-zero status entries. For receive this driver uses type 2/3 receive descriptors. The driver allocates full frame size skbuffs for the Rx ring buffers, so all frames should fit in a single descriptor. The driver does not use the completion queue consumer index, but instead checks for non-zero status entries. When an incoming frame is less than RX_COPYBREAK bytes long, a fresh skbuff is allocated and the frame is copied to the new skbuff. When the incoming frame is larger, the skbuff is passed directly up the protocol stack. Buffers consumed this way are replaced by newly allocated skbuffs in a later phase of receive. A notable aspect of operation is that unaligned buffers are not permitted by the Starfire hardware. Thus the IP header at offset 14 in an ethernet frame isn't longword aligned, which may cause problems on some machine e.g. Alphas and IA64. For these architectures, the driver is forced to copy the frame into a new skbuff unconditionally. Copied frames are put into the skbuff at an offset of "+2", thus 16-byte aligning the IP header. IIId. Synchronization The driver runs as two independent, single-threaded flows of control. One is the send-packet routine, which enforces single-threaded use by the dev->tbusy flag. The other thread is the interrupt handler, which is single threaded by the hardware and interrupt handling software. The send packet thread has partial control over the Tx ring and the netif_queue status. If the number of free Tx slots in the ring falls below a certain number (currently hardcoded to 4), it signals the upper layer to stop the queue. The interrupt handler has exclusive control over the Rx ring and records stats from the Tx ring. After reaping the stats, it marks the Tx queue entry as empty by incrementing the dirty_tx mark. Iff the netif_queue is stopped and the number of free Tx slow is above the threshold, it signals the upper layer to restart the queue. IV. Notes IVb. References The Adaptec Starfire manuals, available only from Adaptec. http://www.scyld.com/expert/100mbps.html http://www.scyld.com/expert/NWay.html IVc. Errata - StopOnPerr is broken, don't enable - Hardware ethernet padding exposes random data, perform software padding instead (unverified -- works correctly for all the hardware I have) */ enum chip_capability_flags { … }; enum chipset { … }; static const struct pci_device_id starfire_pci_tbl[] = …; MODULE_DEVICE_TABLE(pci, starfire_pci_tbl); /* A chip capabilities table, matching the CH_xxx entries in xxx_pci_tbl[] above. */ static const struct chip_info { … } netdrv_tbl[] = …; /* Offsets to the device registers. Unlike software-only systems, device drivers interact with complex hardware. It's not useful to define symbolic names for every register bit in the device. The name can only partially document the semantics and make the driver longer and more difficult to read. In general, only the important configuration values or bits changed multiple times should be defined symbolically. */ enum register_offsets { … }; /* * Bits in the interrupt status/mask registers. * Warning: setting Intr[Ab]NormalSummary in the IntrEnable register * enables all the interrupt sources that are or'ed into those status bits. */ enum intr_status_bits { … }; /* Bits in the RxFilterMode register. */ enum rx_mode_bits { … }; /* Bits in the TxMode register */ enum tx_mode_bits { … }; /* Bits in the TxDescCtrl register. */ enum tx_ctrl_bits { … }; /* Bits in the RxDescQCtrl register. */ enum rx_ctrl_bits { … }; /* Bits in the RxDMACtrl register. */ enum rx_dmactrl_bits { … }; /* Bits in the RxCompletionAddr register */ enum rx_compl_bits { … }; /* Bits in the TxCompletionAddr register */ enum tx_compl_bits { … }; /* Bits in the GenCtrl register */ enum gen_ctrl_bits { … }; /* Bits in the IntrTimerCtrl register */ enum intr_ctrl_bits { … }; /* The Rx and Tx buffer descriptors. */ struct starfire_rx_desc { … }; enum rx_desc_bits { … }; /* Completion queue entry. */ struct csum_rx_done_desc { … }; struct full_rx_done_desc { … }; /* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */ #ifdef VLAN_SUPPORT rx_done_desc; #define RxComplType … #else /* not VLAN_SUPPORT */ typedef struct csum_rx_done_desc rx_done_desc; #define RxComplType … #endif /* not VLAN_SUPPORT */ enum rx_done_bits { … }; /* Type 1 Tx descriptor. */ struct starfire_tx_desc_1 { … }; /* Type 2 Tx descriptor. */ struct starfire_tx_desc_2 { … }; #ifdef ADDR_64BITS starfire_tx_desc; #define TX_DESC_TYPE … #else /* not ADDR_64BITS */ typedef struct starfire_tx_desc_1 starfire_tx_desc; #define TX_DESC_TYPE … #endif /* not ADDR_64BITS */ #define TX_DESC_SPACING … enum tx_desc_bits { … }; struct tx_done_desc { … }; struct rx_ring_info { … }; struct tx_ring_info { … }; #define PHY_CNT … struct netdev_private { … }; static int mdio_read(struct net_device *dev, int phy_id, int location); static void mdio_write(struct net_device *dev, int phy_id, int location, int value); static int netdev_open(struct net_device *dev); static void check_duplex(struct net_device *dev); static void tx_timeout(struct net_device *dev, unsigned int txqueue); static void init_ring(struct net_device *dev); static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev); static irqreturn_t intr_handler(int irq, void *dev_instance); static void netdev_error(struct net_device *dev, int intr_status); static int __netdev_rx(struct net_device *dev, int *quota); static int netdev_poll(struct napi_struct *napi, int budget); static void refill_rx_ring(struct net_device *dev); static void netdev_error(struct net_device *dev, int intr_status); static void set_rx_mode(struct net_device *dev); static struct net_device_stats *get_stats(struct net_device *dev); static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); static int netdev_close(struct net_device *dev); static void netdev_media_change(struct net_device *dev); static const struct ethtool_ops ethtool_ops; #ifdef VLAN_SUPPORT static int netdev_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) { … } static int netdev_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) { … } #endif /* VLAN_SUPPORT */ static const struct net_device_ops netdev_ops = …; static int starfire_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { … } /* Read the MII Management Data I/O (MDIO) interfaces. */ static int mdio_read(struct net_device *dev, int phy_id, int location) { … } static void mdio_write(struct net_device *dev, int phy_id, int location, int value) { … } static int netdev_open(struct net_device *dev) { … } static void check_duplex(struct net_device *dev) { … } static void tx_timeout(struct net_device *dev, unsigned int txqueue) { … } /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ static void init_ring(struct net_device *dev) { … } static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev) { … } /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */ static irqreturn_t intr_handler(int irq, void *dev_instance) { … } /* * This routine is logically part of the interrupt/poll handler, but separated * for clarity and better register allocation. */ static int __netdev_rx(struct net_device *dev, int *quota) { … } static int netdev_poll(struct napi_struct *napi, int budget) { … } static void refill_rx_ring(struct net_device *dev) { … } static void netdev_media_change(struct net_device *dev) { … } static void netdev_error(struct net_device *dev, int intr_status) { … } static struct net_device_stats *get_stats(struct net_device *dev) { … } #ifdef VLAN_SUPPORT static u32 set_vlan_mode(struct netdev_private *np) { … } #endif /* VLAN_SUPPORT */ static void set_rx_mode(struct net_device *dev) { … } static int check_if_running(struct net_device *dev) { … } static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) { … } static int get_link_ksettings(struct net_device *dev, struct ethtool_link_ksettings *cmd) { … } static int set_link_ksettings(struct net_device *dev, const struct ethtool_link_ksettings *cmd) { … } static int nway_reset(struct net_device *dev) { … } static u32 get_link(struct net_device *dev) { … } static u32 get_msglevel(struct net_device *dev) { … } static void set_msglevel(struct net_device *dev, u32 val) { … } static const struct ethtool_ops ethtool_ops = …; static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { … } static int netdev_close(struct net_device *dev) { … } static int __maybe_unused starfire_suspend(struct device *dev_d) { … } static int __maybe_unused starfire_resume(struct device *dev_d) { … } static void starfire_remove_one(struct pci_dev *pdev) { … } static SIMPLE_DEV_PM_OPS(starfire_pm_ops, starfire_suspend, starfire_resume); static struct pci_driver starfire_driver = …; static int __init starfire_init (void) { … } static void __exit starfire_cleanup (void) { … } module_init(…) …; module_exit(starfire_cleanup);
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