linux/drivers/net/ethernet/altera/altera_msgdmahw.h

/* SPDX-License-Identifier: GPL-2.0-only */
/* Altera TSE SGDMA and MSGDMA Linux driver
 * Copyright (C) 2014 Altera Corporation. All rights reserved
 */

#ifndef __ALTERA_MSGDMAHW_H__
#define __ALTERA_MSGDMAHW_H__

/* mSGDMA extended descriptor format
 */
struct msgdma_extended_desc {};

/* mSGDMA descriptor control field bit definitions
 */
#define MSGDMA_DESC_CTL_SET_CH(x)
#define MSGDMA_DESC_CTL_GEN_SOP
#define MSGDMA_DESC_CTL_GEN_EOP
#define MSGDMA_DESC_CTL_PARK_READS
#define MSGDMA_DESC_CTL_PARK_WRITES
#define MSGDMA_DESC_CTL_END_ON_EOP
#define MSGDMA_DESC_CTL_END_ON_LEN
#define MSGDMA_DESC_CTL_TR_COMP_IRQ
#define MSGDMA_DESC_CTL_EARLY_IRQ
#define MSGDMA_DESC_CTL_TR_ERR_IRQ
#define MSGDMA_DESC_CTL_EARLY_DONE
/* Writing ‘1’ to the ‘go’ bit commits the entire descriptor into the
 * descriptor FIFO(s)
 */
#define MSGDMA_DESC_CTL_GO

/* Tx buffer control flags
 */
#define MSGDMA_DESC_CTL_TX_FIRST

#define MSGDMA_DESC_CTL_TX_MIDDLE

#define MSGDMA_DESC_CTL_TX_LAST

#define MSGDMA_DESC_CTL_TX_SINGLE

#define MSGDMA_DESC_CTL_RX_SINGLE

/* mSGDMA extended descriptor stride definitions
 */
#define MSGDMA_DESC_TX_STRIDE
#define MSGDMA_DESC_RX_STRIDE

/* mSGDMA dispatcher control and status register map
 */
struct msgdma_csr {};

/* mSGDMA CSR status register bit definitions
 */
#define MSGDMA_CSR_STAT_BUSY
#define MSGDMA_CSR_STAT_DESC_BUF_EMPTY
#define MSGDMA_CSR_STAT_DESC_BUF_FULL
#define MSGDMA_CSR_STAT_RESP_BUF_EMPTY
#define MSGDMA_CSR_STAT_RESP_BUF_FULL
#define MSGDMA_CSR_STAT_STOPPED
#define MSGDMA_CSR_STAT_RESETTING
#define MSGDMA_CSR_STAT_STOPPED_ON_ERR
#define MSGDMA_CSR_STAT_STOPPED_ON_EARLY
#define MSGDMA_CSR_STAT_IRQ
#define MSGDMA_CSR_STAT_MASK
#define MSGDMA_CSR_STAT_MASK_WITHOUT_IRQ

#define MSGDMA_CSR_STAT_BUSY_GET(v)
#define MSGDMA_CSR_STAT_DESC_BUF_EMPTY_GET(v)
#define MSGDMA_CSR_STAT_DESC_BUF_FULL_GET(v)
#define MSGDMA_CSR_STAT_RESP_BUF_EMPTY_GET(v)
#define MSGDMA_CSR_STAT_RESP_BUF_FULL_GET(v)
#define MSGDMA_CSR_STAT_STOPPED_GET(v)
#define MSGDMA_CSR_STAT_RESETTING_GET(v)
#define MSGDMA_CSR_STAT_STOPPED_ON_ERR_GET(v)
#define MSGDMA_CSR_STAT_STOPPED_ON_EARLY_GET(v)
#define MSGDMA_CSR_STAT_IRQ_GET(v)

/* mSGDMA CSR control register bit definitions
 */
#define MSGDMA_CSR_CTL_STOP
#define MSGDMA_CSR_CTL_RESET
#define MSGDMA_CSR_CTL_STOP_ON_ERR
#define MSGDMA_CSR_CTL_STOP_ON_EARLY
#define MSGDMA_CSR_CTL_GLOBAL_INTR
#define MSGDMA_CSR_CTL_STOP_DESCS

/* mSGDMA CSR fill level bits
 */
#define MSGDMA_CSR_WR_FILL_LEVEL_GET(v)
#define MSGDMA_CSR_RD_FILL_LEVEL_GET(v)
#define MSGDMA_CSR_RESP_FILL_LEVEL_GET(v)

/* mSGDMA response register map
 */
struct msgdma_response {};

#define msgdma_respoffs(a)
#define msgdma_csroffs(a)
#define msgdma_descroffs(a)

/* mSGDMA response register bit definitions
 */
#define MSGDMA_RESP_EARLY_TERM
#define MSGDMA_RESP_ERR_MASK

#endif /* __ALTERA_MSGDMA_H__*/