linux/drivers/net/ethernet/amd/xgbe/xgbe.h

/*
 * AMD 10Gb Ethernet driver
 *
 * This file is available to you under your choice of the following two
 * licenses:
 *
 * License 1: GPLv2
 *
 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
 *
 * This file is free software; you may copy, redistribute and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 2 of the License, or (at
 * your option) any later version.
 *
 * This file is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 *
 * This file incorporates work covered by the following copyright and
 * permission notice:
 *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
 *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
 *     Inc. unless otherwise expressly agreed to in writing between Synopsys
 *     and you.
 *
 *     The Software IS NOT an item of Licensed Software or Licensed Product
 *     under any End User Software License Agreement or Agreement for Licensed
 *     Product with Synopsys or any supplement thereto.  Permission is hereby
 *     granted, free of charge, to any person obtaining a copy of this software
 *     annotated with this license and the Software, to deal in the Software
 *     without restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
 *     of the Software, and to permit persons to whom the Software is furnished
 *     to do so, subject to the following conditions:
 *
 *     The above copyright notice and this permission notice shall be included
 *     in all copies or substantial portions of the Software.
 *
 *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 *     THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * License 2: Modified BSD
 *
 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Advanced Micro Devices, Inc. nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * This file incorporates work covered by the following copyright and
 * permission notice:
 *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
 *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
 *     Inc. unless otherwise expressly agreed to in writing between Synopsys
 *     and you.
 *
 *     The Software IS NOT an item of Licensed Software or Licensed Product
 *     under any End User Software License Agreement or Agreement for Licensed
 *     Product with Synopsys or any supplement thereto.  Permission is hereby
 *     granted, free of charge, to any person obtaining a copy of this software
 *     annotated with this license and the Software, to deal in the Software
 *     without restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
 *     of the Software, and to permit persons to whom the Software is furnished
 *     to do so, subject to the following conditions:
 *
 *     The above copyright notice and this permission notice shall be included
 *     in all copies or substantial portions of the Software.
 *
 *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 *     THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __XGBE_H__
#define __XGBE_H__

#include <linux/dma-mapping.h>
#include <linux/netdevice.h>
#include <linux/workqueue.h>
#include <linux/phy.h>
#include <linux/if_vlan.h>
#include <linux/bitops.h>
#include <linux/ptp_clock_kernel.h>
#include <linux/timecounter.h>
#include <linux/net_tstamp.h>
#include <net/dcbnl.h>
#include <linux/completion.h>
#include <linux/cpumask.h>
#include <linux/interrupt.h>
#include <linux/dcache.h>
#include <linux/ethtool.h>
#include <linux/list.h>

#define XGBE_DRV_NAME
#define XGBE_DRV_DESC

/* Descriptor related defines */
#define XGBE_TX_DESC_CNT
#define XGBE_TX_DESC_MIN_FREE
#define XGBE_TX_DESC_MAX_PROC
#define XGBE_RX_DESC_CNT

#define XGBE_TX_DESC_CNT_MIN
#define XGBE_TX_DESC_CNT_MAX
#define XGBE_RX_DESC_CNT_MIN
#define XGBE_RX_DESC_CNT_MAX

#define XGBE_TX_MAX_BUF_SIZE

/* Descriptors required for maximum contiguous TSO/GSO packet */
#define XGBE_TX_MAX_SPLIT

/* Maximum possible descriptors needed for an SKB:
 * - Maximum number of SKB frags
 * - Maximum descriptors for contiguous TSO/GSO packet
 * - Possible context descriptor
 * - Possible TSO header descriptor
 */
#define XGBE_TX_MAX_DESCS

#define XGBE_RX_MIN_BUF_SIZE
#define XGBE_RX_BUF_ALIGN
#define XGBE_SKB_ALLOC_SIZE
#define XGBE_SPH_HDSMS_SIZE

#define XGBE_MAX_DMA_CHANNELS
#define XGBE_MAX_QUEUES
#define XGBE_PRIORITY_QUEUES
#define XGBE_DMA_STOP_TIMEOUT

/* DMA cache settings - Outer sharable, write-back, write-allocate */
#define XGBE_DMA_OS_ARCR
#define XGBE_DMA_OS_AWCR

/* DMA cache settings - System, no caches used */
#define XGBE_DMA_SYS_ARCR
#define XGBE_DMA_SYS_AWCR

/* DMA cache settings - PCI device */
#define XGBE_DMA_PCI_ARCR
#define XGBE_DMA_PCI_AWCR
#define XGBE_DMA_PCI_AWARCR

/* DMA channel interrupt modes */
#define XGBE_IRQ_MODE_EDGE
#define XGBE_IRQ_MODE_LEVEL

#define XGMAC_MIN_PACKET
#define XGMAC_STD_PACKET_MTU
#define XGMAC_MAX_STD_PACKET
#define XGMAC_JUMBO_PACKET_MTU
#define XGMAC_MAX_JUMBO_PACKET
#define XGMAC_ETH_PREAMBLE

#define XGMAC_PFC_DATA_LEN
#define XGMAC_PFC_DELAYS

#define XGMAC_PRIO_QUEUES(_cnt)

/* Common property names */
#define XGBE_MAC_ADDR_PROPERTY
#define XGBE_PHY_MODE_PROPERTY
#define XGBE_DMA_IRQS_PROPERTY
#define XGBE_SPEEDSET_PROPERTY

/* Device-tree clock names */
#define XGBE_DMA_CLOCK
#define XGBE_PTP_CLOCK

/* ACPI property names */
#define XGBE_ACPI_DMA_FREQ
#define XGBE_ACPI_PTP_FREQ

/* PCI BAR mapping */
#define XGBE_XGMAC_BAR
#define XGBE_XPCS_BAR
#define XGBE_MAC_PROP_OFFSET
#define XGBE_I2C_CTRL_OFFSET

/* PCI MSI/MSIx support */
#define XGBE_MSI_BASE_COUNT
#define XGBE_MSI_MIN_COUNT

/* PCI clock frequencies */
#define XGBE_V2_DMA_CLOCK_FREQ
#define XGBE_V2_PTP_CLOCK_FREQ

/* Timestamp support - values based on 50MHz PTP clock
 *   50MHz => 20 nsec
 */
#define XGBE_TSTAMP_SSINC
#define XGBE_TSTAMP_SNSINC

/* Driver PMT macros */
#define XGMAC_DRIVER_CONTEXT
#define XGMAC_IOCTL_CONTEXT

#define XGMAC_FIFO_MIN_ALLOC
#define XGMAC_FIFO_UNIT
#define XGMAC_FIFO_ALIGN(_x)
#define XGMAC_FIFO_FC_OFF
#define XGMAC_FIFO_FC_MIN

#define XGBE_TC_MIN_QUANTUM

/* Helper macro for descriptor handling
 *  Always use XGBE_GET_DESC_DATA to access the descriptor data
 *  since the index is free-running and needs to be and-ed
 *  with the descriptor count value of the ring to index to
 *  the proper descriptor data.
 */
#define XGBE_GET_DESC_DATA(_ring, _idx)

/* Default coalescing parameters */
#define XGMAC_INIT_DMA_TX_USECS
#define XGMAC_INIT_DMA_TX_FRAMES

#define XGMAC_MAX_DMA_RIWT
#define XGMAC_INIT_DMA_RX_USECS
#define XGMAC_INIT_DMA_RX_FRAMES

/* Flow control queue count */
#define XGMAC_MAX_FLOW_CONTROL_QUEUES

/* Flow control threshold units */
#define XGMAC_FLOW_CONTROL_UNIT
#define XGMAC_FLOW_CONTROL_ALIGN(_x)
#define XGMAC_FLOW_CONTROL_VALUE(_x)
#define XGMAC_FLOW_CONTROL_MAX

/* Maximum MAC address hash table size (256 bits = 8 bytes) */
#define XGBE_MAC_HASH_TABLE_SIZE

/* Receive Side Scaling */
#define XGBE_RSS_HASH_KEY_SIZE
#define XGBE_RSS_MAX_TABLE_SIZE
#define XGBE_RSS_LOOKUP_TABLE_TYPE
#define XGBE_RSS_HASH_KEY_TYPE

/* Auto-negotiation */
#define XGBE_AN_MS_TIMEOUT
#define XGBE_LINK_TIMEOUT
#define XGBE_KR_TRAINING_WAIT_ITER

#define XGBE_SGMII_AN_LINK_STATUS
#define XGBE_SGMII_AN_LINK_SPEED
#define XGBE_SGMII_AN_LINK_SPEED_10
#define XGBE_SGMII_AN_LINK_SPEED_100
#define XGBE_SGMII_AN_LINK_SPEED_1000
#define XGBE_SGMII_AN_LINK_DUPLEX

/* ECC correctable error notification window (seconds) */
#define XGBE_ECC_LIMIT

/* MDIO port types */
#define XGMAC_MAX_C22_PORT

/* Link mode bit operations */
#define XGBE_ZERO_SUP(_ls)

#define XGBE_SET_SUP(_ls, _mode)

#define XGBE_CLR_SUP(_ls, _mode)

#define XGBE_IS_SUP(_ls, _mode)

#define XGBE_ZERO_ADV(_ls)

#define XGBE_SET_ADV(_ls, _mode)

#define XGBE_CLR_ADV(_ls, _mode)

#define XGBE_ADV(_ls, _mode)

#define XGBE_ZERO_LP_ADV(_ls)

#define XGBE_SET_LP_ADV(_ls, _mode)

#define XGBE_CLR_LP_ADV(_ls, _mode)

#define XGBE_LP_ADV(_ls, _mode)

#define XGBE_LM_COPY(_dst, _dname, _src, _sname)

struct xgbe_prv_data;

struct xgbe_packet_data {};

/* Common Rx and Tx descriptor mapping */
struct xgbe_ring_desc {};

/* Page allocation related values */
struct xgbe_page_alloc {};

/* Ring entry buffer data */
struct xgbe_buffer_data {};

/* Tx-related ring data */
struct xgbe_tx_ring_data {};

/* Rx-related ring data */
struct xgbe_rx_ring_data {};

/* Structure used to hold information related to the descriptor
 * and the packet associated with the descriptor (always use
 * the XGBE_GET_DESC_DATA macro to access this data from the ring)
 */
struct xgbe_ring_data {};

struct xgbe_ring {} ____cacheline_aligned;

/* Structure used to describe the descriptor rings associated with
 * a DMA channel.
 */
struct xgbe_channel {} ____cacheline_aligned;

enum xgbe_state {};

enum xgbe_int {};

enum xgbe_int_state {};

enum xgbe_ecc_sec {};

enum xgbe_speed {};

enum xgbe_xpcs_access {};

enum xgbe_an_mode {};

enum xgbe_an {};

enum xgbe_rx {};

enum xgbe_mode {};

enum xgbe_speedset {};

enum xgbe_mdio_mode {};

enum xgbe_mb_cmd {};

enum xgbe_mb_subcmd {};

struct xgbe_phy {};

enum xgbe_i2c_cmd {};

struct xgbe_i2c_op {};

struct xgbe_i2c_op_state {};

struct xgbe_i2c {};

struct xgbe_mmc_stats {};

struct xgbe_ext_stats {};

struct xgbe_hw_if {};

/* This structure represents implementation specific routines for an
 * implementation of a PHY. All routines are required unless noted below.
 *   Optional routines:
 *     an_pre, an_post
 *     kr_training_pre, kr_training_post
 *     module_info, module_eeprom
 */
struct xgbe_phy_impl_if {};

struct xgbe_phy_if {};

struct xgbe_i2c_if {};

struct xgbe_desc_if {};

/* This structure contains flags that indicate what hardware features
 * or configurations are present in the device.
 */
struct xgbe_hw_features {};

struct xgbe_version_data {};

struct xgbe_prv_data {};

/* Function prototypes*/
struct xgbe_prv_data *xgbe_alloc_pdata(struct device *);
void xgbe_free_pdata(struct xgbe_prv_data *);
void xgbe_set_counts(struct xgbe_prv_data *);
int xgbe_config_netdev(struct xgbe_prv_data *);
void xgbe_deconfig_netdev(struct xgbe_prv_data *);

int xgbe_platform_init(void);
void xgbe_platform_exit(void);
#ifdef CONFIG_PCI
int xgbe_pci_init(void);
void xgbe_pci_exit(void);
#else
static inline int xgbe_pci_init(void) { return 0; }
static inline void xgbe_pci_exit(void) { }
#endif

void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *);
void xgbe_init_function_ptrs_phy_v1(struct xgbe_phy_if *);
void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *);
void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
void xgbe_init_function_ptrs_i2c(struct xgbe_i2c_if *);
const struct net_device_ops *xgbe_get_netdev_ops(void);
const struct ethtool_ops *xgbe_get_ethtool_ops(void);
const struct udp_tunnel_nic_info *xgbe_get_udp_tunnel_info(void);

#ifdef CONFIG_AMD_XGBE_DCB
const struct dcbnl_rtnl_ops *xgbe_get_dcbnl_ops(void);
#endif

void xgbe_ptp_register(struct xgbe_prv_data *);
void xgbe_ptp_unregister(struct xgbe_prv_data *);
void xgbe_dump_tx_desc(struct xgbe_prv_data *, struct xgbe_ring *,
		       unsigned int, unsigned int, unsigned int);
void xgbe_dump_rx_desc(struct xgbe_prv_data *, struct xgbe_ring *,
		       unsigned int);
void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
void xgbe_get_all_hw_features(struct xgbe_prv_data *);
int xgbe_powerup(struct net_device *, unsigned int);
int xgbe_powerdown(struct net_device *, unsigned int);
void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
void xgbe_restart_dev(struct xgbe_prv_data *pdata);
void xgbe_full_restart_dev(struct xgbe_prv_data *pdata);

#ifdef CONFIG_DEBUG_FS
void xgbe_debugfs_init(struct xgbe_prv_data *);
void xgbe_debugfs_exit(struct xgbe_prv_data *);
void xgbe_debugfs_rename(struct xgbe_prv_data *pdata);
#else
static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
static inline void xgbe_debugfs_rename(struct xgbe_prv_data *pdata) {}
#endif /* CONFIG_DEBUG_FS */

/* NOTE: Uncomment for function trace log messages in KERNEL LOG */
#if 0
#define YDEBUG
#define YDEBUG_MDIO
#endif

/* For debug prints */
#ifdef YDEBUG
#define DBGPR
#else
#define DBGPR(x...)
#endif

#ifdef YDEBUG_MDIO
#define DBGPR_MDIO
#else
#define DBGPR_MDIO(x...)
#endif

#endif