// SPDX-License-Identifier: GPL-2.0-only /* Atlantic Network Driver * * Copyright (C) 2014-2019 aQuantia Corporation * Copyright (C) 2019-2020 Marvell International Ltd. */ /* File hw_atl_b0.c: Definition of Atlantic hardware specific functions. */ #include "../aq_hw.h" #include "../aq_hw_utils.h" #include "../aq_ring.h" #include "../aq_nic.h" #include "../aq_phy.h" #include "hw_atl_b0.h" #include "hw_atl_utils.h" #include "hw_atl_llh.h" #include "hw_atl_b0_internal.h" #include "hw_atl_llh_internal.h" #define DEFAULT_B0_BOARD_BASIC_CAPABILITIES … const struct aq_hw_caps_s hw_atl_b0_caps_aqc100 = …; const struct aq_hw_caps_s hw_atl_b0_caps_aqc107 = …; const struct aq_hw_caps_s hw_atl_b0_caps_aqc108 = …; const struct aq_hw_caps_s hw_atl_b0_caps_aqc109 = …; const struct aq_hw_caps_s hw_atl_b0_caps_aqc111 = …; const struct aq_hw_caps_s hw_atl_b0_caps_aqc112 = …; static int hw_atl_b0_hw_reset(struct aq_hw_s *self) { … } int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc) { … } static int hw_atl_b0_tc_ptp_set(struct aq_hw_s *self) { … } static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self) { … } int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self, struct aq_rss_parameters *rss_params) { … } static int hw_atl_b0_hw_rss_set(struct aq_hw_s *self, struct aq_rss_parameters *rss_params) { … } int hw_atl_b0_hw_offload_set(struct aq_hw_s *self, struct aq_nic_cfg_s *aq_nic_cfg) { … } static int hw_atl_b0_hw_init_tx_tc_rate_limit(struct aq_hw_s *self) { … } static int hw_atl_b0_hw_init_tx_path(struct aq_hw_s *self) { … } void hw_atl_b0_hw_init_rx_rss_ctrl1(struct aq_hw_s *self) { … } static int hw_atl_b0_hw_init_rx_path(struct aq_hw_s *self) { … } int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr) { … } static int hw_atl_b0_hw_init(struct aq_hw_s *self, const u8 *mac_addr) { … } int hw_atl_b0_hw_ring_tx_start(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_ring_rx_start(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_start(struct aq_hw_s *self) { … } static int hw_atl_b0_hw_tx_ring_tail_update(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, struct aq_ring_s *ring, unsigned int frags) { … } int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring, struct aq_ring_param_s *aq_ring_param) { … } int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring, struct aq_ring_param_s *aq_ring_param) { … } int hw_atl_b0_hw_ring_rx_fill(struct aq_hw_s *self, struct aq_ring_s *ring, unsigned int sw_tail_old) { … } static int hw_atl_b0_hw_ring_hwts_rx_fill(struct aq_hw_s *self, struct aq_ring_s *ring) { … } static int hw_atl_b0_hw_ring_hwts_rx_receive(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_ring_tx_head_update(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_irq_enable(struct aq_hw_s *self, u64 mask) { … } int hw_atl_b0_hw_irq_disable(struct aq_hw_s *self, u64 mask) { … } int hw_atl_b0_hw_irq_read(struct aq_hw_s *self, u64 *mask) { … } #define IS_FILTER_ENABLED … int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self, unsigned int packet_filter) { … } #undef IS_FILTER_ENABLED static int hw_atl_b0_hw_multicast_list_set(struct aq_hw_s *self, u8 ar_mac [AQ_HW_MULTICAST_ADDRESS_MAX] [ETH_ALEN], u32 count) { … } static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self) { … } static int hw_atl_b0_hw_stop(struct aq_hw_s *self) { … } int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, struct aq_ring_s *ring) { … } int hw_atl_b0_hw_ring_rx_stop(struct aq_hw_s *self, struct aq_ring_s *ring) { … } #define get_ptp_ts_val_u64(self, indx) … static void hw_atl_b0_get_ptp_ts(struct aq_hw_s *self, u64 *stamp) { … } static void hw_atl_b0_adj_params_get(u64 freq, s64 adj, u32 *ns, u32 *fns) { … } static void hw_atl_b0_mac_adj_param_calc(struct hw_fw_request_ptp_adj_freq *ptp_adj_freq, u64 phyfreq, u64 macfreq) { … } static int hw_atl_b0_adj_sys_clock(struct aq_hw_s *self, s64 delta) { … } static int hw_atl_b0_set_sys_clock(struct aq_hw_s *self, u64 time, u64 ts) { … } static int hw_atl_b0_ts_to_sys_clock(struct aq_hw_s *self, u64 ts, u64 *time) { … } static int hw_atl_b0_adj_clock_freq(struct aq_hw_s *self, s32 ppb) { … } static int hw_atl_b0_gpio_pulse(struct aq_hw_s *self, u32 index, u64 start, u32 period) { … } static int hw_atl_b0_extts_gpio_enable(struct aq_hw_s *self, u32 index, u32 enable) { … } static int hw_atl_b0_get_sync_ts(struct aq_hw_s *self, u64 *ts) { … } static u16 hw_atl_b0_rx_extract_ts(struct aq_hw_s *self, u8 *p, unsigned int len, u64 *timestamp) { … } static int hw_atl_b0_extract_hwts(struct aq_hw_s *self, u8 *p, unsigned int len, u64 *timestamp) { … } static int hw_atl_b0_hw_fl3l4_clear(struct aq_hw_s *self, struct aq_rx_filter_l3l4 *data) { … } static int hw_atl_b0_hw_fl3l4_set(struct aq_hw_s *self, struct aq_rx_filter_l3l4 *data) { … } static int hw_atl_b0_hw_fl2_set(struct aq_hw_s *self, struct aq_rx_filter_l2 *data) { … } static int hw_atl_b0_hw_fl2_clear(struct aq_hw_s *self, struct aq_rx_filter_l2 *data) { … } /* * @brief Set VLAN filter table * @details Configure VLAN filter table to accept (and assign the queue) traffic * for the particular vlan ids. * Note: use this function under vlan promisc mode not to lost the traffic * * @param aq_hw_s * @param aq_rx_filter_vlan VLAN filter configuration * @return 0 - OK, <0 - error */ static int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self, struct aq_rx_filter_vlan *aq_vlans) { … } static int hw_atl_b0_hw_vlan_ctrl(struct aq_hw_s *self, bool enable) { … } int hw_atl_b0_set_loopback(struct aq_hw_s *self, u32 mode, bool enable) { … } static u32 hw_atl_b0_ts_ready_and_latch_high_get(struct aq_hw_s *self) { … } static int hw_atl_b0_get_mac_temp(struct aq_hw_s *self, u32 *temp) { … } const struct aq_hw_ops hw_atl_ops_b0 = …;
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