// SPDX-License-Identifier: GPL-2.0-only /* Atlantic Network Driver * * Copyright (C) 2014-2019 aQuantia Corporation * Copyright (C) 2019-2020 Marvell International Ltd. */ /* File hw_atl_utils.c: Definition of common functions for Atlantic hardware * abstraction layer. */ #include "../aq_nic.h" #include "../aq_hw_utils.h" #include "hw_atl_utils.h" #include "hw_atl_llh.h" #include "hw_atl_llh_internal.h" #include <linux/random.h> #define HW_ATL_UCP_0X370_REG … #define HW_ATL_MIF_CMD … #define HW_ATL_MIF_ADDR … #define HW_ATL_MIF_VAL … #define HW_ATL_MPI_RPC_ADDR … #define HW_ATL_RPC_CONTROL_ADR … #define HW_ATL_RPC_STATE_ADR … #define HW_ATL_MPI_FW_VERSION … #define HW_ATL_MPI_CONTROL_ADR … #define HW_ATL_MPI_STATE_ADR … #define HW_ATL_MPI_STATE_MSK … #define HW_ATL_MPI_STATE_SHIFT … #define HW_ATL_MPI_SPEED_MSK … #define HW_ATL_MPI_SPEED_SHIFT … #define HW_ATL_MPI_DIRTY_WAKE_MSK … #define HW_ATL_MPI_DAISY_CHAIN_STATUS … #define HW_ATL_MPI_BOOT_EXIT_CODE … #define HW_ATL_MAC_PHY_CONTROL … #define HW_ATL_MAC_PHY_MPI_RESET_BIT … #define HW_ATL_FW_VER_1X … #define HW_ATL_FW_VER_2X … #define HW_ATL_FW_VER_3X … #define HW_ATL_FW_VER_4X … #define FORCE_FLASHLESS … enum mcp_area { … }; static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self, enum hal_atl_utils_fw_state_e state); static u32 hw_atl_utils_get_mpi_mbox_tid(struct aq_hw_s *self); static u32 hw_atl_utils_mpi_get_state(struct aq_hw_s *self); static u32 hw_atl_utils_mif_cmd_get(struct aq_hw_s *self); static u32 hw_atl_utils_mif_addr_get(struct aq_hw_s *self); static u32 hw_atl_utils_rpc_state_get(struct aq_hw_s *self); static u32 aq_fw1x_rpc_get(struct aq_hw_s *self); int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops) { … } static int hw_atl_utils_soft_reset_flb(struct aq_hw_s *self) { … } static int hw_atl_utils_soft_reset_rbl(struct aq_hw_s *self) { … } int hw_atl_utils_soft_reset(struct aq_hw_s *self) { … } int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, u32 *p, u32 cnt) { … } static int hw_atl_utils_write_b1_mbox(struct aq_hw_s *self, u32 addr, u32 *p, u32 cnt, enum mcp_area area) { … } static int hw_atl_utils_write_b0_mbox(struct aq_hw_s *self, u32 addr, u32 *p, u32 cnt) { … } static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 addr, u32 *p, u32 cnt, enum mcp_area area) { … } int hw_atl_write_fwcfg_dwords(struct aq_hw_s *self, u32 *p, u32 cnt) { … } int hw_atl_write_fwsettings_dwords(struct aq_hw_s *self, u32 offset, u32 *p, u32 cnt) { … } bool hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual) { … } static int hw_atl_utils_init_ucp(struct aq_hw_s *self, const struct aq_hw_caps_s *aq_hw_caps) { … } struct aq_hw_atl_utils_fw_rpc_tid_s { … }; #define hw_atl_utils_fw_rpc_init(_H_) … int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size) { … } int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self, struct hw_atl_utils_fw_rpc **rpc) { … } static int hw_atl_utils_mpi_create(struct aq_hw_s *self) { … } int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self, struct hw_atl_utils_mbox_header *pmbox) { … } void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self, struct hw_atl_utils_mbox *pmbox) { … } static int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed) { … } static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self, enum hal_atl_utils_fw_state_e state) { … } int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self) { … } int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self, u8 *mac) { … } unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps) { … } void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p) { … } static int hw_atl_fw1x_deinit(struct aq_hw_s *self) { … } int hw_atl_utils_update_stats(struct aq_hw_s *self) { … } struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self) { … } static const u32 hw_atl_utils_hw_mac_regs[] = …; int hw_atl_utils_hw_get_regs(struct aq_hw_s *self, const struct aq_hw_caps_s *aq_hw_caps, u32 *regs_buff) { … } u32 hw_atl_utils_get_fw_version(struct aq_hw_s *self) { … } static int aq_fw1x_set_wake_magic(struct aq_hw_s *self, bool wol_enabled, const u8 *mac) { … } static int aq_fw1x_set_power(struct aq_hw_s *self, unsigned int power_state, const u8 *mac) { … } static u32 hw_atl_utils_get_mpi_mbox_tid(struct aq_hw_s *self) { … } static u32 hw_atl_utils_mpi_get_state(struct aq_hw_s *self) { … } static u32 hw_atl_utils_mif_cmd_get(struct aq_hw_s *self) { … } static u32 hw_atl_utils_mif_addr_get(struct aq_hw_s *self) { … } static u32 hw_atl_utils_rpc_state_get(struct aq_hw_s *self) { … } static u32 aq_fw1x_rpc_get(struct aq_hw_s *self) { … } const struct aq_fw_ops aq_fw_1x_ops = …;
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