/* bnx2x_main.c: QLogic Everest network driver. * * Copyright (c) 2007-2013 Broadcom Corporation * Copyright (c) 2014 QLogic Corporation * All rights reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation. * * Maintained by: Ariel Elior <[email protected]> * Written by: Eliezer Tamir * Based on code from Michael Chan's bnx2 driver * UDP CSUM errata workaround by Arik Gendelman * Slowpath and fastpath rework by Vladislav Zolotarov * Statistics and Link management by Yitchak Gertner * */ #define pr_fmt(fmt) … #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/kernel.h> #include <linux/device.h> /* for dev_info() */ #include <linux/timer.h> #include <linux/errno.h> #include <linux/ioport.h> #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/pci.h> #include <linux/init.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/skbuff.h> #include <linux/dma-mapping.h> #include <linux/bitops.h> #include <linux/irq.h> #include <linux/delay.h> #include <asm/byteorder.h> #include <linux/time.h> #include <linux/ethtool.h> #include <linux/mii.h> #include <linux/if_vlan.h> #include <linux/crash_dump.h> #include <net/ip.h> #include <net/ipv6.h> #include <net/tcp.h> #include <net/vxlan.h> #include <net/checksum.h> #include <net/ip6_checksum.h> #include <linux/workqueue.h> #include <linux/crc32.h> #include <linux/crc32c.h> #include <linux/prefetch.h> #include <linux/zlib.h> #include <linux/io.h> #include <linux/semaphore.h> #include <linux/stringify.h> #include <linux/vmalloc.h> #include "bnx2x.h" #include "bnx2x_init.h" #include "bnx2x_init_ops.h" #include "bnx2x_cmn.h" #include "bnx2x_vfpf.h" #include "bnx2x_dcb.h" #include "bnx2x_sp.h" #include <linux/firmware.h> #include "bnx2x_fw_file_hdr.h" /* FW files */ #define FW_FILE_VERSION … #define FW_FILE_VERSION_V15 … #define FW_FILE_NAME_E1 … #define FW_FILE_NAME_E1H … #define FW_FILE_NAME_E2 … #define FW_FILE_NAME_E1_V15 … #define FW_FILE_NAME_E1H_V15 … #define FW_FILE_NAME_E2_V15 … /* Time in jiffies before concluding the transmitter is hung */ #define TX_TIMEOUT … MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); int bnx2x_num_queues; module_param_named(num_queues, bnx2x_num_queues, int, 0444); MODULE_PARM_DESC(…) …; static int disable_tpa; module_param(disable_tpa, int, 0444); MODULE_PARM_DESC(…) …; static int int_mode; module_param(int_mode, int, 0444); MODULE_PARM_DESC(…) …; static int dropless_fc; module_param(dropless_fc, int, 0444); MODULE_PARM_DESC(…) …; static int mrrs = …; module_param(mrrs, int, 0444); MODULE_PARM_DESC(…) …; static int debug; module_param(debug, int, 0444); MODULE_PARM_DESC(…) …; static struct workqueue_struct *bnx2x_wq; struct workqueue_struct *bnx2x_iov_wq; struct bnx2x_mac_vals { … }; enum bnx2x_board_type { … }; /* indexed by board_type, above */ static struct { … } board_info[] = …; #ifndef PCI_DEVICE_ID_NX2_57710 #define PCI_DEVICE_ID_NX2_57710 … #endif #ifndef PCI_DEVICE_ID_NX2_57711 #define PCI_DEVICE_ID_NX2_57711 … #endif #ifndef PCI_DEVICE_ID_NX2_57711E #define PCI_DEVICE_ID_NX2_57711E … #endif #ifndef PCI_DEVICE_ID_NX2_57712 #define PCI_DEVICE_ID_NX2_57712 … #endif #ifndef PCI_DEVICE_ID_NX2_57712_MF #define PCI_DEVICE_ID_NX2_57712_MF … #endif #ifndef PCI_DEVICE_ID_NX2_57712_VF #define PCI_DEVICE_ID_NX2_57712_VF … #endif #ifndef PCI_DEVICE_ID_NX2_57800 #define PCI_DEVICE_ID_NX2_57800 … #endif #ifndef PCI_DEVICE_ID_NX2_57800_MF #define PCI_DEVICE_ID_NX2_57800_MF … #endif #ifndef PCI_DEVICE_ID_NX2_57800_VF #define PCI_DEVICE_ID_NX2_57800_VF … #endif #ifndef PCI_DEVICE_ID_NX2_57810 #define PCI_DEVICE_ID_NX2_57810 … #endif #ifndef PCI_DEVICE_ID_NX2_57810_MF #define PCI_DEVICE_ID_NX2_57810_MF … #endif #ifndef PCI_DEVICE_ID_NX2_57840_O #define PCI_DEVICE_ID_NX2_57840_O … #endif #ifndef PCI_DEVICE_ID_NX2_57810_VF #define PCI_DEVICE_ID_NX2_57810_VF … #endif #ifndef PCI_DEVICE_ID_NX2_57840_4_10 #define PCI_DEVICE_ID_NX2_57840_4_10 … #endif #ifndef PCI_DEVICE_ID_NX2_57840_2_20 #define PCI_DEVICE_ID_NX2_57840_2_20 … #endif #ifndef PCI_DEVICE_ID_NX2_57840_MFO #define PCI_DEVICE_ID_NX2_57840_MFO … #endif #ifndef PCI_DEVICE_ID_NX2_57840_MF #define PCI_DEVICE_ID_NX2_57840_MF … #endif #ifndef PCI_DEVICE_ID_NX2_57840_VF #define PCI_DEVICE_ID_NX2_57840_VF … #endif #ifndef PCI_DEVICE_ID_NX2_57811 #define PCI_DEVICE_ID_NX2_57811 … #endif #ifndef PCI_DEVICE_ID_NX2_57811_MF #define PCI_DEVICE_ID_NX2_57811_MF … #endif #ifndef PCI_DEVICE_ID_NX2_57811_VF #define PCI_DEVICE_ID_NX2_57811_VF … #endif static const struct pci_device_id bnx2x_pci_tbl[] = …; MODULE_DEVICE_TABLE(pci, bnx2x_pci_tbl); const u32 dmae_reg_go_c[] = …; /* Global resources for unloading a previously loaded device */ #define BNX2X_PREV_WAIT_NEEDED … static DEFINE_SEMAPHORE(bnx2x_prev_sem, 1); static LIST_HEAD(bnx2x_prev_list); /* Forward declaration */ static struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev); static u32 bnx2x_rx_ustorm_prods_offset(struct bnx2x_fastpath *fp); static int bnx2x_set_storm_rx_mode(struct bnx2x *bp); /**************************************************************************** * General service functions ****************************************************************************/ static int bnx2x_hwtstamp_ioctl(struct bnx2x *bp, struct ifreq *ifr); static void __storm_memset_dma_mapping(struct bnx2x *bp, u32 addr, dma_addr_t mapping) { … } static void storm_memset_spq_addr(struct bnx2x *bp, dma_addr_t mapping, u16 abs_fid) { … } static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, u16 pf_id) { … } static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid, u8 enable) { … } static void storm_memset_eq_data(struct bnx2x *bp, struct event_ring_data *eq_data, u16 pfid) { … } static void storm_memset_eq_prod(struct bnx2x *bp, u16 eq_prod, u16 pfid) { … } /* used only at init * locking is done by mcp */ static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val) { … } static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr) { … } #define DMAE_DP_SRC_GRC … #define DMAE_DP_SRC_PCI … #define DMAE_DP_DST_GRC … #define DMAE_DP_DST_PCI … #define DMAE_DP_DST_NONE … static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) { … } /* copy command into DMAE command memory and set DMAE command go */ void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx) { … } u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type) { … } u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode) { … } u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, bool with_comp, u8 comp_type) { … } void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, u8 src_type, u8 dst_type) { … } /* issue a dmae command over the init-channel and wait for completion */ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, u32 *comp) { … } void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, u32 len32) { … } void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) { … } static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, u32 addr, u32 len) { … } enum storms { … }; #define STORMS_NUM … #define REGS_IN_ENTRY … static inline int bnx2x_get_assert_list_entry(struct bnx2x *bp, enum storms storm, int entry) { … } static int bnx2x_mc_assert(struct bnx2x *bp) { … } #define MCPR_TRACE_BUFFER_SIZE … #define SCRATCH_BUFFER_SIZE(bp) … void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) { … } static void bnx2x_fw_dump(struct bnx2x *bp) { … } static void bnx2x_hc_int_disable(struct bnx2x *bp) { … } static void bnx2x_igu_int_disable(struct bnx2x *bp) { … } static void bnx2x_int_disable(struct bnx2x *bp) { … } void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int) { … } /* * FLR Support for E2 * * bnx2x_pf_flr_clnup() is called during nic_load in the per function HW * initialization. */ #define FLR_WAIT_USEC … #define FLR_WAIT_INTERVAL … #define FLR_POLL_CNT … struct pbf_pN_buf_regs { … }; struct pbf_pN_cmd_regs { … }; static void bnx2x_pbf_pN_buf_flushed(struct bnx2x *bp, struct pbf_pN_buf_regs *regs, u32 poll_count) { … } static void bnx2x_pbf_pN_cmd_flushed(struct bnx2x *bp, struct pbf_pN_cmd_regs *regs, u32 poll_count) { … } static u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg, u32 expected, u32 poll_count) { … } int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg, char *msg, u32 poll_cnt) { … } /* Common routines with VF FLR cleanup */ u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp) { … } void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count) { … } #define OP_GEN_PARAM(param) … #define OP_GEN_TYPE(type) … #define OP_GEN_AGG_VECT(index) … int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, u32 poll_cnt) { … } u8 bnx2x_is_pcie_pending(struct pci_dev *dev) { … } /* PF FLR specific routines */ static int bnx2x_poll_hw_usage_counters(struct bnx2x *bp, u32 poll_cnt) { … } static void bnx2x_hw_enable_status(struct bnx2x *bp) { … } static int bnx2x_pf_flr_clnup(struct bnx2x *bp) { … } static void bnx2x_hc_int_enable(struct bnx2x *bp) { … } static void bnx2x_igu_int_enable(struct bnx2x *bp) { … } void bnx2x_int_enable(struct bnx2x *bp) { … } void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw) { … } /* fast path */ /* * General service functions */ /* Return true if succeeded to acquire the lock */ static bool bnx2x_trylock_hw_lock(struct bnx2x *bp, u32 resource) { … } /** * bnx2x_get_leader_lock_resource - get the recovery leader resource id * * @bp: driver handle * * Returns the recovery leader resource id according to the engine this function * belongs to. Currently only only 2 engines is supported. */ static int bnx2x_get_leader_lock_resource(struct bnx2x *bp) { … } /** * bnx2x_trylock_leader_lock- try to acquire a leader lock. * * @bp: driver handle * * Tries to acquire a leader lock for current engine. */ static bool bnx2x_trylock_leader_lock(struct bnx2x *bp) { … } static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err); /* schedule the sp task and mark that interrupt occurred (runs from ISR) */ static int bnx2x_schedule_sp_task(struct bnx2x *bp) { … } void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) { … } irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) { … } /* Link */ /* * General service functions */ int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource) { … } int bnx2x_release_leader_lock(struct bnx2x *bp) { … } int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) { … } int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port) { … } int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) { … } int bnx2x_set_mult_gpio(struct bnx2x *bp, u8 pins, u32 mode) { … } int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) { … } static int bnx2x_set_spio(struct bnx2x *bp, int spio, u32 mode) { … } void bnx2x_calc_fc_adv(struct bnx2x *bp) { … } static void bnx2x_set_requested_fc(struct bnx2x *bp) { … } static void bnx2x_init_dropless_fc(struct bnx2x *bp) { … } int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode) { … } void bnx2x_link_set(struct bnx2x *bp) { … } static void bnx2x__link_reset(struct bnx2x *bp) { … } void bnx2x_force_link_reset(struct bnx2x *bp) { … } u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes) { … } /* Calculates the sum of vn_min_rates. It's needed for further normalizing of the min_rates. Returns: sum of vn_min_rates. or 0 - if all the min_rates are 0. In the later case fairness algorithm should be deactivated. If not all min_rates are zero then those that are zeroes will be set to 1. */ static void bnx2x_calc_vn_min(struct bnx2x *bp, struct cmng_init_input *input) { … } static void bnx2x_calc_vn_max(struct bnx2x *bp, int vn, struct cmng_init_input *input) { … } static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp) { … } void bnx2x_read_mf_cfg(struct bnx2x *bp) { … } static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) { … } static void storm_memset_cmng(struct bnx2x *bp, struct cmng_init *cmng, u8 port) { … } /* init cmng mode in HW according to local configuration */ void bnx2x_set_local_cmng(struct bnx2x *bp) { … } /* This function is called upon link interrupt */ static void bnx2x_link_attn(struct bnx2x *bp) { … } void bnx2x__link_status_update(struct bnx2x *bp) { … } static int bnx2x_afex_func_update(struct bnx2x *bp, u16 vifid, u16 vlan_val, u8 allowed_prio) { … } static int bnx2x_afex_handle_vif_list_cmd(struct bnx2x *bp, u8 cmd_type, u16 vif_index, u8 func_bit_map) { … } static void bnx2x_handle_afex_cmd(struct bnx2x *bp, u32 cmd) { … } static void bnx2x_handle_update_svid_cmd(struct bnx2x *bp) { … } static void bnx2x_pmf_update(struct bnx2x *bp) { … } /* end of Link */ /* slow path */ /* * General service functions */ /* send the MCP a request, block until there is a reply */ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) { … } static void storm_memset_func_cfg(struct bnx2x *bp, struct tstorm_eth_function_common_config *tcfg, u16 abs_fid) { … } void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) { … } /** * bnx2x_get_common_flags - Return common flags * * @bp: device handle * @fp: queue handle * @zero_stats: TRUE if statistics zeroing is needed * * Return the flags that are common for the Tx-only and not normal connections. */ static unsigned long bnx2x_get_common_flags(struct bnx2x *bp, struct bnx2x_fastpath *fp, bool zero_stats) { … } static unsigned long bnx2x_get_q_flags(struct bnx2x *bp, struct bnx2x_fastpath *fp, bool leading) { … } static void bnx2x_pf_q_prep_general(struct bnx2x *bp, struct bnx2x_fastpath *fp, struct bnx2x_general_setup_params *gen_init, u8 cos) { … } static void bnx2x_pf_rx_q_prep(struct bnx2x *bp, struct bnx2x_fastpath *fp, struct rxq_pause_params *pause, struct bnx2x_rxq_setup_params *rxq_init) { … } static void bnx2x_pf_tx_q_prep(struct bnx2x *bp, struct bnx2x_fastpath *fp, struct bnx2x_txq_setup_params *txq_init, u8 cos) { … } static void bnx2x_pf_init(struct bnx2x *bp) { … } static void bnx2x_e1h_disable(struct bnx2x *bp) { … } static void bnx2x_e1h_enable(struct bnx2x *bp) { … } #define DRV_INFO_ETH_STAT_NUM_MACS_REQUIRED … static void bnx2x_drv_info_ether_stat(struct bnx2x *bp) { … } static void bnx2x_drv_info_fcoe_stat(struct bnx2x *bp) { … } static void bnx2x_drv_info_iscsi_stat(struct bnx2x *bp) { … } /* called due to MCP event (on pmf): * reread new bandwidth configuration * configure FW * notify others function about the change */ static void bnx2x_config_mf_bw(struct bnx2x *bp) { … } static void bnx2x_set_mf_bw(struct bnx2x *bp) { … } static void bnx2x_handle_eee_event(struct bnx2x *bp) { … } #define BNX2X_UPDATE_DRV_INFO_IND_LENGTH … #define BNX2X_UPDATE_DRV_INFO_IND_COUNT … static void bnx2x_handle_drv_info_req(struct bnx2x *bp) { … } static u32 bnx2x_update_mng_version_utility(u8 *version, bool bnx2x_format) { … } void bnx2x_update_mng_version(struct bnx2x *bp) { … } void bnx2x_update_mfw_dump(struct bnx2x *bp) { … } static void bnx2x_oem_event(struct bnx2x *bp, u32 event) { … } /* must be called under the spq lock */ static struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp) { … } /* must be called under the spq lock */ static void bnx2x_sp_prod_update(struct bnx2x *bp) { … } /** * bnx2x_is_contextless_ramrod - check if the current command ends on EQ * * @cmd: command to check * @cmd_type: command type */ static bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type) { … } /** * bnx2x_sp_post - place a single command on an SP ring * * @bp: driver handle * @command: command to place (e.g. SETUP, FILTER_RULES, etc.) * @cid: SW CID the command is related to * @data_hi: command private data address (high 32 bits) * @data_lo: command private data address (low 32 bits) * @cmd_type: command type (e.g. NONE, ETH) * * SP data is handled as if it's always an address pair, thus data fields are * not swapped to little endian in upper functions. Instead this function swaps * data as if it's two u32 fields. */ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, u32 data_hi, u32 data_lo, int cmd_type) { … } /* acquire split MCP access lock register */ static int bnx2x_acquire_alr(struct bnx2x *bp) { … } /* release split MCP access lock register */ static void bnx2x_release_alr(struct bnx2x *bp) { … } #define BNX2X_DEF_SB_ATT_IDX … #define BNX2X_DEF_SB_IDX … static u16 bnx2x_update_dsb_idx(struct bnx2x *bp) { … } /* * slow path service functions */ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted) { … } static void bnx2x_fan_failure(struct bnx2x *bp) { … } static void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) { … } static void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn) { … } static void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) { … } static void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) { … } /* * Bits map: * 0-7 - Engine0 load counter. * 8-15 - Engine1 load counter. * 16 - Engine0 RESET_IN_PROGRESS bit. * 17 - Engine1 RESET_IN_PROGRESS bit. * 18 - Engine0 ONE_IS_LOADED. Set when there is at least one active function * on the engine * 19 - Engine1 ONE_IS_LOADED. * 20 - Chip reset flow bit. When set none-leader must wait for both engines * leader to complete (check for both RESET_IN_PROGRESS bits and not for * just the one belonging to its engine). * */ #define BNX2X_RECOVERY_GLOB_REG … #define BNX2X_PATH0_LOAD_CNT_MASK … #define BNX2X_PATH0_LOAD_CNT_SHIFT … #define BNX2X_PATH1_LOAD_CNT_MASK … #define BNX2X_PATH1_LOAD_CNT_SHIFT … #define BNX2X_PATH0_RST_IN_PROG_BIT … #define BNX2X_PATH1_RST_IN_PROG_BIT … #define BNX2X_GLOBAL_RESET_BIT … /* * Set the GLOBAL_RESET bit. * * Should be run under rtnl lock */ void bnx2x_set_reset_global(struct bnx2x *bp) { … } /* * Clear the GLOBAL_RESET bit. * * Should be run under rtnl lock */ static void bnx2x_clear_reset_global(struct bnx2x *bp) { … } /* * Checks the GLOBAL_RESET bit. * * should be run under rtnl lock */ static bool bnx2x_reset_is_global(struct bnx2x *bp) { … } /* * Clear RESET_IN_PROGRESS bit for the current engine. * * Should be run under rtnl lock */ static void bnx2x_set_reset_done(struct bnx2x *bp) { … } /* * Set RESET_IN_PROGRESS for the current engine. * * should be run under rtnl lock */ void bnx2x_set_reset_in_progress(struct bnx2x *bp) { … } /* * Checks the RESET_IN_PROGRESS bit for the given engine. * should be run under rtnl lock */ bool bnx2x_reset_is_done(struct bnx2x *bp, int engine) { … } /* * set pf load for the current pf. * * should be run under rtnl lock */ void bnx2x_set_pf_load(struct bnx2x *bp) { … } /** * bnx2x_clear_pf_load - clear pf load mark * * @bp: driver handle * * Should be run under rtnl lock. * Decrements the load counter for the current engine. Returns * whether other functions are still loaded */ bool bnx2x_clear_pf_load(struct bnx2x *bp) { … } /* * Read the load status for the current engine. * * should be run under rtnl lock */ static bool bnx2x_get_load_status(struct bnx2x *bp, int engine) { … } static void _print_parity(struct bnx2x *bp, u32 reg) { … } static void _print_next_block(int idx, const char *blk) { … } static bool bnx2x_check_blocks_with_parity0(struct bnx2x *bp, u32 sig, int *par_num, bool print) { … } static bool bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, int *par_num, bool *global, bool print) { … } static bool bnx2x_check_blocks_with_parity2(struct bnx2x *bp, u32 sig, int *par_num, bool print) { … } static bool bnx2x_check_blocks_with_parity3(struct bnx2x *bp, u32 sig, int *par_num, bool *global, bool print) { … } static bool bnx2x_check_blocks_with_parity4(struct bnx2x *bp, u32 sig, int *par_num, bool print) { … } static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, u32 *sig) { … } /** * bnx2x_chk_parity_attn - checks for parity attentions. * * @bp: driver handle * @global: true if there was a global attention * @print: show parity attention in syslog */ bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print) { … } static void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn) { … } static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted) { … } static void bnx2x_attn_int(struct bnx2x *bp) { … } void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, u16 index, u8 op, u8 update) { … } static void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod) { … } static int bnx2x_cnic_handle_cfc_del(struct bnx2x *bp, u32 cid, union event_ring_elem *elem) { … } static void bnx2x_handle_mcast_eqe(struct bnx2x *bp) { … } static void bnx2x_handle_classification_eqe(struct bnx2x *bp, union event_ring_elem *elem) { … } static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start); static void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp) { … } static void bnx2x_after_afex_vif_lists(struct bnx2x *bp, union event_ring_elem *elem) { … } /* called with rtnl_lock */ static void bnx2x_after_function_update(struct bnx2x *bp) { … } static struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj( struct bnx2x *bp, u32 cid) { … } static void bnx2x_eq_int(struct bnx2x *bp) { … } static void bnx2x_sp_task(struct work_struct *work) { … } irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) { … } /* end of slow path */ void bnx2x_drv_pulse(struct bnx2x *bp) { … } static void bnx2x_timer(struct timer_list *t) { … } /* end of Statistics */ /* nic init */ /* * nic init service functions */ static void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) { … } /* helper: writes FP SP data to FW - data_size in dwords */ static void bnx2x_wr_fp_sb_data(struct bnx2x *bp, int fw_sb_id, u32 *sb_data_p, u32 data_size) { … } static void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id) { … } /* helper: writes SP SB data to FW */ static void bnx2x_wr_sp_sb_data(struct bnx2x *bp, struct hc_sp_status_block_data *sp_sb_data) { … } static void bnx2x_zero_sp_sb(struct bnx2x *bp) { … } static void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, int igu_sb_id, int igu_seg_id) { … } /* allocates state machine ids. */ static void bnx2x_map_sb_state_machines(struct hc_index_data *index_data) { … } void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, u8 vf_valid, int fw_sb_id, int igu_sb_id) { … } static void bnx2x_update_coalesce_sb(struct bnx2x *bp, u8 fw_sb_id, u16 tx_usec, u16 rx_usec) { … } static void bnx2x_init_def_sb(struct bnx2x *bp) { … } void bnx2x_update_coalesce(struct bnx2x *bp) { … } static void bnx2x_init_sp_ring(struct bnx2x *bp) { … } static void bnx2x_init_eq_ring(struct bnx2x *bp) { … } /* called with netif_addr_lock_bh() */ static int bnx2x_set_q_rx_mode(struct bnx2x *bp, u8 cl_id, unsigned long rx_mode_flags, unsigned long rx_accept_flags, unsigned long tx_accept_flags, unsigned long ramrod_flags) { … } static int bnx2x_fill_accept_flags(struct bnx2x *bp, u32 rx_mode, unsigned long *rx_accept_flags, unsigned long *tx_accept_flags) { … } /* called with netif_addr_lock_bh() */ static int bnx2x_set_storm_rx_mode(struct bnx2x *bp) { … } static void bnx2x_init_internal_common(struct bnx2x *bp) { … } static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code) { … } static inline u8 bnx2x_fp_igu_sb_id(struct bnx2x_fastpath *fp) { … } static inline u8 bnx2x_fp_fw_sb_id(struct bnx2x_fastpath *fp) { … } static u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp) { … } static void bnx2x_init_eth_fp(struct bnx2x *bp, int fp_idx) { … } static void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata) { … } static void bnx2x_init_tx_rings_cnic(struct bnx2x *bp) { … } static void bnx2x_init_tx_rings(struct bnx2x *bp) { … } static void bnx2x_init_fcoe_fp(struct bnx2x *bp) { … } void bnx2x_nic_init_cnic(struct bnx2x *bp) { … } void bnx2x_pre_irq_nic_init(struct bnx2x *bp) { … } void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code) { … } /* gzip service functions */ static int bnx2x_gunzip_init(struct bnx2x *bp) { … } static void bnx2x_gunzip_end(struct bnx2x *bp) { … } static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len) { … } /* nic load/unload */ /* * General service functions */ /* send a NIG loopback debug packet */ static void bnx2x_lb_pckt(struct bnx2x *bp) { … } /* some of the internal memories * are not directly readable from the driver * to test them we send debug packets */ static int bnx2x_int_mem_test(struct bnx2x *bp) { … } static void bnx2x_enable_blocks_attention(struct bnx2x *bp) { … } static void bnx2x_reset_common(struct bnx2x *bp) { … } static void bnx2x_setup_dmae(struct bnx2x *bp) { … } static void bnx2x_init_pxp(struct bnx2x *bp) { … } static void bnx2x_setup_fan_failure_detection(struct bnx2x *bp) { … } void bnx2x_pf_disable(struct bnx2x *bp) { … } static void bnx2x__common_init_phy(struct bnx2x *bp) { … } static void bnx2x_config_endianity(struct bnx2x *bp, u32 val) { … } static void bnx2x_set_endianity(struct bnx2x *bp) { … } static void bnx2x_reset_endianity(struct bnx2x *bp) { … } /** * bnx2x_init_hw_common - initialize the HW at the COMMON phase. * * @bp: driver handle */ static int bnx2x_init_hw_common(struct bnx2x *bp) { … } /** * bnx2x_init_hw_common_chip - init HW at the COMMON_CHIP phase. * * @bp: driver handle */ static int bnx2x_init_hw_common_chip(struct bnx2x *bp) { … } static int bnx2x_init_hw_port(struct bnx2x *bp) { … } static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr) { … } void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, bool is_pf) { … } static void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) { … } static void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func) { … } static void bnx2x_init_searcher(struct bnx2x *bp) { … } static inline int bnx2x_func_switch_update(struct bnx2x *bp, int suspend) { … } static int bnx2x_reset_nic_mode(struct bnx2x *bp) { … } int bnx2x_init_hw_func_cnic(struct bnx2x *bp) { … } /* previous driver DMAE transaction may have occurred when pre-boot stage ended * and boot began, or when kdump kernel was loaded. Either case would invalidate * the addresses of the transaction, resulting in was-error bit set in the pci * causing all hw-to-host pcie transactions to timeout. If this happened we want * to clear the interrupt which detected this from the pglueb and the was done * bit */ static void bnx2x_clean_pglue_errors(struct bnx2x *bp) { … } static int bnx2x_init_hw_func(struct bnx2x *bp) { … } void bnx2x_free_mem_cnic(struct bnx2x *bp) { … } void bnx2x_free_mem(struct bnx2x *bp) { … } int bnx2x_alloc_mem_cnic(struct bnx2x *bp) { … } int bnx2x_alloc_mem(struct bnx2x *bp) { … } /* * Init service functions */ int bnx2x_set_mac_one(struct bnx2x *bp, const u8 *mac, struct bnx2x_vlan_mac_obj *obj, bool set, int mac_type, unsigned long *ramrod_flags) { … } int bnx2x_set_vlan_one(struct bnx2x *bp, u16 vlan, struct bnx2x_vlan_mac_obj *obj, bool set, unsigned long *ramrod_flags) { … } void bnx2x_clear_vlan_info(struct bnx2x *bp) { … } static int bnx2x_del_all_vlans(struct bnx2x *bp) { … } int bnx2x_del_all_macs(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *mac_obj, int mac_type, bool wait_for_comp) { … } int bnx2x_set_eth_mac(struct bnx2x *bp, bool set) { … } int bnx2x_setup_leading(struct bnx2x *bp) { … } /** * bnx2x_set_int_mode - configure interrupt mode * * @bp: driver handle * * In case of MSI-X it will also try to enable MSI-X. */ int bnx2x_set_int_mode(struct bnx2x *bp) { … } /* must be called prior to any HW initializations */ static inline u16 bnx2x_cid_ilt_lines(struct bnx2x *bp) { … } void bnx2x_ilt_set_info(struct bnx2x *bp) { … } /** * bnx2x_pf_q_prep_init - prepare INIT transition parameters * * @bp: driver handle * @fp: pointer to fastpath * @init_params: pointer to parameters structure * * parameters configured: * - HC configuration * - Queue's CDU context */ static void bnx2x_pf_q_prep_init(struct bnx2x *bp, struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params) { … } static int bnx2x_setup_tx_only(struct bnx2x *bp, struct bnx2x_fastpath *fp, struct bnx2x_queue_state_params *q_params, struct bnx2x_queue_setup_tx_only_params *tx_only_params, int tx_index, bool leading) { … } /** * bnx2x_setup_queue - setup queue * * @bp: driver handle * @fp: pointer to fastpath * @leading: is leading * * This function performs 2 steps in a Queue state machine * actually: 1) RESET->INIT 2) INIT->SETUP */ int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, bool leading) { … } static int bnx2x_stop_queue(struct bnx2x *bp, int index) { … } static void bnx2x_reset_func(struct bnx2x *bp) { … } static void bnx2x_reset_port(struct bnx2x *bp) { … } static int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code) { … } static int bnx2x_func_stop(struct bnx2x *bp) { … } /** * bnx2x_send_unload_req - request unload mode from the MCP. * * @bp: driver handle * @unload_mode: requested function's unload mode * * Return unload mode returned by the MCP: COMMON, PORT or FUNC. */ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) { … } /** * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. * * @bp: driver handle * @keep_link: true iff link should be kept up */ void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link) { … } static int bnx2x_func_wait_started(struct bnx2x *bp) { … } static void bnx2x_disable_ptp(struct bnx2x *bp) { … } /* Called during unload, to stop PTP-related stuff */ static void bnx2x_stop_ptp(struct bnx2x *bp) { … } void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link) { … } void bnx2x_disable_close_the_gate(struct bnx2x *bp) { … } /* Close gates #2, #3 and #4: */ static void bnx2x_set_234_gates(struct bnx2x *bp, bool close) { … } #define SHARED_MF_CLP_MAGIC … static void bnx2x_clp_reset_prep(struct bnx2x *bp, u32 *magic_val) { … } /** * bnx2x_clp_reset_done - restore the value of the `magic' bit. * * @bp: driver handle * @magic_val: old value of the `magic' bit. */ static void bnx2x_clp_reset_done(struct bnx2x *bp, u32 magic_val) { … } /** * bnx2x_reset_mcp_prep - prepare for MCP reset. * * @bp: driver handle * @magic_val: old value of 'magic' bit. * * Takes care of CLP configurations. */ static void bnx2x_reset_mcp_prep(struct bnx2x *bp, u32 *magic_val) { … } #define MCP_TIMEOUT … #define MCP_ONE_TIMEOUT … /** * bnx2x_mcp_wait_one - wait for MCP_ONE_TIMEOUT * * @bp: driver handle */ static void bnx2x_mcp_wait_one(struct bnx2x *bp) { … } /* * initializes bp->common.shmem_base and waits for validity signature to appear */ static int bnx2x_init_shmem(struct bnx2x *bp) { … } static int bnx2x_reset_mcp_comp(struct bnx2x *bp, u32 magic_val) { … } static void bnx2x_pxp_prep(struct bnx2x *bp) { … } /* * Reset the whole chip except for: * - PCIE core * - PCI Glue, PSWHST, PXP/PXP2 RF (all controlled by * one reset bit) * - IGU * - MISC (including AEU) * - GRC * - RBCN, RBCP */ static void bnx2x_process_kill_chip_reset(struct bnx2x *bp, bool global) { … } /** * bnx2x_er_poll_igu_vq - poll for pending writes bit. * It should get cleared in no more than 1s. * * @bp: driver handle * * It should get cleared in no more than 1s. Returns 0 if * pending writes bit gets cleared. */ static int bnx2x_er_poll_igu_vq(struct bnx2x *bp) { … } static int bnx2x_process_kill(struct bnx2x *bp, bool global) { … } static int bnx2x_leader_reset(struct bnx2x *bp) { … } static void bnx2x_recovery_failed(struct bnx2x *bp) { … } /* * Assumption: runs under rtnl lock. This together with the fact * that it's called only from bnx2x_sp_rtnl() ensure that it * will never be called when netif_running(bp->dev) is false. */ static void bnx2x_parity_recover(struct bnx2x *bp) { … } static int bnx2x_udp_port_update(struct bnx2x *bp) { … } static int bnx2x_udp_tunnel_sync(struct net_device *netdev, unsigned int table) { … } static const struct udp_tunnel_nic_info bnx2x_udp_tunnels = …; static int bnx2x_close(struct net_device *dev); /* bnx2x_nic_unload() flushes the bnx2x_wq, thus reset task is * scheduled on a general queue in order to prevent a dead lock. */ static void bnx2x_sp_rtnl_task(struct work_struct *work) { … } static void bnx2x_period_task(struct work_struct *work) { … } /* * Init service functions */ static u32 bnx2x_get_pretend_reg(struct bnx2x *bp) { … } static bool bnx2x_prev_unload_close_umac(struct bnx2x *bp, u8 port, u32 reset_reg, struct bnx2x_mac_vals *vals) { … } static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, struct bnx2x_mac_vals *vals) { … } #define BNX2X_PREV_UNDI_PROD_ADDR(p) … #define BNX2X_PREV_UNDI_PROD_ADDR_H(f) … #define BNX2X_PREV_UNDI_RCQ(val) … #define BNX2X_PREV_UNDI_BD(val) … #define BNX2X_PREV_UNDI_PROD(rcq, bd) … #define BCM_5710_UNDI_FW_MF_MAJOR … #define BCM_5710_UNDI_FW_MF_MINOR … #define BCM_5710_UNDI_FW_MF_VERS … static bool bnx2x_prev_is_after_undi(struct bnx2x *bp) { … } static void bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 inc) { … } static int bnx2x_prev_mcp_done(struct bnx2x *bp) { … } static struct bnx2x_prev_path_list * bnx2x_prev_path_get_entry(struct bnx2x *bp) { … } static int bnx2x_prev_path_mark_eeh(struct bnx2x *bp) { … } static bool bnx2x_prev_is_path_marked(struct bnx2x *bp) { … } bool bnx2x_port_after_undi(struct bnx2x *bp) { … } static int bnx2x_prev_mark_path(struct bnx2x *bp, bool after_undi) { … } static int bnx2x_do_flr(struct bnx2x *bp) { … } static int bnx2x_prev_unload_uncommon(struct bnx2x *bp) { … } static int bnx2x_prev_unload_common(struct bnx2x *bp) { … } static int bnx2x_prev_unload(struct bnx2x *bp) { … } static void bnx2x_get_common_hwinfo(struct bnx2x *bp) { … } #define IGU_FID(val) … #define IGU_VEC(val) … static int bnx2x_get_igu_cam_info(struct bnx2x *bp) { … } static void bnx2x_link_settings_supported(struct bnx2x *bp, u32 switch_cfg) { … } static void bnx2x_link_settings_requested(struct bnx2x *bp) { … } static void bnx2x_set_mac_buf(u8 *mac_buf, u32 mac_lo, u16 mac_hi) { … } static void bnx2x_get_port_hwinfo(struct bnx2x *bp) { … } void bnx2x_get_iscsi_info(struct bnx2x *bp) { … } static void bnx2x_get_ext_wwn_info(struct bnx2x *bp, int func) { … } static int bnx2x_shared_fcoe_funcs(struct bnx2x *bp) { … } static void bnx2x_get_fcoe_info(struct bnx2x *bp) { … } static void bnx2x_get_cnic_info(struct bnx2x *bp) { … } static void bnx2x_get_cnic_mac_hwinfo(struct bnx2x *bp) { … } static void bnx2x_get_mac_hwinfo(struct bnx2x *bp) { … } static bool bnx2x_get_dropless_info(struct bnx2x *bp) { … } static void validate_set_si_mode(struct bnx2x *bp) { … } static int bnx2x_get_hwinfo(struct bnx2x *bp) { … } static void bnx2x_read_fwinfo(struct bnx2x *bp) { … } static void bnx2x_set_modes_bitmap(struct bnx2x *bp) { … } static int bnx2x_init_bp(struct bnx2x *bp) { … } /**************************************************************************** * General service functions ****************************************************************************/ /* * net_device service functions */ /* called with rtnl_lock */ static int bnx2x_open(struct net_device *dev) { … } /* called with rtnl_lock */ static int bnx2x_close(struct net_device *dev) { … } struct bnx2x_mcast_list_elem_group { … }; #define MCAST_ELEMS_PER_PG … static void bnx2x_free_mcast_macs_list(struct list_head *mcast_group_list) { … } static int bnx2x_init_mcast_macs_list(struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p, struct list_head *mcast_group_list) { … } /** * bnx2x_set_uc_list - configure a new unicast MACs list. * * @bp: driver handle * * We will use zero (0) as a MAC type for these MACs. */ static int bnx2x_set_uc_list(struct bnx2x *bp) { … } static int bnx2x_set_mc_list_e1x(struct bnx2x *bp) { … } static int bnx2x_set_mc_list(struct bnx2x *bp) { … } /* If bp->state is OPEN, should be called with netif_addr_lock_bh() */ static void bnx2x_set_rx_mode(struct net_device *dev) { … } void bnx2x_set_rx_mode_inner(struct bnx2x *bp) { … } /* called with rtnl_lock */ static int bnx2x_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr) { … } /* called with rtnl_lock */ static int bnx2x_mdio_write(struct net_device *netdev, int prtad, int devad, u16 addr, u16 value) { … } /* called with rtnl_lock */ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { … } static int bnx2x_validate_addr(struct net_device *dev) { … } static int bnx2x_get_phys_port_id(struct net_device *netdev, struct netdev_phys_item_id *ppid) { … } static netdev_features_t bnx2x_features_check(struct sk_buff *skb, struct net_device *dev, netdev_features_t features) { … } static int __bnx2x_vlan_configure_vid(struct bnx2x *bp, u16 vid, bool add) { … } static int bnx2x_vlan_configure_vid_list(struct bnx2x *bp) { … } static void bnx2x_vlan_configure(struct bnx2x *bp, bool set_rx_mode) { … } int bnx2x_vlan_reconfigure_vid(struct bnx2x *bp) { … } static int bnx2x_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) { … } static int bnx2x_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) { … } static const struct net_device_ops bnx2x_netdev_ops = …; static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, struct net_device *dev, unsigned long board_type) { … } static int bnx2x_check_firmware(struct bnx2x *bp) { … } static void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n) { … } /* Ops array is stored in the following format: {op(8bit), offset(24bit, big endian), data(32bit, big endian)} */ static void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) { … } /* IRO array is stored in the following format: * {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) } */ static void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n) { … } static void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n) { … } #define BNX2X_ALLOC_AND_SET(arr, lbl, func) … static int bnx2x_init_firmware(struct bnx2x *bp) { … } static void bnx2x_release_firmware(struct bnx2x *bp) { … } static struct bnx2x_func_sp_drv_ops bnx2x_func_sp_drv = …; void bnx2x__init_func_obj(struct bnx2x *bp) { … } /* must be called after sriov-enable */ static int bnx2x_set_qm_cid_count(struct bnx2x *bp) { … } /** * bnx2x_get_num_non_def_sbs - return the number of none default SBs * @pdev: pci device * @cnic_cnt: count * */ static int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev, int cnic_cnt) { … } static int set_max_cos_est(int chip_id) { … } static int set_is_vf(int chip_id) { … } /* nig_tsgen registers relative address */ #define tsgen_ctrl … #define tsgen_freecount … #define tsgen_synctime_t0 … #define tsgen_offset_t0 … #define tsgen_drift_t0 … #define tsgen_synctime_t1 … #define tsgen_offset_t1 … #define tsgen_drift_t1 … /* FW workaround for setting drift */ static int bnx2x_send_update_drift_ramrod(struct bnx2x *bp, int drift_dir, int best_val, int best_period) { … } static int bnx2x_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { … } static int bnx2x_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { … } static int bnx2x_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) { … } static int bnx2x_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) { … } /* Enable (or disable) ancillary features of the phc subsystem */ static int bnx2x_ptp_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } void bnx2x_register_phc(struct bnx2x *bp) { … } static int bnx2x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { … } static void __bnx2x_remove(struct pci_dev *pdev, struct net_device *dev, struct bnx2x *bp, bool remove_netdev) { … } static void bnx2x_remove_one(struct pci_dev *pdev) { … } static int bnx2x_eeh_nic_unload(struct bnx2x *bp) { … } /** * bnx2x_io_error_detected - called when PCI error is detected * @pdev: Pointer to PCI device * @state: The current pci connection state * * This function is called after a PCI bus error affecting * this device has been detected. */ static pci_ers_result_t bnx2x_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) { … } /** * bnx2x_io_slot_reset - called after the PCI bus has been reset * @pdev: Pointer to PCI device * * Restart the card from scratch, as if from a cold-boot. */ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev) { … } /** * bnx2x_io_resume - called when traffic can start flowing again * @pdev: Pointer to PCI device * * This callback is called when the error recovery driver tells us that * its OK to resume normal operation. */ static void bnx2x_io_resume(struct pci_dev *pdev) { … } static const struct pci_error_handlers bnx2x_err_handler = …; static void bnx2x_shutdown(struct pci_dev *pdev) { … } static struct pci_driver bnx2x_pci_driver = …; static int __init bnx2x_init(void) { … } static void __exit bnx2x_cleanup(void) { … } void bnx2x_notify_link_changed(struct bnx2x *bp) { … } module_init(…) …; module_exit(bnx2x_cleanup); /** * bnx2x_set_iscsi_eth_mac_addr - set iSCSI MAC(s). * @bp: driver handle * * This function will wait until the ramrod completion returns. * Return 0 if success, -ENODEV if ramrod doesn't return. */ static int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp) { … } /* count denotes the number of new completions we have seen */ static void bnx2x_cnic_sp_post(struct bnx2x *bp, int count) { … } static int bnx2x_cnic_sp_queue(struct net_device *dev, struct kwqe_16 *kwqes[], u32 count) { … } static int bnx2x_cnic_ctl_send(struct bnx2x *bp, struct cnic_ctl_info *ctl) { … } static int bnx2x_cnic_ctl_send_bh(struct bnx2x *bp, struct cnic_ctl_info *ctl) { … } /* * for commands that have no data */ int bnx2x_cnic_notify(struct bnx2x *bp, int cmd) { … } static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err) { … } /* Called with netif_addr_lock_bh() taken. * Sets an rx_mode config for an iSCSI ETH client. * Doesn't block. * Completion should be checked outside. */ static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start) { … } static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) { … } static int bnx2x_get_fc_npiv(struct net_device *dev, struct cnic_fc_npiv_tbl *cnic_tbl) { … } void bnx2x_setup_cnic_irq_info(struct bnx2x *bp) { … } void bnx2x_setup_cnic_info(struct bnx2x *bp) { … } static int bnx2x_register_cnic(struct net_device *dev, struct cnic_ops *ops, void *data) { … } static int bnx2x_unregister_cnic(struct net_device *dev) { … } static struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev) { … } static u32 bnx2x_rx_ustorm_prods_offset(struct bnx2x_fastpath *fp) { … } /* called only on E1H or E2. * When pretending to be PF, the pretend value is the function number 0...7 * When pretending to be VF, the pretend val is the PF-num:VF-valid:ABS-VFID * combination */ int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val) { … } static void bnx2x_ptp_task(struct work_struct *work) { … } void bnx2x_set_rx_ts(struct bnx2x *bp, struct sk_buff *skb) { … } /* Read the PHC */ static u64 bnx2x_cyclecounter_read(const struct cyclecounter *cc) { … } static void bnx2x_init_cyclecounter(struct bnx2x *bp) { … } static int bnx2x_send_reset_timesync_ramrod(struct bnx2x *bp) { … } static int bnx2x_enable_ptp_packets(struct bnx2x *bp) { … } #define BNX2X_P2P_DETECT_PARAM_MASK … #define BNX2X_P2P_DETECT_RULE_MASK … #define BNX2X_PTP_TX_ON_PARAM_MASK … #define BNX2X_PTP_TX_ON_RULE_MASK … #define BNX2X_PTP_V1_L4_PARAM_MASK … #define BNX2X_PTP_V1_L4_RULE_MASK … #define BNX2X_PTP_V2_L4_PARAM_MASK … #define BNX2X_PTP_V2_L4_RULE_MASK … #define BNX2X_PTP_V2_L2_PARAM_MASK … #define BNX2X_PTP_V2_L2_RULE_MASK … #define BNX2X_PTP_V2_PARAM_MASK … #define BNX2X_PTP_V2_RULE_MASK … int bnx2x_configure_ptp_filters(struct bnx2x *bp) { … } static int bnx2x_hwtstamp_ioctl(struct bnx2x *bp, struct ifreq *ifr) { … } /* Configures HW for PTP */ static int bnx2x_configure_ptp(struct bnx2x *bp) { … } /* Called during load, to initialize PTP-related stuff */ void bnx2x_init_ptp(struct bnx2x *bp) { … }
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