// SPDX-License-Identifier: GPL-2.0-only /***************************************************************************** * * * File: subr.c * * $Revision: 1.27 $ * * $Date: 2005/06/22 01:08:36 $ * * Description: * * Various subroutines (intr,pio,etc.) used by Chelsio 10G Ethernet driver. * * part of the Chelsio 10Gb Ethernet Driver. * * * * * * http://www.chelsio.com * * * * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. * * All rights reserved. * * * * Maintainers: [email protected] * * * * Authors: Dimitrios Michailidis <[email protected]> * * Tina Yang <[email protected]> * * Felix Marti <[email protected]> * * Scott Bardone <[email protected]> * * Kurt Ottaway <[email protected]> * * Frank DiMambro <[email protected]> * * * * History: * * * ****************************************************************************/ #include "common.h" #include "elmer0.h" #include "regs.h" #include "gmac.h" #include "cphy.h" #include "sge.h" #include "tp.h" #include "espi.h" /** * t1_wait_op_done - wait until an operation is completed * @adapter: the adapter performing the operation * @reg: the register to check for completion * @mask: a single-bit field within @reg that indicates completion * @polarity: the value of the field when the operation is completed * @attempts: number of check iterations * @delay: delay in usecs between iterations * * Wait until an operation is completed by checking a bit in a register * up to @attempts times. Returns %0 if the operation completes and %1 * otherwise. */ static int t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity, int attempts, int delay) { … } #define TPI_ATTEMPTS … /* * Write a register over the TPI interface (unlocked and locked versions). */ int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value) { … } int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value) { … } /* * Read a register over the TPI interface (unlocked and locked versions). */ int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) { … } int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) { … } /* * Set a TPI parameter. */ static void t1_tpi_par(adapter_t *adapter, u32 value) { … } /* * Called when a port's link settings change to propagate the new values to the * associated PHY and MAC. After performing the common tasks it invokes an * OS-specific handler. */ void t1_link_changed(adapter_t *adapter, int port_id) { … } static bool t1_pci_intr_handler(adapter_t *adapter) { … } #ifdef CONFIG_CHELSIO_T1_1G #include "fpga_defs.h" /* * PHY interrupt handler for FPGA boards. */ static int fpga_phy_intr_handler(adapter_t *adapter) { … } /* * Slow path interrupt handler for FPGAs. */ static irqreturn_t fpga_slow_intr(adapter_t *adapter) { … } #endif /* * Wait until Elmer's MI1 interface is ready for new operations. */ static int mi1_wait_until_ready(adapter_t *adapter, int mi1_reg) { … } /* * MI1 MDIO initialization. */ static void mi1_mdio_init(adapter_t *adapter, const struct board_info *bi) { … } #if defined(CONFIG_CHELSIO_T1_1G) /* * Elmer MI1 MDIO read/write operations. */ static int mi1_mdio_read(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr) { … } static int mi1_mdio_write(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr, u16 val) { … } static const struct mdio_ops mi1_mdio_ops = …; #endif static int mi1_mdio_ext_read(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr) { … } static int mi1_mdio_ext_write(struct net_device *dev, int phy_addr, int mmd_addr, u16 reg_addr, u16 val) { … } static const struct mdio_ops mi1_mdio_ext_ops = …; enum { … }; static const struct board_info t1_board[] = …; const struct pci_device_id t1_pci_tbl[] = …; MODULE_DEVICE_TABLE(pci, t1_pci_tbl); /* * Return the board_info structure with a given index. Out-of-range indices * return NULL. */ const struct board_info *t1_get_board_info(unsigned int board_id) { … } struct chelsio_vpd_t { … }; #define EEPROMSIZE … #define EEPROM_MAX_POLL … /* * Read SEEPROM. A zero is written to the flag register when the address is * written to the Control register. The hardware device will set the flag to a * one when 4B have been transferred to the Data register. */ int t1_seeprom_read(adapter_t *adapter, u32 addr, __le32 *data) { … } static int t1_eeprom_vpd_get(adapter_t *adapter, struct chelsio_vpd_t *vpd) { … } /* * Read a port's MAC address from the VPD ROM. */ static int vpd_macaddress_get(adapter_t *adapter, int index, u8 mac_addr[]) { … } /* * Set up the MAC/PHY according to the requested link settings. * * If the PHY can auto-negotiate first decide what to advertise, then * enable/disable auto-negotiation as desired and reset. * * If the PHY does not auto-negotiate we just reset it. * * If auto-negotiation is off set the MAC to the proper speed/duplex/FC, * otherwise do it later based on the outcome of auto-negotiation. */ int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc) { … } /* * External interrupt handler for boards using elmer0. */ int t1_elmer0_ext_intr_handler(adapter_t *adapter) { … } /* Enables all interrupts. */ void t1_interrupts_enable(adapter_t *adapter) { … } /* Disables all interrupts. */ void t1_interrupts_disable(adapter_t* adapter) { … } /* Clears all interrupts */ void t1_interrupts_clear(adapter_t* adapter) { … } /* * Slow path interrupt handler for ASICs. */ static irqreturn_t asic_slow_intr(adapter_t *adapter) { … } irqreturn_t t1_slow_intr_handler(adapter_t *adapter) { … } /* Power sequencing is a work-around for Intel's XPAKs. */ static void power_sequence_xpak(adapter_t* adapter) { … } int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, struct adapter_params *p) { … } /* * Enable board components other than the Chelsio chip, such as external MAC * and PHY. */ static int board_init(adapter_t *adapter, const struct board_info *bi) { … } /* * Initialize and configure the Terminator HW modules. Note that external * MAC and PHYs are initialized separately. */ int t1_init_hw_modules(adapter_t *adapter) { … } /* * Determine a card's PCI mode. */ static void get_pci_mode(adapter_t *adapter, struct chelsio_pci_params *p) { … } /* * Release the structures holding the SW per-Terminator-HW-module state. */ void t1_free_sw_modules(adapter_t *adapter) { … } static void init_link_config(struct link_config *lc, const struct board_info *bi) { … } /* * Allocate and initialize the data structures that hold the SW state of * the Terminator HW modules. */ int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi) { … }
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