/* SPDX-License-Identifier: GPL-2.0 */ /* $Date: 2005/03/07 23:59:05 $ $RCSfile: mv88e1xxx.h,v $ $Revision: 1.13 $ */ #ifndef CHELSIO_MV8E1XXX_H #define CHELSIO_MV8E1XXX_H #ifndef BMCR_SPEED1000 #define BMCR_SPEED1000 … #endif #ifndef ADVERTISE_PAUSE #define ADVERTISE_PAUSE … #endif #ifndef ADVERTISE_PAUSE_ASYM #define ADVERTISE_PAUSE_ASYM … #endif /* Gigabit MII registers */ #define MII_GBCR … #define MII_GBSR … /* 1000Base-T control register fields */ #define GBCR_ADV_1000HALF … #define GBCR_ADV_1000FULL … #define GBCR_PREFER_MASTER … #define GBCR_MANUAL_AS_MASTER … #define GBCR_MANUAL_CONFIG_ENABLE … /* 1000Base-T status register fields */ #define GBSR_LP_1000HALF … #define GBSR_LP_1000FULL … #define GBSR_REMOTE_OK … #define GBSR_LOCAL_OK … #define GBSR_LOCAL_MASTER … #define GBSR_MASTER_FAULT … /* Marvell PHY interrupt status bits. */ #define MV88E1XXX_INTR_JABBER … #define MV88E1XXX_INTR_POLARITY_CHNG … #define MV88E1XXX_INTR_ENG_DETECT_CHNG … #define MV88E1XXX_INTR_DOWNSHIFT … #define MV88E1XXX_INTR_MDI_XOVER_CHNG … #define MV88E1XXX_INTR_FIFO_OVER_UNDER … #define MV88E1XXX_INTR_FALSE_CARRIER … #define MV88E1XXX_INTR_SYMBOL_ERROR … #define MV88E1XXX_INTR_LINK_CHNG … #define MV88E1XXX_INTR_AUTONEG_DONE … #define MV88E1XXX_INTR_PAGE_RECV … #define MV88E1XXX_INTR_DUPLEX_CHNG … #define MV88E1XXX_INTR_SPEED_CHNG … #define MV88E1XXX_INTR_AUTONEG_ERR … /* Marvell PHY specific registers. */ #define MV88E1XXX_SPECIFIC_CNTRL_REGISTER … #define MV88E1XXX_SPECIFIC_STATUS_REGISTER … #define MV88E1XXX_INTERRUPT_ENABLE_REGISTER … #define MV88E1XXX_INTERRUPT_STATUS_REGISTER … #define MV88E1XXX_EXT_PHY_SPECIFIC_CNTRL_REGISTER … #define MV88E1XXX_RECV_ERR_CNTR_REGISTER … #define MV88E1XXX_RES_REGISTER … #define MV88E1XXX_GLOBAL_STATUS_REGISTER … #define MV88E1XXX_LED_CONTROL_REGISTER … #define MV88E1XXX_MANUAL_LED_OVERRIDE_REGISTER … #define MV88E1XXX_EXT_PHY_SPECIFIC_CNTRL_2_REGISTER … #define MV88E1XXX_EXT_PHY_SPECIFIC_STATUS_REGISTER … #define MV88E1XXX_VIRTUAL_CABLE_TESTER_REGISTER … #define MV88E1XXX_EXTENDED_ADDR_REGISTER … #define MV88E1XXX_EXTENDED_REGISTER … /* PHY specific control register fields */ #define S_PSCR_MDI_XOVER_MODE … #define M_PSCR_MDI_XOVER_MODE … #define V_PSCR_MDI_XOVER_MODE(x) … #define G_PSCR_MDI_XOVER_MODE(x) … /* Extended PHY specific control register fields */ #define S_DOWNSHIFT_ENABLE … #define V_DOWNSHIFT_ENABLE … #define S_DOWNSHIFT_CNT … #define M_DOWNSHIFT_CNT … #define V_DOWNSHIFT_CNT(x) … #define G_DOWNSHIFT_CNT(x) … /* PHY specific status register fields */ #define S_PSSR_JABBER … #define V_PSSR_JABBER … #define S_PSSR_POLARITY … #define V_PSSR_POLARITY … #define S_PSSR_RX_PAUSE … #define V_PSSR_RX_PAUSE … #define S_PSSR_TX_PAUSE … #define V_PSSR_TX_PAUSE … #define S_PSSR_ENERGY_DETECT … #define V_PSSR_ENERGY_DETECT … #define S_PSSR_DOWNSHIFT_STATUS … #define V_PSSR_DOWNSHIFT_STATUS … #define S_PSSR_MDI … #define V_PSSR_MDI … #define S_PSSR_CABLE_LEN … #define M_PSSR_CABLE_LEN … #define V_PSSR_CABLE_LEN(x) … #define G_PSSR_CABLE_LEN(x) … #define S_PSSR_LINK … #define V_PSSR_LINK … #define S_PSSR_STATUS_RESOLVED … #define V_PSSR_STATUS_RESOLVED … #define S_PSSR_PAGE_RECEIVED … #define V_PSSR_PAGE_RECEIVED … #define S_PSSR_DUPLEX … #define V_PSSR_DUPLEX … #define S_PSSR_SPEED … #define M_PSSR_SPEED … #define V_PSSR_SPEED(x) … #define G_PSSR_SPEED(x) … #endif
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