/* * This file is part of the Chelsio T6 Crypto driver for Linux. * * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifndef __CHCR_CORE_H__ #define __CHCR_CORE_H__ #include <crypto/algapi.h> #include <net/tls.h> #include "t4_hw.h" #include "cxgb4.h" #include "t4_msg.h" #include "cxgb4_uld.h" #define DRV_MODULE_NAME … #define DRV_DESC … #define MAX_PENDING_REQ_TO_HW … #define CHCR_TEST_RESPONSE_TIMEOUT … #define WQ_DETACH_TM … #define PAD_ERROR_BIT … #define CHK_PAD_ERR_BIT(x) … #define MAC_ERROR_BIT … #define CHK_MAC_ERR_BIT(x) … #define MAX_SALT … #define CIP_WR_MIN_LEN … #define HASH_WR_MIN_LEN … struct uld_ctx; struct _key_ctx { … }; #define WQ_RETRY … struct chcr_driver_data { … }; enum chcr_state { … }; struct chcr_wr { … }; struct chcr_dev { … }; struct uld_ctx { … }; /* * sgl_len - calculates the size of an SGL of the given capacity * @n: the number of SGL entries * Calculates the number of flits needed for a scatter/gather list that * can hold the given number of entries. */ static inline unsigned int sgl_len(unsigned int n) { … } static inline void *padap(struct chcr_dev *dev) { … } struct uld_ctx *assign_chcr_device(void); int chcr_send_wr(struct sk_buff *skb); int start_crypto(void); int stop_crypto(void); int chcr_uld_rx_handler(void *handle, const __be64 *rsp, const struct pkt_gl *pgl); int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input, int err); #endif /* __CHCR_CORE_H__ */
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