/* SPDX-License-Identifier: GPL-2.0 */ /* * DPAA2 Ethernet Switch declarations * * Copyright 2014-2016 Freescale Semiconductor Inc. * Copyright 2017-2021 NXP * */ #ifndef __ETHSW_H #define __ETHSW_H #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/rtnetlink.h> #include <linux/if_vlan.h> #include <uapi/linux/if_bridge.h> #include <net/switchdev.h> #include <linux/if_bridge.h> #include <linux/fsl/mc.h> #include <net/pkt_cls.h> #include <soc/fsl/dpaa2-io.h> #include "dpaa2-mac.h" #include "dpsw.h" /* Number of IRQs supported */ #define DPSW_IRQ_NUM … /* Port is member of VLAN */ #define ETHSW_VLAN_MEMBER … /* VLAN to be treated as untagged on egress */ #define ETHSW_VLAN_UNTAGGED … /* Untagged frames will be assigned to this VLAN */ #define ETHSW_VLAN_PVID … /* VLAN configured on the switch */ #define ETHSW_VLAN_GLOBAL … /* Maximum Frame Length supported by HW (currently 10k) */ #define DPAA2_MFL … #define ETHSW_MAX_FRAME_LENGTH … #define ETHSW_L2_MAX_FRM(mtu) … #define ETHSW_FEATURE_MAC_ADDR … /* Number of receive queues (one RX and one TX_CONF) */ #define DPAA2_SWITCH_RX_NUM_FQS … /* Hardware requires alignment for ingress/egress buffer addresses */ #define DPAA2_SWITCH_RX_BUF_RAW_SIZE … #define DPAA2_SWITCH_RX_BUF_TAILROOM … #define DPAA2_SWITCH_RX_BUF_SIZE … #define DPAA2_SWITCH_STORE_SIZE … /* Buffer management */ #define BUFS_PER_CMD … #define DPAA2_ETHSW_NUM_BUFS … #define DPAA2_ETHSW_REFILL_THRESH … /* Number of times to retry DPIO portal operations while waiting * for portal to finish executing current command and become * available. We want to avoid being stuck in a while loop in case * hardware becomes unresponsive, but not give up too easily if * the portal really is busy for valid reasons */ #define DPAA2_SWITCH_SWP_BUSY_RETRIES … /* Hardware annotation buffer size */ #define DPAA2_SWITCH_HWA_SIZE … /* Software annotation buffer size */ #define DPAA2_SWITCH_SWA_SIZE … #define DPAA2_SWITCH_TX_BUF_ALIGN … #define DPAA2_SWITCH_TX_DATA_OFFSET … #define DPAA2_SWITCH_NEEDED_HEADROOM … #define DPAA2_ETHSW_PORT_MAX_ACL_ENTRIES … #define DPAA2_ETHSW_PORT_DEFAULT_TRAPS … #define DPAA2_ETHSW_PORT_ACL_CMD_BUF_SIZE … extern const struct ethtool_ops dpaa2_switch_port_ethtool_ops; struct ethsw_core; struct dpaa2_switch_fq { … }; struct dpaa2_switch_fdb { … }; struct dpaa2_switch_acl_entry { … }; struct dpaa2_switch_mirror_entry { … }; struct dpaa2_switch_filter_block { … }; static inline bool dpaa2_switch_acl_tbl_is_full(struct dpaa2_switch_filter_block *filter_block) { … } /* Per port private data */ struct ethsw_port_priv { … }; /* Switch data */ struct ethsw_core { … }; static inline int dpaa2_switch_get_index(struct ethsw_core *ethsw, struct net_device *netdev) { … } static inline bool dpaa2_switch_supports_cpu_traffic(struct ethsw_core *ethsw) { … } static inline bool dpaa2_switch_port_is_type_phy(struct ethsw_port_priv *port_priv) { … } static inline bool dpaa2_switch_port_has_mac(struct ethsw_port_priv *port_priv) { … } bool dpaa2_switch_port_dev_check(const struct net_device *netdev); int dpaa2_switch_port_vlans_add(struct net_device *netdev, const struct switchdev_obj_port_vlan *vlan); int dpaa2_switch_port_vlans_del(struct net_device *netdev, const struct switchdev_obj_port_vlan *vlan); dpaa2_switch_fdb_cb_t; /* TC offload */ int dpaa2_switch_cls_flower_replace(struct dpaa2_switch_filter_block *block, struct flow_cls_offload *cls); int dpaa2_switch_cls_flower_destroy(struct dpaa2_switch_filter_block *block, struct flow_cls_offload *cls); int dpaa2_switch_cls_matchall_replace(struct dpaa2_switch_filter_block *block, struct tc_cls_matchall_offload *cls); int dpaa2_switch_cls_matchall_destroy(struct dpaa2_switch_filter_block *block, struct tc_cls_matchall_offload *cls); int dpaa2_switch_acl_entry_add(struct dpaa2_switch_filter_block *block, struct dpaa2_switch_acl_entry *entry); int dpaa2_switch_block_offload_mirror(struct dpaa2_switch_filter_block *block, struct ethsw_port_priv *port_priv); int dpaa2_switch_block_unoffload_mirror(struct dpaa2_switch_filter_block *block, struct ethsw_port_priv *port_priv); #endif /* __ETHSW_H */
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