linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h

/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (c) 2016-2017 Hisilicon Limited. */

#ifndef __HCLGEVF_MAIN_H
#define __HCLGEVF_MAIN_H
#include <linux/fs.h>
#include <linux/if_vlan.h>
#include <linux/types.h>
#include <net/devlink.h>
#include "hclge_mbx.h"
#include "hclgevf_cmd.h"
#include "hnae3.h"
#include "hclge_comm_rss.h"
#include "hclge_comm_tqp_stats.h"

#define HCLGEVF_MOD_VERSION
#define HCLGEVF_DRIVER_NAME

#define HCLGEVF_MAX_VLAN_ID
#define HCLGEVF_MISC_VECTOR_NUM

#define HCLGEVF_INVALID_VPORT
#define HCLGEVF_GENERAL_TASK_INTERVAL
#define HCLGEVF_KEEP_ALIVE_TASK_INTERVAL

/* This number in actual depends upon the total number of VFs
 * created by physical function. But the maximum number of
 * possible vector-per-VF is {VFn(1-32), VECTn(32 + 1)}.
 */
#define HCLGEVF_MAX_VF_VECTOR_NUM

#define HCLGEVF_VECTOR_REG_BASE
#define HCLGEVF_MISC_VECTOR_REG_BASE
#define HCLGEVF_VECTOR_REG_OFFSET
#define HCLGEVF_VECTOR_VF_OFFSET

/* bar registers for common func */
#define HCLGEVF_GRO_EN_REG
#define HCLGEVF_RXD_ADV_LAYOUT_EN_REG

/* bar registers for rcb */
#define HCLGEVF_RING_RX_ADDR_L_REG
#define HCLGEVF_RING_RX_ADDR_H_REG
#define HCLGEVF_RING_RX_BD_NUM_REG
#define HCLGEVF_RING_RX_BD_LENGTH_REG
#define HCLGEVF_RING_RX_MERGE_EN_REG
#define HCLGEVF_RING_RX_TAIL_REG
#define HCLGEVF_RING_RX_HEAD_REG
#define HCLGEVF_RING_RX_FBD_NUM_REG
#define HCLGEVF_RING_RX_OFFSET_REG
#define HCLGEVF_RING_RX_FBD_OFFSET_REG
#define HCLGEVF_RING_RX_STASH_REG
#define HCLGEVF_RING_RX_BD_ERR_REG
#define HCLGEVF_RING_TX_ADDR_L_REG
#define HCLGEVF_RING_TX_ADDR_H_REG
#define HCLGEVF_RING_TX_BD_NUM_REG
#define HCLGEVF_RING_TX_PRIORITY_REG
#define HCLGEVF_RING_TX_TC_REG
#define HCLGEVF_RING_TX_MERGE_EN_REG
#define HCLGEVF_RING_TX_TAIL_REG
#define HCLGEVF_RING_TX_HEAD_REG
#define HCLGEVF_RING_TX_FBD_NUM_REG
#define HCLGEVF_RING_TX_OFFSET_REG
#define HCLGEVF_RING_TX_EBD_NUM_REG
#define HCLGEVF_RING_TX_EBD_OFFSET_REG
#define HCLGEVF_RING_TX_BD_ERR_REG
#define HCLGEVF_RING_EN_REG

/* bar registers for tqp interrupt */
#define HCLGEVF_TQP_INTR_CTRL_REG
#define HCLGEVF_TQP_INTR_GL0_REG
#define HCLGEVF_TQP_INTR_GL1_REG
#define HCLGEVF_TQP_INTR_GL2_REG
#define HCLGEVF_TQP_INTR_RL_REG

/* CMDQ register bits for RX event(=MBX event) */
#define HCLGEVF_VECTOR0_RX_CMDQ_INT_B
/* RST register bits for RESET event */
#define HCLGEVF_VECTOR0_RST_INT_B

#define HCLGEVF_TQP_RESET_TRY_TIMES
/* Reset related Registers */
#define HCLGEVF_RST_ING
#define HCLGEVF_FUN_RST_ING_BIT
#define HCLGEVF_GLOBAL_RST_ING_BIT
#define HCLGEVF_CORE_RST_ING_BIT
#define HCLGEVF_IMP_RST_ING_BIT
#define HCLGEVF_RST_ING_BITS

#define HCLGEVF_VF_RST_ING
#define HCLGEVF_VF_RST_ING_BIT

#define HCLGEVF_WAIT_RESET_DONE

#define HCLGEVF_RSS_IND_TBL_SIZE

#define HCLGEVF_TQP_MEM_SIZE
#define HCLGEVF_MEM_BAR
/* in the bar4, the first half is for roce, and the second half is for nic */
#define HCLGEVF_NIC_MEM_OFFSET(hdev)
#define HCLGEVF_TQP_MEM_OFFSET(hdev, i)

#define HCLGEVF_MAC_MAX_FRAME

#define HCLGEVF_STATS_TIMER_INTERVAL

#define hclgevf_read_dev(a, reg)
#define hclgevf_write_dev(a, reg, value)

enum hclgevf_evt_cause {};

/* states of hclgevf device & tasks */
enum hclgevf_states {};

struct hclgevf_mac {};

struct hclgevf_hw {};

struct hclgevf_cfg {};

struct hclgevf_misc_vector {};

struct hclgevf_rst_stats {};

enum HCLGEVF_MAC_ADDR_TYPE {};

enum HCLGEVF_MAC_NODE_STATE {};

struct hclgevf_mac_addr_node {};

struct hclgevf_mac_table_cfg {};

struct hclgevf_dev {};

static inline bool hclgevf_is_reset_pending(struct hclgevf_dev *hdev)
{}

int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev,
			 struct hclge_vf_to_pf_msg *send_msg, bool need_resp,
			 u8 *resp_data, u16 resp_len);
void hclgevf_mbx_handler(struct hclgevf_dev *hdev);
void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev);

void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state);
void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed,
				 u8 duplex);
void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev);
void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev);
void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state,
			struct hclge_mbx_port_base_vlan *port_base_vlan);
struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle);
#endif