linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c

// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2023 Hisilicon Limited.

#include "hclge_cmd.h"
#include "hclge_main.h"
#include "hclge_regs.h"
#include "hnae3.h"

static const u32 cmdq_reg_addr_list[] = …;

static const u32 common_reg_addr_list[] = …;

static const u32 ring_reg_addr_list[] = …;

static const u32 tqp_intr_reg_addr_list[] = …;

/* Get DFX BD number offset */
#define HCLGE_DFX_BIOS_BD_OFFSET …
#define HCLGE_DFX_SSU_0_BD_OFFSET …
#define HCLGE_DFX_SSU_1_BD_OFFSET …
#define HCLGE_DFX_IGU_BD_OFFSET …
#define HCLGE_DFX_RPU_0_BD_OFFSET …
#define HCLGE_DFX_RPU_1_BD_OFFSET …
#define HCLGE_DFX_NCSI_BD_OFFSET …
#define HCLGE_DFX_RTC_BD_OFFSET …
#define HCLGE_DFX_PPP_BD_OFFSET …
#define HCLGE_DFX_RCB_BD_OFFSET …
#define HCLGE_DFX_TQP_BD_OFFSET …
#define HCLGE_DFX_SSU_2_BD_OFFSET …

static const u32 hclge_dfx_bd_offset_list[] = …;

static const enum hclge_opcode_type hclge_dfx_reg_opcode_list[] = …;

enum hclge_reg_tag { … };

#pragma pack(4)
struct hclge_reg_tlv { … };

struct hclge_reg_header { … };

#pragma pack()

#define HCLGE_REG_TLV_SIZE …
#define HCLGE_REG_HEADER_SIZE …
#define HCLGE_REG_TLV_SPACE …
#define HCLGE_REG_HEADER_SPACE …
#define HCLGE_REG_MAGIC_NUMBER …

#define HCLGE_REG_RPU_TNL_ID_0 …

static u32 hclge_reg_get_header(void *data)
{ … }

static u32 hclge_reg_get_tlv(u32 tag, u32 regs_num, void *data)
{ … }

static int hclge_get_32_bit_regs(struct hclge_dev *hdev, u32 regs_num,
				 void *data)
{ … }

static int hclge_get_64_bit_regs(struct hclge_dev *hdev, u32 regs_num,
				 void *data)
{ … }

int hclge_query_bd_num_cmd_send(struct hclge_dev *hdev, struct hclge_desc *desc)
{ … }

static int hclge_get_dfx_reg_bd_num(struct hclge_dev *hdev,
				    int *bd_num_list,
				    u32 type_num)
{ … }

static int hclge_dfx_reg_cmd_send(struct hclge_dev *hdev,
				  struct hclge_desc *desc_src, int bd_num,
				  enum hclge_opcode_type cmd)
{ … }

/* tnl_id = 0 means get sum of all tnl reg's value */
static int hclge_dfx_reg_rpu_tnl_cmd_send(struct hclge_dev *hdev, u32 tnl_id,
					  struct hclge_desc *desc, int bd_num)
{ … }

static int hclge_dfx_reg_fetch_data(struct hclge_desc *desc_src, int bd_num,
				    void *data)
{ … }

static int hclge_get_dfx_reg_len(struct hclge_dev *hdev, int *len)
{ … }

static int hclge_get_dfx_rpu_tnl_reg(struct hclge_dev *hdev, u32 *reg,
				     struct hclge_desc *desc_src,
				     int bd_num)
{ … }

static int hclge_get_dfx_reg(struct hclge_dev *hdev, void *data)
{ … }

static int hclge_fetch_pf_reg(struct hclge_dev *hdev, void *data,
			      struct hnae3_knic_private_info *kinfo)
{ … }

static int hclge_get_regs_num(struct hclge_dev *hdev, u32 *regs_num_32_bit,
			      u32 *regs_num_64_bit)
{ … }

int hclge_get_regs_len(struct hnae3_handle *handle)
{ … }

void hclge_get_regs(struct hnae3_handle *handle, u32 *version,
		    void *data)
{ … }