#ifndef HINIC_HW_IF_H
#define HINIC_HW_IF_H
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/types.h>
#include <asm/byteorder.h>
#define HINIC_PCIE_LINK_DOWN …
#define HINIC_DMA_ATTR_ST_SHIFT …
#define HINIC_DMA_ATTR_AT_SHIFT …
#define HINIC_DMA_ATTR_PH_SHIFT …
#define HINIC_DMA_ATTR_NO_SNOOPING_SHIFT …
#define HINIC_DMA_ATTR_TPH_EN_SHIFT …
#define HINIC_DMA_ATTR_ST_MASK …
#define HINIC_DMA_ATTR_AT_MASK …
#define HINIC_DMA_ATTR_PH_MASK …
#define HINIC_DMA_ATTR_NO_SNOOPING_MASK …
#define HINIC_DMA_ATTR_TPH_EN_MASK …
#define HINIC_DMA_ATTR_SET(val, member) …
#define HINIC_DMA_ATTR_CLEAR(val, member) …
#define HINIC_FA0_FUNC_IDX_SHIFT …
#define HINIC_FA0_PF_IDX_SHIFT …
#define HINIC_FA0_PCI_INTF_IDX_SHIFT …
#define HINIC_FA0_VF_IN_PF_SHIFT …
#define HINIC_FA0_FUNC_TYPE_SHIFT …
#define HINIC_FA0_FUNC_IDX_MASK …
#define HINIC_FA0_PF_IDX_MASK …
#define HINIC_FA0_PCI_INTF_IDX_MASK …
#define HINIC_FA0_FUNC_TYPE_MASK …
#define HINIC_FA0_VF_IN_PF_MASK …
#define HINIC_FA0_GET(val, member) …
#define HINIC_FA1_AEQS_PER_FUNC_SHIFT …
#define HINIC_FA1_CEQS_PER_FUNC_SHIFT …
#define HINIC_FA1_IRQS_PER_FUNC_SHIFT …
#define HINIC_FA1_DMA_ATTR_PER_FUNC_SHIFT …
#define HINIC_FA1_MGMT_INIT_STATUS_SHIFT …
#define HINIC_FA1_PF_INIT_STATUS_SHIFT …
#define HINIC_FA1_AEQS_PER_FUNC_MASK …
#define HINIC_FA1_CEQS_PER_FUNC_MASK …
#define HINIC_FA1_IRQS_PER_FUNC_MASK …
#define HINIC_FA1_DMA_ATTR_PER_FUNC_MASK …
#define HINIC_FA1_MGMT_INIT_STATUS_MASK …
#define HINIC_FA1_PF_INIT_STATUS_MASK …
#define HINIC_FA1_GET(val, member) …
#define HINIC_FA2_GLOBAL_VF_ID_OF_PF_SHIFT …
#define HINIC_FA2_GLOBAL_VF_ID_OF_PF_MASK …
#define HINIC_FA2_GET(val, member) …
#define HINIC_FA4_OUTBOUND_STATE_SHIFT …
#define HINIC_FA4_DB_STATE_SHIFT …
#define HINIC_FA4_OUTBOUND_STATE_MASK …
#define HINIC_FA4_DB_STATE_MASK …
#define HINIC_FA4_GET(val, member) …
#define HINIC_FA4_SET(val, member) …
#define HINIC_FA4_CLEAR(val, member) …
#define HINIC_FA5_PF_ACTION_SHIFT …
#define HINIC_FA5_PF_ACTION_MASK …
#define HINIC_FA5_SET(val, member) …
#define HINIC_FA5_CLEAR(val, member) …
#define HINIC_PPF_ELECTION_IDX_SHIFT …
#define HINIC_PPF_ELECTION_IDX_MASK …
#define HINIC_PPF_ELECTION_SET(val, member) …
#define HINIC_PPF_ELECTION_GET(val, member) …
#define HINIC_PPF_ELECTION_CLEAR(val, member) …
#define HINIC_MSIX_PENDING_LIMIT_SHIFT …
#define HINIC_MSIX_COALESC_TIMER_SHIFT …
#define HINIC_MSIX_LLI_TIMER_SHIFT …
#define HINIC_MSIX_LLI_CREDIT_SHIFT …
#define HINIC_MSIX_RESEND_TIMER_SHIFT …
#define HINIC_MSIX_PENDING_LIMIT_MASK …
#define HINIC_MSIX_COALESC_TIMER_MASK …
#define HINIC_MSIX_LLI_TIMER_MASK …
#define HINIC_MSIX_LLI_CREDIT_MASK …
#define HINIC_MSIX_RESEND_TIMER_MASK …
#define HINIC_MSIX_ATTR_SET(val, member) …
#define HINIC_MSIX_CNT_RESEND_TIMER_SHIFT …
#define HINIC_MSIX_CNT_RESEND_TIMER_MASK …
#define HINIC_MSIX_CNT_SET(val, member) …
#define HINIC_HWIF_NUM_AEQS(hwif) …
#define HINIC_HWIF_NUM_CEQS(hwif) …
#define HINIC_HWIF_NUM_IRQS(hwif) …
#define HINIC_HWIF_FUNC_IDX(hwif) …
#define HINIC_HWIF_PCI_INTF(hwif) …
#define HINIC_HWIF_PF_IDX(hwif) …
#define HINIC_HWIF_PPF_IDX(hwif) …
#define HINIC_FUNC_TYPE(hwif) …
#define HINIC_IS_VF(hwif) …
#define HINIC_IS_PF(hwif) …
#define HINIC_IS_PPF(hwif) …
#define HINIC_PCI_CFG_REGS_BAR …
#define HINIC_PCI_INTR_REGS_BAR …
#define HINIC_PCI_DB_BAR …
#define HINIC_PCIE_ST_DISABLE …
#define HINIC_PCIE_AT_DISABLE …
#define HINIC_PCIE_PH_DISABLE …
#define HINIC_EQ_MSIX_PENDING_LIMIT_DEFAULT …
#define HINIC_EQ_MSIX_COALESC_TIMER_DEFAULT …
#define HINIC_EQ_MSIX_LLI_TIMER_DEFAULT …
#define HINIC_EQ_MSIX_LLI_CREDIT_LIMIT_DEFAULT …
#define HINIC_EQ_MSIX_RESEND_TIMER_DEFAULT …
#define HINIC_PCI_MSIX_ENTRY_SIZE …
#define HINIC_PCI_MSIX_ENTRY_VECTOR_CTRL …
#define HINIC_PCI_MSIX_ENTRY_CTRL_MASKBIT …
enum hinic_pcie_nosnoop { … };
enum hinic_pcie_tph { … };
enum hinic_func_type { … };
enum hinic_mod_type { … };
enum hinic_node_id { … };
enum hinic_pf_action { … };
enum hinic_outbound_state { … };
enum hinic_db_state { … };
enum hinic_msix_state { … };
struct hinic_func_attr { … };
struct hinic_hwif { … };
static inline u32 hinic_hwif_read_reg(struct hinic_hwif *hwif, u32 reg)
{ … }
static inline void hinic_hwif_write_reg(struct hinic_hwif *hwif, u32 reg,
u32 val)
{ … }
int hinic_msix_attr_set(struct hinic_hwif *hwif, u16 msix_index,
u8 pending_limit, u8 coalesc_timer,
u8 lli_timer_cfg, u8 lli_credit_limit,
u8 resend_timer);
void hinic_set_msix_state(struct hinic_hwif *hwif, u16 msix_idx,
enum hinic_msix_state flag);
int hinic_msix_attr_cnt_clear(struct hinic_hwif *hwif, u16 msix_index);
void hinic_set_pf_action(struct hinic_hwif *hwif, enum hinic_pf_action action);
enum hinic_outbound_state hinic_outbound_state_get(struct hinic_hwif *hwif);
void hinic_outbound_state_set(struct hinic_hwif *hwif,
enum hinic_outbound_state outbound_state);
enum hinic_db_state hinic_db_state_get(struct hinic_hwif *hwif);
void hinic_db_state_set(struct hinic_hwif *hwif,
enum hinic_db_state db_state);
u16 hinic_glb_pf_vf_offset(struct hinic_hwif *hwif);
u16 hinic_global_func_id_hw(struct hinic_hwif *hwif);
u16 hinic_pf_id_of_vf_hw(struct hinic_hwif *hwif);
int hinic_init_hwif(struct hinic_hwif *hwif, struct pci_dev *pdev);
void hinic_free_hwif(struct hinic_hwif *hwif);
#endif