linux/drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Huawei HiNIC PCI Express Linux driver
 * Copyright(c) 2017 Huawei Technologies Co., Ltd
 */

#ifndef HINIC_HW_CSR_H
#define HINIC_HW_CSR_H

/* HW interface registers */
#define HINIC_CSR_FUNC_ATTR0_ADDR
#define HINIC_CSR_FUNC_ATTR1_ADDR
#define HINIC_CSR_FUNC_ATTR2_ADDR
#define HINIC_CSR_FUNC_ATTR4_ADDR
#define HINIC_CSR_FUNC_ATTR5_ADDR

#define HINIC_DMA_ATTR_BASE
#define HINIC_ELECTION_BASE

#define HINIC_DMA_ATTR_STRIDE
#define HINIC_CSR_DMA_ATTR_ADDR(idx)

#define HINIC_PPF_ELECTION_STRIDE

#define HINIC_CSR_PPF_ELECTION_ADDR(idx)

/* API CMD registers */
#define HINIC_CSR_API_CMD_BASE

#define HINIC_CSR_API_CMD_STRIDE

#define HINIC_CSR_API_CMD_CHAIN_HEAD_HI_ADDR(idx)

#define HINIC_CSR_API_CMD_CHAIN_HEAD_LO_ADDR(idx)

#define HINIC_CSR_API_CMD_STATUS_HI_ADDR(idx)

#define HINIC_CSR_API_CMD_STATUS_LO_ADDR(idx)

#define HINIC_CSR_API_CMD_CHAIN_NUM_CELLS_ADDR(idx)

#define HINIC_CSR_API_CMD_CHAIN_CTRL_ADDR(idx)

#define HINIC_CSR_API_CMD_CHAIN_PI_ADDR(idx)

#define HINIC_CSR_API_CMD_CHAIN_REQ_ADDR(idx)

#define HINIC_CSR_API_CMD_STATUS_ADDR(idx)

/* MSI-X registers */
#define HINIC_CSR_MSIX_CTRL_BASE
#define HINIC_CSR_MSIX_CNT_BASE

#define HINIC_CSR_MSIX_STRIDE

#define HINIC_CSR_MSIX_CTRL_ADDR(idx)

#define HINIC_CSR_MSIX_CNT_ADDR(idx)

/* EQ registers */
#define HINIC_AEQ_MTT_OFF_BASE_ADDR
#define HINIC_CEQ_MTT_OFF_BASE_ADDR

#define HINIC_EQ_MTT_OFF_STRIDE

#define HINIC_CSR_AEQ_MTT_OFF(id)

#define HINIC_CSR_CEQ_MTT_OFF(id)

#define HINIC_CSR_EQ_PAGE_OFF_STRIDE

#define HINIC_CSR_AEQ_HI_PHYS_ADDR_REG(q_id, pg_num)

#define HINIC_CSR_CEQ_HI_PHYS_ADDR_REG(q_id, pg_num)

#define HINIC_CSR_AEQ_LO_PHYS_ADDR_REG(q_id, pg_num)

#define HINIC_CSR_CEQ_LO_PHYS_ADDR_REG(q_id, pg_num)

#define HINIC_AEQ_CTRL_0_ADDR_BASE
#define HINIC_AEQ_CTRL_1_ADDR_BASE
#define HINIC_AEQ_CONS_IDX_ADDR_BASE
#define HINIC_AEQ_PROD_IDX_ADDR_BASE

#define HINIC_CEQ_CTRL_0_ADDR_BASE
#define HINIC_CEQ_CTRL_1_ADDR_BASE
#define HINIC_CEQ_CONS_IDX_ADDR_BASE
#define HINIC_CEQ_PROD_IDX_ADDR_BASE

#define HINIC_EQ_OFF_STRIDE

#define HINIC_CSR_AEQ_CTRL_0_ADDR(idx)

#define HINIC_CSR_AEQ_CTRL_1_ADDR(idx)

#define HINIC_CSR_AEQ_CONS_IDX_ADDR(idx)

#define HINIC_CSR_AEQ_PROD_IDX_ADDR(idx)

#define HINIC_CSR_CEQ_CTRL_0_ADDR(idx)

#define HINIC_CSR_CEQ_CTRL_1_ADDR(idx)

#define HINIC_CSR_CEQ_CONS_IDX_ADDR(idx)

#define HINIC_CSR_CEQ_PROD_IDX_ADDR(idx)

#endif