// SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2018 Intel Corporation */ #include <linux/pci.h> #include <linux/delay.h> #include "igc_mac.h" #include "igc_hw.h" /** * igc_disable_pcie_master - Disables PCI-express master access * @hw: pointer to the HW structure * * Returns 0 (0) if successful, else returns -10 * (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused * the master requests to be disabled. * * Disables PCI-Express master access and verifies there are no pending * requests. */ s32 igc_disable_pcie_master(struct igc_hw *hw) { … } /** * igc_init_rx_addrs - Initialize receive addresses * @hw: pointer to the HW structure * @rar_count: receive address registers * * Setup the receive address registers by setting the base receive address * register to the devices MAC address and clearing all the other receive * address registers to 0. */ void igc_init_rx_addrs(struct igc_hw *hw, u16 rar_count) { … } /** * igc_set_fc_watermarks - Set flow control high/low watermarks * @hw: pointer to the HW structure * * Sets the flow control high/low threshold (watermark) registers. If * flow control XON frame transmission is enabled, then set XON frame * transmission as well. */ static s32 igc_set_fc_watermarks(struct igc_hw *hw) { … } /** * igc_setup_link - Setup flow control and link settings * @hw: pointer to the HW structure * * Determines which flow control settings to use, then configures flow * control. Calls the appropriate media-specific link configuration * function. Assuming the adapter has a valid link partner, a valid link * should be established. Assumes the hardware has previously been reset * and the transmitter and receiver are not enabled. */ s32 igc_setup_link(struct igc_hw *hw) { … } /** * igc_force_mac_fc - Force the MAC's flow control settings * @hw: pointer to the HW structure * * Force the MAC's flow control settings. Sets the TFCE and RFCE bits in the * device control register to reflect the adapter settings. TFCE and RFCE * need to be explicitly set by software when a copper PHY is used because * autonegotiation is managed by the PHY rather than the MAC. Software must * also configure these bits when link is forced on a fiber connection. */ s32 igc_force_mac_fc(struct igc_hw *hw) { … } /** * igc_clear_hw_cntrs_base - Clear base hardware counters * @hw: pointer to the HW structure * * Clears the base hardware counters by reading the counter registers. */ void igc_clear_hw_cntrs_base(struct igc_hw *hw) { … } /** * igc_rar_set - Set receive address register * @hw: pointer to the HW structure * @addr: pointer to the receive address * @index: receive address array register * * Sets the receive address array register at index to the address passed * in by addr. */ void igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index) { … } /** * igc_check_for_copper_link - Check for link (Copper) * @hw: pointer to the HW structure * * Checks to see of the link status of the hardware has changed. If a * change in link status has been detected, then we read the PHY registers * to get the current speed/duplex if link exists. */ s32 igc_check_for_copper_link(struct igc_hw *hw) { … } /** * igc_config_collision_dist - Configure collision distance * @hw: pointer to the HW structure * * Configures the collision distance to the default value and is used * during link setup. Currently no func pointer exists and all * implementations are handled in the generic version of this function. */ void igc_config_collision_dist(struct igc_hw *hw) { … } /** * igc_config_fc_after_link_up - Configures flow control after link * @hw: pointer to the HW structure * * Checks the status of auto-negotiation after link up to ensure that the * speed and duplex were not forced. If the link needed to be forced, then * flow control needs to be forced also. If auto-negotiation is enabled * and did not fail, then we configure flow control based on our link * partner. */ s32 igc_config_fc_after_link_up(struct igc_hw *hw) { … } /** * igc_get_auto_rd_done - Check for auto read completion * @hw: pointer to the HW structure * * Check EEPROM for Auto Read done bit. */ s32 igc_get_auto_rd_done(struct igc_hw *hw) { … } /** * igc_get_speed_and_duplex_copper - Retrieve current speed/duplex * @hw: pointer to the HW structure * @speed: stores the current speed * @duplex: stores the current duplex * * Read the status register for the current speed/duplex and store the current * speed and duplex for copper connections. */ s32 igc_get_speed_and_duplex_copper(struct igc_hw *hw, u16 *speed, u16 *duplex) { … } /** * igc_put_hw_semaphore - Release hardware semaphore * @hw: pointer to the HW structure * * Release hardware semaphore used to access the PHY or NVM */ void igc_put_hw_semaphore(struct igc_hw *hw) { … } /** * igc_enable_mng_pass_thru - Enable processing of ARP's * @hw: pointer to the HW structure * * Verifies the hardware needs to leave interface enabled so that frames can * be directed to and from the management interface. */ bool igc_enable_mng_pass_thru(struct igc_hw *hw) { … } /** * igc_hash_mc_addr - Generate a multicast hash value * @hw: pointer to the HW structure * @mc_addr: pointer to a multicast address * * Generates a multicast address hash value which is used to determine * the multicast filter table array address and new table value. See * igc_mta_set() **/ static u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr) { … } /** * igc_update_mc_addr_list - Update Multicast addresses * @hw: pointer to the HW structure * @mc_addr_list: array of multicast addresses to program * @mc_addr_count: number of multicast addresses to program * * Updates entire Multicast Table Array. * The caller must have a packed mc_addr_list of multicast addresses. **/ void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list, u32 mc_addr_count) { … }
Codebase Browser
linux