// SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 1999 - 2018 Intel Corporation. */ #include <linux/pci.h> #include <linux/delay.h> #include <linux/sched.h> #include "ixgbe.h" #include "ixgbe_phy.h" #include "ixgbe_x540.h" #define IXGBE_X540_MAX_TX_QUEUES … #define IXGBE_X540_MAX_RX_QUEUES … #define IXGBE_X540_RAR_ENTRIES … #define IXGBE_X540_MC_TBL_SIZE … #define IXGBE_X540_VFT_TBL_SIZE … #define IXGBE_X540_RX_PB_SIZE … static int ixgbe_update_flash_X540(struct ixgbe_hw *hw); static int ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw); static int ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw); static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw); enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) { … } int ixgbe_get_invariants_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_setup_mac_link_X540 - Set the auto advertised capabilitires * @hw: pointer to hardware structure * @speed: new link speed * @autoneg_wait_to_complete: true when waiting for completion is needed **/ int ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed, bool autoneg_wait_to_complete) { … } /** * ixgbe_reset_hw_X540 - Perform hardware reset * @hw: pointer to hardware structure * * Resets the hardware by resetting the transmit and receive units, masks * and clears all interrupts, perform a PHY reset, and perform a link (MAC) * reset. **/ int ixgbe_reset_hw_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx * @hw: pointer to hardware structure * * Starts the hardware using the generic start_hw function * and the generation start_hw function. * Then performs revision-specific operations, if any. **/ int ixgbe_start_hw_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params * @hw: pointer to hardware structure * * Initializes the EEPROM parameters ixgbe_eeprom_info within the * ixgbe_hw struct in order to set up EEPROM access. **/ int ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_read_eerd_X540- Read EEPROM word using EERD * @hw: pointer to hardware structure * @offset: offset of word in the EEPROM to read * @data: word read from the EEPROM * * Reads a 16 bit word from the EEPROM using the EERD register. **/ static int ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) { … } /** * ixgbe_read_eerd_buffer_X540 - Read EEPROM word(s) using EERD * @hw: pointer to hardware structure * @offset: offset of word in the EEPROM to read * @words: number of words * @data: word(s) read from the EEPROM * * Reads a 16 bit word(s) from the EEPROM using the EERD register. **/ static int ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words, u16 *data) { … } /** * ixgbe_write_eewr_X540 - Write EEPROM word using EEWR * @hw: pointer to hardware structure * @offset: offset of word in the EEPROM to write * @data: word write to the EEPROM * * Write a 16 bit word to the EEPROM using the EEWR register. **/ static int ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) { … } /** * ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR * @hw: pointer to hardware structure * @offset: offset of word in the EEPROM to write * @words: number of words * @data: word(s) write to the EEPROM * * Write a 16 bit word(s) to the EEPROM using the EEWR register. **/ static int ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words, u16 *data) { … } /** * ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum * * This function does not use synchronization for EERD and EEWR. It can * be used internally by function which utilize ixgbe_acquire_swfw_sync_X540. * * @hw: pointer to hardware structure **/ static int ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum * @hw: pointer to hardware structure * @checksum_val: calculated checksum * * Performs checksum calculation and validates the EEPROM checksum. If the * caller does not need checksum_val, the value can be NULL. **/ static int ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val) { … } /** * ixgbe_update_eeprom_checksum_X540 - Updates the EEPROM checksum and flash * @hw: pointer to hardware structure * * After writing EEPROM to shadow RAM using EEWR register, software calculates * checksum and updates the EEPROM and instructs the hardware to update * the flash. **/ static int ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device * @hw: pointer to hardware structure * * Set FLUP (bit 23) of the EEC register to instruct Hardware to copy * EEPROM from shadow RAM to the flash device. **/ static int ixgbe_update_flash_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_poll_flash_update_done_X540 - Poll flash update status * @hw: pointer to hardware structure * * Polls the FLUDONE (bit 26) of the EEC Register to determine when the * flash update is done. **/ static int ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore * @hw: pointer to hardware structure * @mask: Mask to specify which semaphore to acquire * * Acquires the SWFW semaphore thought the SW_FW_SYNC register for * the specified function (CSR, PHY0, PHY1, NVM, Flash) **/ int ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) { … } /** * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore * @hw: pointer to hardware structure * @mask: Mask to specify which semaphore to release * * Releases the SWFW semaphore through the SW_FW_SYNC register * for the specified function (CSR, PHY0, PHY1, EVM, Flash) **/ void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) { … } /** * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore * @hw: pointer to hardware structure * * Sets the hardware semaphores so SW/FW can gain control of shared resources */ static int ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw) { … } /** * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore * @hw: pointer to hardware structure * * This function clears hardware semaphore bits. **/ static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw) { … } /** * ixgbe_init_swfw_sync_X540 - Release hardware semaphore * @hw: pointer to hardware structure * * This function reset hardware semaphore bits for a semaphore that may * have be left locked due to a catastrophic failure. **/ void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw) { … } /** * ixgbe_blink_led_start_X540 - Blink LED based on index. * @hw: pointer to hardware structure * @index: led number to blink * * Devices that implement the version 2 interface: * X540 **/ int ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index) { … } /** * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index. * @hw: pointer to hardware structure * @index: led number to stop blinking * * Devices that implement the version 2 interface: * X540 **/ int ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index) { … } static const struct ixgbe_mac_operations mac_ops_X540 = …; static const struct ixgbe_eeprom_operations eeprom_ops_X540 = …; static const struct ixgbe_phy_operations phy_ops_X540 = …; static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = …; const struct ixgbe_info ixgbe_X540_info = …;
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