/* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (C) 2023 Intel Corporation */ #ifndef _ICE_ETHTOOL_H_ #define _ICE_ETHTOOL_H_ struct ice_phy_type_to_ethtool { … }; struct ice_serdes_equalization_to_ethtool { … }; struct ice_regdump_to_ethtool { … }; /* Port topology from lport i.e. * serdes mapping, pcsquad, macport, cage etc... */ struct ice_port_topology { … }; /* Macro to make PHY type to Ethtool link mode table entry. * The index is the PHY type. */ #define ICE_PHY_TYPE(LINK_SPEED, ETHTOOL_LINK_MODE) … /* Lookup table mapping PHY type low to link speed and Ethtool link modes. * Array index corresponds to HW PHY type bit, see * ice_adminq_cmd.h:ICE_PHY_TYPE_LOW_*. */ static const struct ice_phy_type_to_ethtool phy_type_low_lkup[] = …; /* Lookup table mapping PHY type high to link speed and Ethtool link modes. * Array index corresponds to HW PHY type bit, see * ice_adminq_cmd.h:ICE_PHY_TYPE_HIGH_* */ static const struct ice_phy_type_to_ethtool phy_type_high_lkup[] = …; #endif /* !_ICE_ETHTOOL_H_ */