// SPDX-License-Identifier: GPL-2.0 /* * PCIe host controller driver for Freescale Layerscape SoCs * * Copyright (C) 2014 Freescale Semiconductor. * Copyright 2021 NXP * * Author: Minghuan Lian <[email protected]> */ #include <linux/delay.h> #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/iopoll.h> #include <linux/of_pci.h> #include <linux/of_platform.h> #include <linux/of_address.h> #include <linux/pci.h> #include <linux/platform_device.h> #include <linux/resource.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include "../../pci.h" #include "pcie-designware.h" /* PEX Internal Configuration Registers */ #define PCIE_STRFMR1 … #define PCIE_ABSERR … #define PCIE_ABSERR_SETTING … /* PF Message Command Register */ #define LS_PCIE_PF_MCR … #define PF_MCR_PTOMR … #define PF_MCR_EXL2S … /* LS1021A PEXn PM Write Control Register */ #define SCFG_PEXPMWRCR(idx) … #define PMXMTTURNOFF … #define SCFG_PEXSFTRSTCR … #define PEXSR(idx) … /* LS1043A PEX PME control register */ #define SCFG_PEXPMECR … #define PEXPME(idx) … /* LS1043A PEX LUT debug register */ #define LS_PCIE_LDBG … #define LDBG_SR … #define LDBG_WE … #define PCIE_IATU_NUM … struct ls_pcie_drvdata { … }; struct ls_pcie { … }; #define ls_pcie_pf_lut_readl_addr(addr) … #define to_ls_pcie(x) … static bool ls_pcie_is_bridge(struct ls_pcie *pcie) { … } /* Clear multi-function bit */ static void ls_pcie_clear_multifunction(struct ls_pcie *pcie) { … } /* Drop MSG TLP except for Vendor MSG */ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) { … } /* Forward error response of outbound non-posted requests */ static void ls_pcie_fix_error_response(struct ls_pcie *pcie) { … } static u32 ls_pcie_pf_lut_readl(struct ls_pcie *pcie, u32 off) { … } static void ls_pcie_pf_lut_writel(struct ls_pcie *pcie, u32 off, u32 val) { … } static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) { … } static int ls_pcie_exit_from_l2(struct dw_pcie_rp *pp) { … } static int ls_pcie_host_init(struct dw_pcie_rp *pp) { … } static void scfg_pcie_send_turnoff_msg(struct regmap *scfg, u32 reg, u32 mask) { … } static void ls1021a_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) { … } static int scfg_pcie_exit_from_l2(struct regmap *scfg, u32 reg, u32 mask) { … } static int ls1021a_pcie_exit_from_l2(struct dw_pcie_rp *pp) { … } static void ls1043a_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) { … } static int ls1043a_pcie_exit_from_l2(struct dw_pcie_rp *pp) { … } static const struct dw_pcie_host_ops ls_pcie_host_ops = …; static const struct dw_pcie_host_ops ls1021a_pcie_host_ops = …; static const struct ls_pcie_drvdata ls1021a_drvdata = …; static const struct dw_pcie_host_ops ls1043a_pcie_host_ops = …; static const struct ls_pcie_drvdata ls1043a_drvdata = …; static const struct ls_pcie_drvdata layerscape_drvdata = …; static const struct of_device_id ls_pcie_of_match[] = …; static int ls_pcie_probe(struct platform_device *pdev) { … } static int ls_pcie_suspend_noirq(struct device *dev) { … } static int ls_pcie_resume_noirq(struct device *dev) { … } static const struct dev_pm_ops ls_pcie_pm_ops = …; static struct platform_driver ls_pcie_driver = …; builtin_platform_driver(…) …;
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