linux/drivers/pci/controller/dwc/pcie-al.c

// SPDX-License-Identifier: GPL-2.0
/*
 * PCIe host controller driver for Amazon's Annapurna Labs IP (used in chips
 * such as Graviton and Alpine)
 *
 * Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
 *
 * Author: Jonathan Chocron <[email protected]>
 */

#include <linux/pci.h>
#include <linux/pci-ecam.h>
#include <linux/pci-acpi.h>
#include "../../pci.h"

#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)

struct al_pcie_acpi  {};

static void __iomem *al_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
				     int where)
{}

static int al_pcie_init(struct pci_config_window *cfg)
{}

const struct pci_ecam_ops al_pcie_ops =;

#endif /* defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) */

#ifdef CONFIG_PCIE_AL

#include <linux/of_pci.h>
#include "pcie-designware.h"

#define AL_PCIE_REV_ID_2
#define AL_PCIE_REV_ID_3
#define AL_PCIE_REV_ID_4

#define AXI_BASE_OFFSET

#define DEVICE_ID_OFFSET

#define DEVICE_REV_ID
#define DEVICE_REV_ID_DEV_ID_MASK

#define DEVICE_REV_ID_DEV_ID_X4
#define DEVICE_REV_ID_DEV_ID_X8
#define DEVICE_REV_ID_DEV_ID_X16

#define OB_CTRL_REV1_2_OFFSET
#define OB_CTRL_REV3_5_OFFSET

#define CFG_TARGET_BUS
#define CFG_TARGET_BUS_MASK_MASK
#define CFG_TARGET_BUS_BUSNUM_MASK

#define CFG_CONTROL
#define CFG_CONTROL_SUBBUS_MASK
#define CFG_CONTROL_SEC_BUS_MASK

struct al_pcie_reg_offsets {};

struct al_pcie_target_bus_cfg {};

struct al_pcie {};

#define to_al_pcie(x)

static inline u32 al_pcie_controller_readl(struct al_pcie *pcie, u32 offset)
{}

static inline void al_pcie_controller_writel(struct al_pcie *pcie, u32 offset,
					     u32 val)
{}

static int al_pcie_rev_id_get(struct al_pcie *pcie, unsigned int *rev_id)
{}

static int al_pcie_reg_offsets_set(struct al_pcie *pcie)
{}

static inline void al_pcie_target_bus_set(struct al_pcie *pcie,
					  u8 target_bus,
					  u8 mask_target_bus)
{}

static void __iomem *al_pcie_conf_addr_map_bus(struct pci_bus *bus,
					       unsigned int devfn, int where)
{}

static struct pci_ops al_child_pci_ops =;

static int al_pcie_config_prepare(struct al_pcie *pcie)
{}

static int al_pcie_host_init(struct dw_pcie_rp *pp)
{}

static const struct dw_pcie_host_ops al_pcie_host_ops =;

static int al_pcie_probe(struct platform_device *pdev)
{}

static const struct of_device_id al_pcie_of_match[] =;

static struct platform_driver al_pcie_driver =;
builtin_platform_driver();

#endif /* CONFIG_PCIE_AL*/