linux/drivers/pci/controller/pcie-rcar-host.c

// SPDX-License-Identifier: GPL-2.0
/*
 * PCIe driver for Renesas R-Car SoCs
 *  Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
 *
 * Based on:
 *  arch/sh/drivers/pci/pcie-sh7786.c
 *  arch/sh/drivers/pci/ops-sh7786.c
 *  Copyright (C) 2009 - 2011  Paul Mundt
 *
 * Author: Phil Edworthy <[email protected]>
 */

#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/iopoll.h>
#include <linux/msi.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>

#include "pcie-rcar.h"

struct rcar_msi {};

/* Structure representing the PCIe interface */
struct rcar_pcie_host {};

static DEFINE_SPINLOCK(pmsr_lock);

static int rcar_pcie_wakeup(struct device *pcie_dev, void __iomem *pcie_base)
{}

static struct rcar_pcie_host *msi_to_host(struct rcar_msi *msi)
{}

static u32 rcar_read_conf(struct rcar_pcie *pcie, int where)
{}

#ifdef CONFIG_ARM
#define __rcar_pci_rw_reg_workaround
#endif

static int rcar_pci_write_reg_workaround(struct rcar_pcie *pcie, u32 val,
					 unsigned int reg)
{}

static int rcar_pci_read_reg_workaround(struct rcar_pcie *pcie, u32 *val,
					unsigned int reg)
{}

/* Serialization is provided by 'pci_lock' in drivers/pci/access.c */
static int rcar_pcie_config_access(struct rcar_pcie_host *host,
		unsigned char access_type, struct pci_bus *bus,
		unsigned int devfn, int where, u32 *data)
{}

static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn,
			       int where, int size, u32 *val)
{}

/* Serialization is provided by 'pci_lock' in drivers/pci/access.c */
static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn,
				int where, int size, u32 val)
{}

static struct pci_ops rcar_pcie_ops =;

static void rcar_pcie_force_speedup(struct rcar_pcie *pcie)
{}

static void rcar_pcie_hw_enable(struct rcar_pcie_host *host)
{}

static int rcar_pcie_enable(struct rcar_pcie_host *host)
{}

static int phy_wait_for_ack(struct rcar_pcie *pcie)
{}

static void phy_write_reg(struct rcar_pcie *pcie,
			  unsigned int rate, u32 addr,
			  unsigned int lane, u32 data)
{}

static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
{}

static int rcar_pcie_phy_init_h1(struct rcar_pcie_host *host)
{}

static int rcar_pcie_phy_init_gen2(struct rcar_pcie_host *host)
{}

static int rcar_pcie_phy_init_gen3(struct rcar_pcie_host *host)
{}

static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
{}

static void rcar_msi_top_irq_ack(struct irq_data *d)
{}

static void rcar_msi_top_irq_mask(struct irq_data *d)
{}

static void rcar_msi_top_irq_unmask(struct irq_data *d)
{}

static struct irq_chip rcar_msi_top_chip =;

static void rcar_msi_irq_ack(struct irq_data *d)
{}

static void rcar_msi_irq_mask(struct irq_data *d)
{}

static void rcar_msi_irq_unmask(struct irq_data *d)
{}

static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{}

static struct irq_chip rcar_msi_bottom_chip =;

static int rcar_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
				  unsigned int nr_irqs, void *args)
{}

static void rcar_msi_domain_free(struct irq_domain *domain, unsigned int virq,
				  unsigned int nr_irqs)
{}

static const struct irq_domain_ops rcar_msi_domain_ops =;

static struct msi_domain_info rcar_msi_info =;

static int rcar_allocate_domains(struct rcar_msi *msi)
{}

static void rcar_free_domains(struct rcar_msi *msi)
{}

static int rcar_pcie_enable_msi(struct rcar_pcie_host *host)
{}

static void rcar_pcie_teardown_msi(struct rcar_pcie_host *host)
{}

static int rcar_pcie_get_resources(struct rcar_pcie_host *host)
{}

static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie,
				    struct resource_entry *entry,
				    int *index)
{}

static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie_host *host)
{}

static const struct of_device_id rcar_pcie_of_match[] =;

/* Design note 346 from Linear Technology says order is not important. */
static const char * const rcar_pcie_supplies[] =;

static int rcar_pcie_probe(struct platform_device *pdev)
{}

static int rcar_pcie_resume(struct device *dev)
{}

static int rcar_pcie_resume_noirq(struct device *dev)
{}

static const struct dev_pm_ops rcar_pcie_pm_ops =;

static struct platform_driver rcar_pcie_driver =;

#ifdef CONFIG_ARM
static int rcar_pcie_aarch32_abort_handler(unsigned long addr,
		unsigned int fsr, struct pt_regs *regs)
{
	return !fixup_exception(regs);
}

static const struct of_device_id rcar_pcie_abort_handler_of_match[] __initconst = {
	{ .compatible = "renesas,pcie-r8a7779" },
	{ .compatible = "renesas,pcie-r8a7790" },
	{ .compatible = "renesas,pcie-r8a7791" },
	{ .compatible = "renesas,pcie-rcar-gen2" },
	{},
};

static int __init rcar_pcie_init(void)
{
	if (of_find_matching_node(NULL, rcar_pcie_abort_handler_of_match)) {
#ifdef CONFIG_ARM_LPAE
		hook_fault_code(17, rcar_pcie_aarch32_abort_handler, SIGBUS, 0,
				"asynchronous external abort");
#else
		hook_fault_code(22, rcar_pcie_aarch32_abort_handler, SIGBUS, 0,
				"imprecise external abort");
#endif
	}

	return platform_driver_register(&rcar_pcie_driver);
}
device_initcall(rcar_pcie_init);
#else
builtin_platform_driver();
#endif