linux/drivers/net/ethernet/mellanox/mlxsw/i2c.c

// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
/* Copyright (c) 2016-2018 Mellanox Technologies. All rights reserved */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/mutex.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_data/mlxreg.h>
#include <linux/slab.h>

#include "cmd.h"
#include "core.h"
#include "i2c.h"
#include "resources.h"

#define MLXSW_I2C_CIR2_BASE
#define MLXSW_I2C_CIR_STATUS_OFF
#define MLXSW_I2C_CIR2_OFF_STATUS
#define MLXSW_I2C_OPMOD_SHIFT
#define MLXSW_I2C_EVENT_BIT_SHIFT
#define MLXSW_I2C_GO_BIT_SHIFT
#define MLXSW_I2C_CIR_CTRL_STATUS_SHIFT
#define MLXSW_I2C_EVENT_BIT
#define MLXSW_I2C_GO_BIT
#define MLXSW_I2C_GO_OPMODE
#define MLXSW_I2C_SET_IMM_CMD
#define MLXSW_I2C_PUSH_IMM_CMD
#define MLXSW_I2C_SET_CMD
#define MLXSW_I2C_PUSH_CMD
#define MLXSW_I2C_TLV_HDR_SIZE
#define MLXSW_I2C_ADDR_WIDTH
#define MLXSW_I2C_PUSH_CMD_SIZE
#define MLXSW_I2C_SET_EVENT_CMD
#define MLXSW_I2C_PUSH_EVENT_CMD
#define MLXSW_I2C_READ_SEMA_SIZE
#define MLXSW_I2C_PREP_SIZE
#define MLXSW_I2C_MBOX_SIZE
#define MLXSW_I2C_MBOX_OUT_PARAM_OFF
#define MLXSW_I2C_MBOX_OFFSET_BITS
#define MLXSW_I2C_MBOX_SIZE_BITS
#define MLXSW_I2C_ADDR_BUF_SIZE
#define MLXSW_I2C_BLK_DEF
#define MLXSW_I2C_BLK_MAX
#define MLXSW_I2C_RETRY
#define MLXSW_I2C_TIMEOUT_MSECS
#define MLXSW_I2C_MAX_DATA_SIZE

/* Driver can be initialized by kernel platform driver or from the user
 * space. In the first case IRQ line number is passed through the platform
 * data, otherwise default IRQ line is to be used. Default IRQ is relevant
 * only for specific I2C slave address, allowing 3.4 MHz I2C path to the chip
 * (special hardware feature for I2C acceleration).
 */
#define MLXSW_I2C_DEFAULT_IRQ
#define MLXSW_FAST_I2C_SLAVE

/**
 * struct mlxsw_i2c - device private data:
 * @cmd: command attributes;
 * @cmd.mb_size_in: input mailbox size;
 * @cmd.mb_off_in: input mailbox offset in register space;
 * @cmd.mb_size_out: output mailbox size;
 * @cmd.mb_off_out: output mailbox offset in register space;
 * @cmd.lock: command execution lock;
 * @dev: I2C device;
 * @core: switch core pointer;
 * @bus_info: bus info block;
 * @block_size: maximum block size allowed to pass to under layer;
 * @pdata: device platform data;
 * @irq_work: interrupts work item;
 * @irq: IRQ line number;
 */
struct mlxsw_i2c {};

#define MLXSW_I2C_READ_MSG(_client, _addr_buf, _buf, _len)

#define MLXSW_I2C_WRITE_MSG(_client, _buf, _len)

/* Routine converts in and out mail boxes offset and size. */
static inline void
mlxsw_i2c_convert_mbox(struct mlxsw_i2c *mlxsw_i2c, u8 *buf)
{}

/* Routine obtains register size from mail box buffer. */
static inline int mlxsw_i2c_get_reg_size(u8 *in_mbox)
{}

/* Routine sets I2C device internal offset in the transaction buffer. */
static inline void mlxsw_i2c_set_slave_addr(u8 *buf, u32 off)
{}

/* Routine waits until go bit is cleared. */
static int mlxsw_i2c_wait_go_bit(struct i2c_client *client,
				 struct mlxsw_i2c *mlxsw_i2c, u8 *p_status)
{}

/* Routine posts a command to ASIC through mail box. */
static int mlxsw_i2c_write_cmd(struct i2c_client *client,
			       struct mlxsw_i2c *mlxsw_i2c,
			       int immediate)
{}

/* Routine posts initialization command to ASIC through mail box. */
static int
mlxsw_i2c_write_init_cmd(struct i2c_client *client,
			 struct mlxsw_i2c *mlxsw_i2c, u16 opcode, u32 in_mod)
{}

/* Routine obtains mail box offsets from ASIC register space. */
static int mlxsw_i2c_get_mbox(struct i2c_client *client,
			      struct mlxsw_i2c *mlxsw_i2c)
{}

/* Routine sends I2C write transaction to ASIC device. */
static int
mlxsw_i2c_write(struct device *dev, size_t in_mbox_size, u8 *in_mbox, int num,
		u8 *p_status)
{}

/* Routine executes I2C command. */
static int
mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size,
	      u8 *in_mbox, size_t out_mbox_size, u8 *out_mbox, u8 *status)
{}

static int mlxsw_i2c_cmd_exec(void *bus_priv, u16 opcode, u8 opcode_mod,
			      u32 in_mod, bool out_mbox_direct,
			      char *in_mbox, size_t in_mbox_size,
			      char *out_mbox, size_t out_mbox_size,
			      u8 *status)
{}

static bool mlxsw_i2c_skb_transmit_busy(void *bus_priv,
					const struct mlxsw_tx_info *tx_info)
{}

static int mlxsw_i2c_skb_transmit(void *bus_priv, struct sk_buff *skb,
				  const struct mlxsw_tx_info *tx_info)
{}

static int
mlxsw_i2c_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
	       const struct mlxsw_config_profile *profile,
	       struct mlxsw_res *res)
{}

static void mlxsw_i2c_fini(void *bus_priv)
{}

static void mlxsw_i2c_work_handler(struct work_struct *work)
{}

static irqreturn_t mlxsw_i2c_irq_handler(int irq, void *dev)
{}

static int mlxsw_i2c_irq_init(struct mlxsw_i2c *mlxsw_i2c, u8 addr)
{}

static void mlxsw_i2c_irq_fini(struct mlxsw_i2c *mlxsw_i2c)
{}

static const struct mlxsw_bus mlxsw_i2c_bus =;

static int mlxsw_i2c_probe(struct i2c_client *client)
{}

static void mlxsw_i2c_remove(struct i2c_client *client)
{}

int mlxsw_i2c_driver_register(struct i2c_driver *i2c_driver)
{}
EXPORT_SYMBOL();

void mlxsw_i2c_driver_unregister(struct i2c_driver *i2c_driver)
{}
EXPORT_SYMBOL();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();