// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ #include <linux/kernel.h> #include <linux/types.h> #include <linux/dcbnl.h> #include <linux/if_ether.h> #include <linux/list.h> #include <linux/netlink.h> #include "spectrum.h" #include "core.h" #include "port.h" #include "reg.h" struct mlxsw_sp_sb_pr { … }; struct mlxsw_cp_sb_occ { … }; struct mlxsw_sp_sb_cm { … }; #define MLXSW_SP_SB_INFI … #define MLXSW_SP_SB_REST … struct mlxsw_sp_sb_pm { … }; struct mlxsw_sp_sb_mm { … }; struct mlxsw_sp_sb_pool_des { … }; #define MLXSW_SP_SB_POOL_ING … #define MLXSW_SP_SB_POOL_EGR … #define MLXSW_SP_SB_POOL_EGR_MC … #define MLXSW_SP_SB_POOL_ING_CPU … #define MLXSW_SP_SB_POOL_EGR_CPU … static const struct mlxsw_sp_sb_pool_des mlxsw_sp1_sb_pool_dess[] = …; static const struct mlxsw_sp_sb_pool_des mlxsw_sp2_sb_pool_dess[] = …; #define MLXSW_SP_SB_ING_TC_COUNT … #define MLXSW_SP_SB_EG_TC_COUNT … struct mlxsw_sp_sb_port { … }; struct mlxsw_sp_sb { … }; struct mlxsw_sp_sb_vals { … }; struct mlxsw_sp_sb_ops { … }; u32 mlxsw_sp_cells_bytes(const struct mlxsw_sp *mlxsw_sp, u32 cells) { … } u32 mlxsw_sp_bytes_cells(const struct mlxsw_sp *mlxsw_sp, u32 bytes) { … } static u32 mlxsw_sp_port_headroom_8x_adjust(const struct mlxsw_sp_port *mlxsw_sp_port, u32 size_cells) { … } static struct mlxsw_sp_sb_pr *mlxsw_sp_sb_pr_get(struct mlxsw_sp *mlxsw_sp, u16 pool_index) { … } static bool mlxsw_sp_sb_cm_exists(u8 pg_buff, enum mlxsw_reg_sbxx_dir dir) { … } static struct mlxsw_sp_sb_cm *mlxsw_sp_sb_cm_get(struct mlxsw_sp *mlxsw_sp, u16 local_port, u8 pg_buff, enum mlxsw_reg_sbxx_dir dir) { … } static struct mlxsw_sp_sb_pm *mlxsw_sp_sb_pm_get(struct mlxsw_sp *mlxsw_sp, u16 local_port, u16 pool_index) { … } static int mlxsw_sp_sb_pr_write(struct mlxsw_sp *mlxsw_sp, u16 pool_index, enum mlxsw_reg_sbpr_mode mode, u32 size, bool infi_size) { … } static int mlxsw_sp_sb_pr_desc_write(struct mlxsw_sp *mlxsw_sp, enum mlxsw_reg_sbxx_dir dir, enum mlxsw_reg_sbpr_mode mode, u32 size, bool infi_size) { … } static int mlxsw_sp_sb_cm_write(struct mlxsw_sp *mlxsw_sp, u16 local_port, u8 pg_buff, u32 min_buff, u32 max_buff, bool infi_max, u16 pool_index) { … } static int mlxsw_sp_sb_pm_write(struct mlxsw_sp *mlxsw_sp, u16 local_port, u16 pool_index, u32 min_buff, u32 max_buff) { … } static int mlxsw_sp_sb_pm_occ_clear(struct mlxsw_sp *mlxsw_sp, u16 local_port, u16 pool_index, struct list_head *bulk_list) { … } static void mlxsw_sp_sb_pm_occ_query_cb(struct mlxsw_core *mlxsw_core, char *sbpm_pl, size_t sbpm_pl_len, unsigned long cb_priv) { … } static int mlxsw_sp_sb_pm_occ_query(struct mlxsw_sp *mlxsw_sp, u16 local_port, u16 pool_index, struct list_head *bulk_list) { … } void mlxsw_sp_hdroom_prios_reset_buf_idx(struct mlxsw_sp_hdroom *hdroom) { … } void mlxsw_sp_hdroom_bufs_reset_lossiness(struct mlxsw_sp_hdroom *hdroom) { … } static u16 mlxsw_sp_hdroom_buf_threshold_get(const struct mlxsw_sp *mlxsw_sp, int mtu) { … } static void mlxsw_sp_hdroom_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres, bool lossy) { … } static u16 mlxsw_sp_hdroom_buf_delay_get(const struct mlxsw_sp *mlxsw_sp, const struct mlxsw_sp_hdroom *hdroom) { … } static u32 mlxsw_sp_hdroom_int_buf_size_get(struct mlxsw_sp *mlxsw_sp, int mtu, u32 speed) { … } static bool mlxsw_sp_hdroom_buf_is_used(const struct mlxsw_sp_hdroom *hdroom, int buf) { … } void mlxsw_sp_hdroom_bufs_reset_sizes(struct mlxsw_sp_port *mlxsw_sp_port, struct mlxsw_sp_hdroom *hdroom) { … } #define MLXSW_SP_PB_UNUSED … static int mlxsw_sp_hdroom_configure_buffers(struct mlxsw_sp_port *mlxsw_sp_port, const struct mlxsw_sp_hdroom *hdroom, bool force) { … } static int mlxsw_sp_hdroom_configure_priomap(struct mlxsw_sp_port *mlxsw_sp_port, const struct mlxsw_sp_hdroom *hdroom, bool force) { … } static int mlxsw_sp_hdroom_configure_int_buf(struct mlxsw_sp_port *mlxsw_sp_port, const struct mlxsw_sp_hdroom *hdroom, bool force) { … } static bool mlxsw_sp_hdroom_bufs_fit(struct mlxsw_sp *mlxsw_sp, const struct mlxsw_sp_hdroom *hdroom) { … } static int __mlxsw_sp_hdroom_configure(struct mlxsw_sp_port *mlxsw_sp_port, const struct mlxsw_sp_hdroom *hdroom, bool force) { … } int mlxsw_sp_hdroom_configure(struct mlxsw_sp_port *mlxsw_sp_port, const struct mlxsw_sp_hdroom *hdroom) { … } static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port) { … } static int mlxsw_sp_sb_port_init(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_sb_port *sb_port) { … } static void mlxsw_sp_sb_port_fini(struct mlxsw_sp_sb_port *sb_port) { … } static int mlxsw_sp_sb_ports_init(struct mlxsw_sp *mlxsw_sp) { … } static void mlxsw_sp_sb_ports_fini(struct mlxsw_sp *mlxsw_sp) { … } #define MLXSW_SP_SB_PR(_mode, _size) … #define MLXSW_SP_SB_PR_EXT(_mode, _size, _freeze_mode, _freeze_size) … #define MLXSW_SP1_SB_PR_CPU_SIZE … /* Order according to mlxsw_sp1_sb_pool_dess */ static const struct mlxsw_sp_sb_pr mlxsw_sp1_sb_prs[] = …; #define MLXSW_SP2_SB_PR_CPU_SIZE … /* Order according to mlxsw_sp2_sb_pool_dess */ static const struct mlxsw_sp_sb_pr mlxsw_sp2_sb_prs[] = …; static int mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp, const struct mlxsw_sp_sb_pr *prs, const struct mlxsw_sp_sb_pool_des *pool_dess, size_t prs_len) { … } #define MLXSW_SP_SB_CM(_min_buff, _max_buff, _pool) … #define MLXSW_SP_SB_CM_ING(_min_buff, _max_buff) … #define MLXSW_SP_SB_CM_EGR(_min_buff, _max_buff) … #define MLXSW_SP_SB_CM_EGR_MC(_min_buff, _max_buff) … static const struct mlxsw_sp_sb_cm mlxsw_sp1_sb_cms_ingress[] = …; static const struct mlxsw_sp_sb_cm mlxsw_sp2_sb_cms_ingress[] = …; static const struct mlxsw_sp_sb_cm mlxsw_sp1_sb_cms_egress[] = …; static const struct mlxsw_sp_sb_cm mlxsw_sp2_sb_cms_egress[] = …; #define MLXSW_SP_CPU_PORT_SB_CM … static const struct mlxsw_sp_sb_cm mlxsw_sp_cpu_port_sb_cms[] = …; static bool mlxsw_sp_sb_pool_is_static(struct mlxsw_sp *mlxsw_sp, u16 pool_index) { … } static int __mlxsw_sp_sb_cms_init(struct mlxsw_sp *mlxsw_sp, u16 local_port, enum mlxsw_reg_sbxx_dir dir, const struct mlxsw_sp_sb_cm *cms, size_t cms_len) { … } static int mlxsw_sp_port_sb_cms_init(struct mlxsw_sp_port *mlxsw_sp_port) { … } static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp) { … } #define MLXSW_SP_SB_PM(_min_buff, _max_buff) … /* Order according to mlxsw_sp1_sb_pool_dess */ static const struct mlxsw_sp_sb_pm mlxsw_sp1_sb_pms[] = …; /* Order according to mlxsw_sp2_sb_pool_dess */ static const struct mlxsw_sp_sb_pm mlxsw_sp2_sb_pms[] = …; /* Order according to mlxsw_sp*_sb_pool_dess */ static const struct mlxsw_sp_sb_pm mlxsw_sp_cpu_port_sb_pms[] = …; static int mlxsw_sp_sb_pms_init(struct mlxsw_sp *mlxsw_sp, u16 local_port, const struct mlxsw_sp_sb_pm *pms, bool skip_ingress) { … } static int mlxsw_sp_port_sb_pms_init(struct mlxsw_sp_port *mlxsw_sp_port) { … } static int mlxsw_sp_cpu_port_sb_pms_init(struct mlxsw_sp *mlxsw_sp) { … } #define MLXSW_SP_SB_MM(_min_buff, _max_buff) … static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = …; static int mlxsw_sp_sb_mms_init(struct mlxsw_sp *mlxsw_sp) { … } static void mlxsw_sp_pool_count(struct mlxsw_sp *mlxsw_sp, u16 *p_ingress_len, u16 *p_egress_len) { … } const struct mlxsw_sp_sb_vals mlxsw_sp1_sb_vals = …; const struct mlxsw_sp_sb_vals mlxsw_sp2_sb_vals = …; static u32 mlxsw_sp1_pb_int_buf_size_get(int mtu, u32 speed) { … } static u32 __mlxsw_sp_pb_int_buf_size_get(int mtu, u32 speed, u32 buffer_factor) { … } #define MLXSW_SP2_SPAN_EG_MIRROR_BUFFER_FACTOR … static u32 mlxsw_sp2_pb_int_buf_size_get(int mtu, u32 speed) { … } #define MLXSW_SP3_SPAN_EG_MIRROR_BUFFER_FACTOR … static u32 mlxsw_sp3_pb_int_buf_size_get(int mtu, u32 speed) { … } const struct mlxsw_sp_sb_ops mlxsw_sp1_sb_ops = …; const struct mlxsw_sp_sb_ops mlxsw_sp2_sb_ops = …; const struct mlxsw_sp_sb_ops mlxsw_sp3_sb_ops = …; int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp) { … } void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp) { … } int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port) { … } void mlxsw_sp_port_buffers_fini(struct mlxsw_sp_port *mlxsw_sp_port) { … } int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core, unsigned int sb_index, u16 pool_index, struct devlink_sb_pool_info *pool_info) { … } int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core, unsigned int sb_index, u16 pool_index, u32 size, enum devlink_sb_threshold_type threshold_type, struct netlink_ext_ack *extack) { … } #define MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET … static u32 mlxsw_sp_sb_threshold_out(struct mlxsw_sp *mlxsw_sp, u16 pool_index, u32 max_buff) { … } static int mlxsw_sp_sb_threshold_in(struct mlxsw_sp *mlxsw_sp, u16 pool_index, u32 threshold, u32 *p_max_buff, struct netlink_ext_ack *extack) { … } int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port, unsigned int sb_index, u16 pool_index, u32 *p_threshold) { … } int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port, unsigned int sb_index, u16 pool_index, u32 threshold, struct netlink_ext_ack *extack) { … } int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port, unsigned int sb_index, u16 tc_index, enum devlink_sb_pool_type pool_type, u16 *p_pool_index, u32 *p_threshold) { … } int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port, unsigned int sb_index, u16 tc_index, enum devlink_sb_pool_type pool_type, u16 pool_index, u32 threshold, struct netlink_ext_ack *extack) { … } #define MASKED_COUNT_MAX … struct mlxsw_sp_sb_sr_occ_query_cb_ctx { … }; static void mlxsw_sp_sb_sr_occ_query_cb(struct mlxsw_core *mlxsw_core, char *sbsr_pl, size_t sbsr_pl_len, unsigned long cb_priv) { … } int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core, unsigned int sb_index) { … } int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core, unsigned int sb_index) { … } int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port, unsigned int sb_index, u16 pool_index, u32 *p_cur, u32 *p_max) { … } int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port, unsigned int sb_index, u16 tc_index, enum devlink_sb_pool_type pool_type, u32 *p_cur, u32 *p_max) { … }
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