linux/drivers/pci/controller/pcie-rockchip.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Rockchip AXI PCIe host controller driver
 *
 * Copyright (c) 2016 Rockchip, Inc.
 *
 * Author: Shawn Lin <[email protected]>
 *         Wenrui Li <[email protected]>
 *
 * Bits taken from Synopsys DesignWare Host controller driver and
 * ARM PCI Host generic driver.
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/iopoll.h>
#include <linux/of.h>
#include <linux/of_pci.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/reset.h>

#include "../pci.h"
#include "pcie-rockchip.h"

int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
{ … }
EXPORT_SYMBOL_GPL(…);

#define rockchip_pcie_read_addr(addr) …
/* 100 ms max wait time for PHY PLLs to lock */
#define RK_PHY_PLL_LOCK_TIMEOUT_US …
/* Sleep should be less than 20ms */
#define RK_PHY_PLL_LOCK_SLEEP_US …

int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
{ … }
EXPORT_SYMBOL_GPL(…);

int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip)
{ … }
EXPORT_SYMBOL_GPL(…);

void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip)
{ … }
EXPORT_SYMBOL_GPL(…);

int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip)
{ … }
EXPORT_SYMBOL_GPL(…);

void rockchip_pcie_disable_clocks(void *data)
{ … }
EXPORT_SYMBOL_GPL(…);

void rockchip_pcie_cfg_configuration_accesses(
		struct rockchip_pcie *rockchip, u32 type)
{ … }
EXPORT_SYMBOL_GPL(…);