/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ /* * Microsemi SoCs FDMA driver * * Copyright (c) 2021 Microchip */ #ifndef _MSCC_OCELOT_FDMA_H_ #define _MSCC_OCELOT_FDMA_H_ #include "ocelot.h" #define MSCC_FDMA_DCB_STAT_BLOCKO(x) … #define MSCC_FDMA_DCB_STAT_BLOCKO_M … #define MSCC_FDMA_DCB_STAT_BLOCKO_X(x) … #define MSCC_FDMA_DCB_STAT_PD … #define MSCC_FDMA_DCB_STAT_ABORT … #define MSCC_FDMA_DCB_STAT_EOF … #define MSCC_FDMA_DCB_STAT_SOF … #define MSCC_FDMA_DCB_STAT_BLOCKL_M … #define MSCC_FDMA_DCB_STAT_BLOCKL(x) … #define MSCC_FDMA_DCB_LLP(x) … #define MSCC_FDMA_DCB_LLP_PREV(x) … #define MSCC_FDMA_CH_SAFE … #define MSCC_FDMA_CH_ACTIVATE … #define MSCC_FDMA_CH_DISABLE … #define MSCC_FDMA_CH_FORCEDIS … #define MSCC_FDMA_EVT_ERR … #define MSCC_FDMA_EVT_ERR_CODE … #define MSCC_FDMA_INTR_LLP … #define MSCC_FDMA_INTR_LLP_ENA … #define MSCC_FDMA_INTR_FRM … #define MSCC_FDMA_INTR_FRM_ENA … #define MSCC_FDMA_INTR_ENA … #define MSCC_FDMA_INTR_IDENT … #define MSCC_FDMA_INJ_CHAN … #define MSCC_FDMA_XTR_CHAN … #define OCELOT_FDMA_WEIGHT … #define OCELOT_FDMA_CH_SAFE_TIMEOUT_US … #define OCELOT_FDMA_RX_RING_SIZE … #define OCELOT_FDMA_TX_RING_SIZE … #define OCELOT_FDMA_RX_DCB_SIZE … #define OCELOT_FDMA_TX_DCB_SIZE … /* +4 allows for word alignment after allocation */ #define OCELOT_DCBS_HW_ALLOC_SIZE … #define OCELOT_FDMA_RX_SIZE … #define OCELOT_FDMA_SKBFRAG_OVR … #define OCELOT_FDMA_RXB_SIZE … #define OCELOT_FDMA_SKBFRAG_SIZE … DECLARE_STATIC_KEY_FALSE(ocelot_fdma_enabled); struct ocelot_fdma_dcb { … } __packed; /** * struct ocelot_fdma_tx_buf - TX buffer structure * @skb: SKB currently used in the corresponding DCB. * @dma_addr: SKB DMA mapped address. */ struct ocelot_fdma_tx_buf { … }; /** * struct ocelot_fdma_tx_ring - TX ring description of DCBs * * @dcbs: DCBs allocated for the ring * @dcbs_dma: DMA base address of the DCBs * @bufs: List of TX buffer associated to the DCBs * @xmit_lock: lock for concurrent xmit access * @next_to_clean: Next DCB to be cleaned in tx_cleanup * @next_to_use: Next available DCB to send SKB */ struct ocelot_fdma_tx_ring { … }; /** * struct ocelot_fdma_rx_buf - RX buffer structure * @page: Struct page used in this buffer * @page_offset: Current page offset (either 0 or PAGE_SIZE/2) * @dma_addr: DMA address of the page */ struct ocelot_fdma_rx_buf { … }; /** * struct ocelot_fdma_rx_ring - TX ring description of DCBs * * @dcbs: DCBs allocated for the ring * @dcbs_dma: DMA base address of the DCBs * @bufs: List of RX buffer associated to the DCBs * @skb: SKB currently received by the netdev * @next_to_clean: Next DCB to be cleaned NAPI polling * @next_to_use: Next available DCB to send SKB * @next_to_alloc: Next buffer that needs to be allocated (page reuse or alloc) */ struct ocelot_fdma_rx_ring { … }; /** * struct ocelot_fdma - FDMA context * * @irq: FDMA interrupt * @ndev: Net device used to initialize NAPI * @dcbs_base: Memory coherent DCBs * @dcbs_dma_base: DMA base address of memory coherent DCBs * @tx_ring: Injection ring * @rx_ring: Extraction ring * @napi: NAPI context * @ocelot: Back-pointer to ocelot struct */ struct ocelot_fdma { … }; void ocelot_fdma_init(struct platform_device *pdev, struct ocelot *ocelot); void ocelot_fdma_start(struct ocelot *ocelot); void ocelot_fdma_deinit(struct ocelot *ocelot); int ocelot_fdma_inject_frame(struct ocelot *fdma, int port, u32 rew_op, struct sk_buff *skb, struct net_device *dev); void ocelot_fdma_netdev_init(struct ocelot *ocelot, struct net_device *dev); void ocelot_fdma_netdev_deinit(struct ocelot *ocelot, struct net_device *dev); #endif
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