// SPDX-License-Identifier: GPL-2.0 /* * MediaTek PCIe host controller driver. * * Copyright (c) 2020 MediaTek Inc. * Author: Jianjun Wang <[email protected]> */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/iopoll.h> #include <linux/irq.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/msi.h> #include <linux/of_device.h> #include <linux/of_pci.h> #include <linux/pci.h> #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/pm_domain.h> #include <linux/pm_runtime.h> #include <linux/reset.h> #include "../pci.h" #define PCIE_SETTING_REG … #define PCIE_PCI_IDS_1 … #define PCI_CLASS(class) … #define PCIE_RC_MODE … #define PCIE_EQ_PRESET_01_REG … #define PCIE_VAL_LN0_DOWNSTREAM … #define PCIE_VAL_LN0_UPSTREAM … #define PCIE_VAL_LN1_DOWNSTREAM … #define PCIE_VAL_LN1_UPSTREAM … #define PCIE_CFGNUM_REG … #define PCIE_CFG_DEVFN(devfn) … #define PCIE_CFG_BUS(bus) … #define PCIE_CFG_BYTE_EN(bytes) … #define PCIE_CFG_FORCE_BYTE_EN … #define PCIE_CFG_OFFSET_ADDR … #define PCIE_CFG_HEADER(bus, devfn) … #define PCIE_RST_CTRL_REG … #define PCIE_MAC_RSTB … #define PCIE_PHY_RSTB … #define PCIE_BRG_RSTB … #define PCIE_PE_RSTB … #define PCIE_LTSSM_STATUS_REG … #define PCIE_LTSSM_STATE_MASK … #define PCIE_LTSSM_STATE(val) … #define PCIE_LTSSM_STATE_L2_IDLE … #define PCIE_LINK_STATUS_REG … #define PCIE_PORT_LINKUP … #define PCIE_MSI_SET_NUM … #define PCIE_MSI_IRQS_PER_SET … #define PCIE_MSI_IRQS_NUM … #define PCIE_INT_ENABLE_REG … #define PCIE_MSI_ENABLE … #define PCIE_MSI_SHIFT … #define PCIE_INTX_SHIFT … #define PCIE_INTX_ENABLE … #define PCIE_INT_STATUS_REG … #define PCIE_MSI_SET_ENABLE_REG … #define PCIE_MSI_SET_ENABLE … #define PCIE_PIPE4_PIE8_REG … #define PCIE_K_FINETUNE_MAX … #define PCIE_K_FINETUNE_ERR … #define PCIE_K_PRESET_TO_USE … #define PCIE_K_PHYPARAM_QUERY … #define PCIE_K_QUERY_TIMEOUT … #define PCIE_K_PRESET_TO_USE_16G … #define PCIE_MSI_SET_BASE_REG … #define PCIE_MSI_SET_OFFSET … #define PCIE_MSI_SET_STATUS_OFFSET … #define PCIE_MSI_SET_ENABLE_OFFSET … #define PCIE_MSI_SET_ADDR_HI_BASE … #define PCIE_MSI_SET_ADDR_HI_OFFSET … #define PCIE_ICMD_PM_REG … #define PCIE_TURN_OFF_LINK … #define PCIE_MISC_CTRL_REG … #define PCIE_DISABLE_DVFSRC_VLT_REQ … #define PCIE_TRANS_TABLE_BASE_REG … #define PCIE_ATR_SRC_ADDR_MSB_OFFSET … #define PCIE_ATR_TRSL_ADDR_LSB_OFFSET … #define PCIE_ATR_TRSL_ADDR_MSB_OFFSET … #define PCIE_ATR_TRSL_PARAM_OFFSET … #define PCIE_ATR_TLB_SET_OFFSET … #define PCIE_MAX_TRANS_TABLES … #define PCIE_ATR_EN … #define PCIE_ATR_SIZE(size) … #define PCIE_ATR_ID(id) … #define PCIE_ATR_TYPE_MEM … #define PCIE_ATR_TYPE_IO … #define PCIE_ATR_TLP_TYPE(type) … #define PCIE_ATR_TLP_TYPE_MEM … #define PCIE_ATR_TLP_TYPE_IO … #define MAX_NUM_PHY_RESETS … /* Time in ms needed to complete PCIe reset on EN7581 SoC */ #define PCIE_EN7581_RESET_TIME_MS … struct mtk_gen3_pcie; /** * struct mtk_gen3_pcie_pdata - differentiate between host generations * @power_up: pcie power_up callback * @phy_resets: phy reset lines SoC data. */ struct mtk_gen3_pcie_pdata { … }; /** * struct mtk_msi_set - MSI information for each set * @base: IO mapped register base * @msg_addr: MSI message address * @saved_irq_state: IRQ enable state saved at suspend time */ struct mtk_msi_set { … }; /** * struct mtk_gen3_pcie - PCIe port information * @dev: pointer to PCIe device * @base: IO mapped register base * @reg_base: physical register base * @mac_reset: MAC reset control * @phy_resets: PHY reset controllers * @phy: PHY controller block * @clks: PCIe clocks * @num_clks: PCIe clocks count for this port * @irq: PCIe controller interrupt number * @saved_irq_state: IRQ enable state saved at suspend time * @irq_lock: lock protecting IRQ register access * @intx_domain: legacy INTx IRQ domain * @msi_domain: MSI IRQ domain * @msi_bottom_domain: MSI IRQ bottom domain * @msi_sets: MSI sets information * @lock: lock protecting IRQ bit map * @msi_irq_in_use: bit map for assigned MSI IRQ * @soc: pointer to SoC-dependent operations */ struct mtk_gen3_pcie { … }; /* LTSSM state in PCIE_LTSSM_STATUS_REG bit[28:24] */ static const char *const ltssm_str[] = …; /** * mtk_pcie_config_tlp_header() - Configure a configuration TLP header * @bus: PCI bus to query * @devfn: device/function number * @where: offset in config space * @size: data size in TLP header * * Set byte enable field and device information in configuration TLP header. */ static void mtk_pcie_config_tlp_header(struct pci_bus *bus, unsigned int devfn, int where, int size) { … } static void __iomem *mtk_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, int where) { … } static int mtk_pcie_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) { … } static int mtk_pcie_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { … } static struct pci_ops mtk_pcie_ops = …; static int mtk_pcie_set_trans_table(struct mtk_gen3_pcie *pcie, resource_size_t cpu_addr, resource_size_t pci_addr, resource_size_t size, unsigned long type, int *num) { … } static void mtk_pcie_enable_msi(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie) { … } static void mtk_pcie_msi_irq_mask(struct irq_data *data) { … } static void mtk_pcie_msi_irq_unmask(struct irq_data *data) { … } static struct irq_chip mtk_msi_irq_chip = …; static struct msi_domain_info mtk_msi_domain_info = …; static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) { … } static void mtk_msi_bottom_irq_ack(struct irq_data *data) { … } static void mtk_msi_bottom_irq_mask(struct irq_data *data) { … } static void mtk_msi_bottom_irq_unmask(struct irq_data *data) { … } static struct irq_chip mtk_msi_bottom_irq_chip = …; static int mtk_msi_bottom_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { … } static void mtk_msi_bottom_domain_free(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs) { … } static const struct irq_domain_ops mtk_msi_bottom_domain_ops = …; static void mtk_intx_mask(struct irq_data *data) { … } static void mtk_intx_unmask(struct irq_data *data) { … } /** * mtk_intx_eoi() - Clear INTx IRQ status at the end of interrupt * @data: pointer to chip specific data * * As an emulated level IRQ, its interrupt status will remain * until the corresponding de-assert message is received; hence that * the status can only be cleared when the interrupt has been serviced. */ static void mtk_intx_eoi(struct irq_data *data) { … } static struct irq_chip mtk_intx_irq_chip = …; static int mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq) { … } static const struct irq_domain_ops intx_domain_ops = …; static int mtk_pcie_init_irq_domains(struct mtk_gen3_pcie *pcie) { … } static void mtk_pcie_irq_teardown(struct mtk_gen3_pcie *pcie) { … } static void mtk_pcie_msi_handler(struct mtk_gen3_pcie *pcie, int set_idx) { … } static void mtk_pcie_irq_handler(struct irq_desc *desc) { … } static int mtk_pcie_setup_irq(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_parse_port(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_power_up(struct mtk_gen3_pcie *pcie) { … } static void mtk_pcie_power_down(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_probe(struct platform_device *pdev) { … } static void mtk_pcie_remove(struct platform_device *pdev) { … } static void mtk_pcie_irq_save(struct mtk_gen3_pcie *pcie) { … } static void mtk_pcie_irq_restore(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_turn_off_link(struct mtk_gen3_pcie *pcie) { … } static int mtk_pcie_suspend_noirq(struct device *dev) { … } static int mtk_pcie_resume_noirq(struct device *dev) { … } static const struct dev_pm_ops mtk_pcie_pm_ops = …; static const struct mtk_gen3_pcie_pdata mtk_pcie_soc_mt8192 = …; static const struct mtk_gen3_pcie_pdata mtk_pcie_soc_en7581 = …; static const struct of_device_id mtk_pcie_of_match[] = …; MODULE_DEVICE_TABLE(of, mtk_pcie_of_match); static struct platform_driver mtk_pcie_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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