/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * QLogic QLA3xxx NIC HBA Driver * Copyright (c) 2003-2006 QLogic Corporation */ #ifndef _QLA3XXX_H_ #define _QLA3XXX_H_ /* * IOCB Definitions... */ #pragma pack(1) #define OPCODE_OB_MAC_IOCB_FN0 … #define OPCODE_OB_MAC_IOCB_FN2 … #define OPCODE_IB_MAC_IOCB … #define OPCODE_IB_3032_MAC_IOCB … #define OPCODE_IB_IP_IOCB … #define OPCODE_IB_3032_IP_IOCB … #define OPCODE_FUNC_ID_MASK … #define OUTBOUND_MAC_IOCB … #define FN0_MA_BITS_MASK … #define FN1_MA_BITS_MASK … struct ob_mac_iocb_req { … }; /* * The following constants define control bits for buffer * length fields for all IOCB's. */ #define OB_MAC_IOCB_REQ_E … #define OB_MAC_IOCB_REQ_C … #define OB_MAC_IOCB_REQ_L … #define OB_MAC_IOCB_REQ_R … struct ob_mac_iocb_rsp { … }; struct ib_mac_iocb_rsp { … }; struct ob_ip_iocb_req { … }; /* defines for BufferLength fields above */ #define OB_IP_IOCB_REQ_E … #define OB_IP_IOCB_REQ_C … #define OB_IP_IOCB_REQ_L … #define OB_IP_IOCB_REQ_R … struct ob_ip_iocb_rsp { … }; struct ib_ip_iocb_rsp { … }; struct net_rsp_iocb { … }; #pragma pack() /* * Register Definitions... */ #define PORT0_PHY_ADDRESS … #define PORT1_PHY_ADDRESS … #define ETHERNET_CRC_SIZE … #define MII_SCAN_REGISTER … #define PHY_ID_0_REG … #define PHY_ID_1_REG … #define PHY_OUI_1_MASK … #define PHY_MODEL_MASK … /* Address for the Agere Phy */ #define MII_AGERE_ADDR_1 … #define MII_AGERE_ADDR_2 … /* 32-bit ispControlStatus */ enum { … }; /* 32-bit ispInterruptMaskReg */ enum { … }; /* 32-bit serialPortInterfaceReg */ enum { … }; /* semaphoreReg */ enum { … }; /* * QL3XXX memory-mapped registers * QL3XXX has 4 "pages" of registers, each page occupying * 256 bytes. Each page has a "common" area at the start and then * page-specific registers after that. */ struct ql3xxx_common_registers { … }; enum { … }; /* InternalChipConfig */ enum { … }; /* portControl */ enum { … }; /* portStatus */ enum { … }; /* macMIIMgmtControlReg */ enum { … }; /* macMIIMgmtControlReg */ enum { … }; /* macMIIStatusReg */ enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; /* * port control and status page - page 0 */ struct ql3xxx_port_registers { … }; /* * port host memory config page - page 1 */ struct ql3xxx_host_memory_registers { … }; /* * port local RAM page - page 2 */ struct ql3xxx_local_ram_registers { … }; /* * definitions for Semaphore bits in Semaphore/Serial NVRAM interface register */ #define LS_64BITS(x) … #define MS_64BITS(x) … /* * I/O register */ enum { … }; enum { … }; enum { … }; enum { … }; /* * MAC Config data structure */ struct eeprom_port_cfg { … }; /* * BIOS data structure */ struct eeprom_bios_cfg { … }; /* * Function Specific Data structure */ struct eeprom_function_cfg { … }; /* * EEPROM format */ struct eeprom_data { … }; /* * General definitions... */ /* * Below are a number compiler switches for controlling driver behavior. * Some are not supported under certain conditions and are notated as such. */ #define QL3XXX_VENDOR_ID … #define QL3022_DEVICE_ID … #define QL3032_DEVICE_ID … /* MTU & Frame Size stuff */ #define NORMAL_MTU_SIZE … #define JUMBO_MTU_SIZE … #define VLAN_ID_LEN … /* Request Queue Related Definitions */ #define NUM_REQ_Q_ENTRIES … /* Response Queue Related Definitions */ #define NUM_RSP_Q_ENTRIES … /* Transmit and Receive Buffers */ #define NUM_LBUFQ_ENTRIES … #define JUMBO_NUM_LBUFQ_ENTRIES … #define NUM_SBUFQ_ENTRIES … #define QL_SMALL_BUFFER_SIZE … #define QL_ADDR_ELE_PER_BUFQ_ENTRY … /* Each send has at least control block. This is how many we keep. */ #define NUM_SMALL_BUFFERS … #define QL_HEADER_SPACE … /* * Large & Small Buffers for Receives */ struct lrg_buf_q_entry { … }; struct bufq_addr_element { … }; #define QL_NO_RESET … #define QL_DO_RESET … enum link_state_t { … }; struct ql_rcv_buf_cb { … }; /* * Original IOCB has 3 sg entries: * first points to skb-data area * second points to first frag * third points to next oal. * OAL has 5 entries: * 1 thru 4 point to frags * fifth points to next oal. */ #define MAX_OAL_CNT … struct oal_entry { … }; struct oal { … }; struct map_list { … }; struct ql_tx_buf_cb { … }; /* definitions for type field */ #define QL_BUF_TYPE_MACIOCB … #define QL_BUF_TYPE_IPIOCB … #define QL_BUF_TYPE_TCPIOCB … /* qdev->flags definitions. */ enum { … }; /* * ql3_adapter - The main Adapter structure definition. * This structure has all fields relevant to the hardware. */ struct ql3_adapter { … }; #endif /* _QLA3XXX_H_ */
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