linux/drivers/net/ethernet/sfc/falcon/tenxpress.c

// SPDX-License-Identifier: GPL-2.0-only
/****************************************************************************
 * Driver for Solarflare network controllers and boards
 * Copyright 2007-2011 Solarflare Communications Inc.
 */

#include <linux/delay.h>
#include <linux/rtnetlink.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include "efx.h"
#include "mdio_10g.h"
#include "nic.h"
#include "phy.h"
#include "workarounds.h"

/* We expect these MMDs to be in the package. */
#define TENXPRESS_REQUIRED_DEVS

#define SFX7101_LOOPBACKS

/* We complain if we fail to see the link partner as 10G capable this many
 * times in a row (must be > 1 as sampling the autoneg. registers is racy)
 */
#define MAX_BAD_LP_TRIES

/* Extended control register */
#define PMA_PMD_XCONTROL_REG
#define PMA_PMD_EXT_GMII_EN_LBN
#define PMA_PMD_EXT_GMII_EN_WIDTH
#define PMA_PMD_EXT_CLK_OUT_LBN
#define PMA_PMD_EXT_CLK_OUT_WIDTH
#define PMA_PMD_LNPGA_POWERDOWN_LBN
#define PMA_PMD_LNPGA_POWERDOWN_WIDTH
#define PMA_PMD_EXT_CLK312_WIDTH
#define PMA_PMD_EXT_LPOWER_LBN
#define PMA_PMD_EXT_LPOWER_WIDTH
#define PMA_PMD_EXT_ROBUST_LBN
#define PMA_PMD_EXT_ROBUST_WIDTH
#define PMA_PMD_EXT_SSR_LBN
#define PMA_PMD_EXT_SSR_WIDTH

/* extended status register */
#define PMA_PMD_XSTATUS_REG
#define PMA_PMD_XSTAT_MDIX_LBN
#define PMA_PMD_XSTAT_FLP_LBN

/* LED control register */
#define PMA_PMD_LED_CTRL_REG
#define PMA_PMA_LED_ACTIVITY_LBN

/* LED function override register */
#define PMA_PMD_LED_OVERR_REG
/* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
#define PMA_PMD_LED_LINK_LBN
#define PMA_PMD_LED_SPEED_LBN
#define PMA_PMD_LED_TX_LBN
#define PMA_PMD_LED_RX_LBN
/* Override settings */
#define PMA_PMD_LED_AUTO
#define PMA_PMD_LED_ON
#define PMA_PMD_LED_OFF
#define PMA_PMD_LED_FLASH
#define PMA_PMD_LED_MASK
/* All LEDs under hardware control */
/* Green and Amber under hardware control, Red off */
#define SFX7101_PMA_PMD_LED_DEFAULT

#define PMA_PMD_SPEED_ENABLE_REG
#define PMA_PMD_100TX_ADV_LBN
#define PMA_PMD_100TX_ADV_WIDTH
#define PMA_PMD_1000T_ADV_LBN
#define PMA_PMD_1000T_ADV_WIDTH
#define PMA_PMD_10000T_ADV_LBN
#define PMA_PMD_10000T_ADV_WIDTH
#define PMA_PMD_SPEED_LBN
#define PMA_PMD_SPEED_WIDTH

/* Misc register defines */
#define PCS_CLOCK_CTRL_REG
#define PLL312_RST_N_LBN

#define PCS_SOFT_RST2_REG
#define SERDES_RST_N_LBN
#define XGXS_RST_N_LBN

#define PCS_TEST_SELECT_REG
#define CLK312_EN_LBN

/* PHYXS registers */
#define PHYXS_XCONTROL_REG
#define PHYXS_RESET_LBN
#define PHYXS_RESET_WIDTH

#define PHYXS_TEST1
#define LOOPBACK_NEAR_LBN
#define LOOPBACK_NEAR_WIDTH

/* Boot status register */
#define PCS_BOOT_STATUS_REG
#define PCS_BOOT_FATAL_ERROR_LBN
#define PCS_BOOT_PROGRESS_LBN
#define PCS_BOOT_PROGRESS_WIDTH
#define PCS_BOOT_PROGRESS_INIT
#define PCS_BOOT_PROGRESS_WAIT_MDIO
#define PCS_BOOT_PROGRESS_CHECKSUM
#define PCS_BOOT_PROGRESS_JUMP
#define PCS_BOOT_DOWNLOAD_WAIT_LBN
#define PCS_BOOT_CODE_STARTED_LBN

/* 100M/1G PHY registers */
#define GPHY_XCONTROL_REG
#define GPHY_ISOLATE_LBN
#define GPHY_ISOLATE_WIDTH
#define GPHY_DUPLEX_LBN
#define GPHY_DUPLEX_WIDTH
#define GPHY_LOOPBACK_NEAR_LBN
#define GPHY_LOOPBACK_NEAR_WIDTH

#define C22EXT_STATUS_REG
#define C22EXT_STATUS_LINK_LBN
#define C22EXT_STATUS_LINK_WIDTH

#define C22EXT_MSTSLV_CTRL
#define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN
#define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN

#define C22EXT_MSTSLV_STATUS
#define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN
#define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN

/* Time to wait between powering down the LNPGA and turning off the power
 * rails */
#define LNPGA_PDOWN_WAIT

struct tenxpress_phy_data {};

static int tenxpress_init(struct ef4_nic *efx)
{}

static int tenxpress_phy_probe(struct ef4_nic *efx)
{}

static int tenxpress_phy_init(struct ef4_nic *efx)
{}

/* Perform a "special software reset" on the PHY. The caller is
 * responsible for saving and restoring the PHY hardware registers
 * properly, and masking/unmasking LASI */
static int tenxpress_special_reset(struct ef4_nic *efx)
{}

static void sfx7101_check_bad_lp(struct ef4_nic *efx, bool link_ok)
{}

static bool sfx7101_link_ok(struct ef4_nic *efx)
{}

static void tenxpress_ext_loopback(struct ef4_nic *efx)
{}

static void tenxpress_low_power(struct ef4_nic *efx)
{}

static int tenxpress_phy_reconfigure(struct ef4_nic *efx)
{}

/* Poll for link state changes */
static bool tenxpress_phy_poll(struct ef4_nic *efx)
{}

static void sfx7101_phy_fini(struct ef4_nic *efx)
{}

static void tenxpress_phy_remove(struct ef4_nic *efx)
{}


/* Override the RX, TX and link LEDs */
void tenxpress_set_id_led(struct ef4_nic *efx, enum ef4_led_mode mode)
{}

static const char *const sfx7101_test_names[] =;

static const char *sfx7101_test_name(struct ef4_nic *efx, unsigned int index)
{}

static int
sfx7101_run_tests(struct ef4_nic *efx, int *results, unsigned flags)
{}

static void
tenxpress_get_link_ksettings(struct ef4_nic *efx,
			     struct ethtool_link_ksettings *cmd)
{}

static int
tenxpress_set_link_ksettings(struct ef4_nic *efx,
			     const struct ethtool_link_ksettings *cmd)
{}

static void sfx7101_set_npage_adv(struct ef4_nic *efx, u32 advertising)
{}

const struct ef4_phy_operations falcon_sfx7101_phy_ops =;