/* SPDX-License-Identifier: GPL-2.0-only */ /**************************************************************************** * Driver for Solarflare network controllers and boards * Copyright 2009-2018 Solarflare Communications Inc. * Copyright 2019-2020 Xilinx Inc. */ #ifndef MCDI_PCOL_H #define MCDI_PCOL_H /* Values to be written into FMCR_CZ_RESET_STATE_REG to control boot. */ /* Power-on reset state */ #define MC_FW_STATE_POR … /* If this is set in MC_RESET_STATE_REG then it should be * possible to jump into IMEM without loading code from flash. */ #define MC_FW_WARM_BOOT_OK … /* The MC main image has started to boot. */ #define MC_FW_STATE_BOOTING … /* The Scheduler has started. */ #define MC_FW_STATE_SCHED … /* If this is set in MC_RESET_STATE_REG then it should be * possible to jump into IMEM without loading code from flash. * Unlike a warm boot, assume DMEM has been reloaded, so that * the MC persistent data must be reinitialised. */ #define MC_FW_TEPID_BOOT_OK … /* We have entered the main firmware via recovery mode. This * means that MC persistent data must be reinitialised, but that * we shouldn't touch PCIe config. */ #define MC_FW_RECOVERY_MODE_PCIE_INIT_OK … /* BIST state has been initialized */ #define MC_FW_BIST_INIT_OK … /* Siena MC shared memmory offsets */ /* The 'doorbell' addresses are hard-wired to alert the MC when written */ #define MC_SMEM_P0_DOORBELL_OFST … #define MC_SMEM_P1_DOORBELL_OFST … /* The rest of these are firmware-defined */ #define MC_SMEM_P0_PDU_OFST … #define MC_SMEM_P1_PDU_OFST … #define MC_SMEM_PDU_LEN … #define MC_SMEM_P0_PTP_TIME_OFST … #define MC_SMEM_P0_STATUS_OFST … #define MC_SMEM_P1_STATUS_OFST … /* Values to be written to the per-port status dword in shared * memory on reboot and assert */ #define MC_STATUS_DWORD_REBOOT … #define MC_STATUS_DWORD_ASSERT … /* Check whether an mcfw version (in host order) belongs to a bootloader */ #define MC_FW_VERSION_IS_BOOTLOADER(_v) … /* The current version of the MCDI protocol. * * Note that the ROM burnt into the card only talks V0, so at the very * least every driver must support version 0 and MCDI_PCOL_VERSION */ #define MCDI_PCOL_VERSION … /* Unused commands: 0x23, 0x27, 0x30, 0x31 */ /* MCDI version 1 * * Each MCDI request starts with an MCDI_HEADER, which is a 32bit * structure, filled in by the client. * * 0 7 8 16 20 22 23 24 31 * | CODE | R | LEN | SEQ | Rsvd | E | R | XFLAGS | * | | | * | | \--- Response * | \------- Error * \------------------------------ Resync (always set) * * The client writes it's request into MC shared memory, and rings the * doorbell. Each request is completed by either by the MC writing * back into shared memory, or by writing out an event. * * All MCDI commands support completion by shared memory response. Each * request may also contain additional data (accounted for by HEADER.LEN), * and some response's may also contain additional data (again, accounted * for by HEADER.LEN). * * Some MCDI commands support completion by event, in which any associated * response data is included in the event. * * The protocol requires one response to be delivered for every request, a * request should not be sent unless the response for the previous request * has been received (either by polling shared memory, or by receiving * an event). */ /** Request/Response structure */ #define MCDI_HEADER_OFST … #define MCDI_HEADER_CODE_LBN … #define MCDI_HEADER_CODE_WIDTH … #define MCDI_HEADER_RESYNC_LBN … #define MCDI_HEADER_RESYNC_WIDTH … #define MCDI_HEADER_DATALEN_LBN … #define MCDI_HEADER_DATALEN_WIDTH … #define MCDI_HEADER_SEQ_LBN … #define MCDI_HEADER_SEQ_WIDTH … #define MCDI_HEADER_RSVD_LBN … #define MCDI_HEADER_RSVD_WIDTH … #define MCDI_HEADER_NOT_EPOCH_LBN … #define MCDI_HEADER_NOT_EPOCH_WIDTH … #define MCDI_HEADER_ERROR_LBN … #define MCDI_HEADER_ERROR_WIDTH … #define MCDI_HEADER_RESPONSE_LBN … #define MCDI_HEADER_RESPONSE_WIDTH … #define MCDI_HEADER_XFLAGS_LBN … #define MCDI_HEADER_XFLAGS_WIDTH … /* Request response using event */ #define MCDI_HEADER_XFLAGS_EVREQ … /* Request (and signal) early doorbell return */ #define MCDI_HEADER_XFLAGS_DBRET … /* Maximum number of payload bytes */ #define MCDI_CTL_SDU_LEN_MAX_V1 … #define MCDI_CTL_SDU_LEN_MAX_V2 … #define MCDI_CTL_SDU_LEN_MAX … /* The MC can generate events for two reasons: * - To advance a shared memory request if XFLAGS_EVREQ was set * - As a notification (link state, i2c event), controlled * via MC_CMD_LOG_CTRL * * Both events share a common structure: * * 0 32 33 36 44 52 60 * | Data | Cont | Level | Src | Code | Rsvd | * | * \ There is another event pending in this notification * * If Code==CMDDONE, then the fields are further interpreted as: * * - LEVEL==INFO Command succeeded * - LEVEL==ERR Command failed * * 0 8 16 24 32 * | Seq | Datalen | Errno | Rsvd | * * These fields are taken directly out of the standard MCDI header, i.e., * LEVEL==ERR, Datalen == 0 => Reboot * * Events can be squirted out of the UART (using LOG_CTRL) without a * MCDI header. An event can be distinguished from a MCDI response by * examining the first byte which is 0xc0. This corresponds to the * non-existent MCDI command MC_CMD_DEBUG_LOG. * * 0 7 8 * | command | Resync | = 0xc0 * * Since the event is written in big-endian byte order, this works * providing bits 56-63 of the event are 0xc0. * * 56 60 63 * | Rsvd | Code | = 0xc0 * * Which means for convenience the event code is 0xc for all MC * generated events. */ #define FSE_AZ_EV_CODE_MCDI_EVRESPONSE … /* Operation not permitted. */ #define MC_CMD_ERR_EPERM … /* Non-existent command target */ #define MC_CMD_ERR_ENOENT … /* assert() has killed the MC */ #define MC_CMD_ERR_EINTR … /* I/O failure */ #define MC_CMD_ERR_EIO … /* Already exists */ #define MC_CMD_ERR_EEXIST … /* Try again */ #define MC_CMD_ERR_EAGAIN … /* Out of memory */ #define MC_CMD_ERR_ENOMEM … /* Caller does not hold required locks */ #define MC_CMD_ERR_EACCES … /* Resource is currently unavailable (e.g. lock contention) */ #define MC_CMD_ERR_EBUSY … /* No such device */ #define MC_CMD_ERR_ENODEV … /* Invalid argument to target */ #define MC_CMD_ERR_EINVAL … /* Broken pipe */ #define MC_CMD_ERR_EPIPE … /* Read-only */ #define MC_CMD_ERR_EROFS … /* Out of range */ #define MC_CMD_ERR_ERANGE … /* Non-recursive resource is already acquired */ #define MC_CMD_ERR_EDEADLK … /* Operation not implemented */ #define MC_CMD_ERR_ENOSYS … /* Operation timed out */ #define MC_CMD_ERR_ETIME … /* Link has been severed */ #define MC_CMD_ERR_ENOLINK … /* Protocol error */ #define MC_CMD_ERR_EPROTO … /* Operation not supported */ #define MC_CMD_ERR_ENOTSUP … /* Address not available */ #define MC_CMD_ERR_EADDRNOTAVAIL … /* Not connected */ #define MC_CMD_ERR_ENOTCONN … /* Operation already in progress */ #define MC_CMD_ERR_EALREADY … /* Resource allocation failed. */ #define MC_CMD_ERR_ALLOC_FAIL … /* V-adaptor not found. */ #define MC_CMD_ERR_NO_VADAPTOR … /* EVB port not found. */ #define MC_CMD_ERR_NO_EVB_PORT … /* V-switch not found. */ #define MC_CMD_ERR_NO_VSWITCH … /* Too many VLAN tags. */ #define MC_CMD_ERR_VLAN_LIMIT … /* Bad PCI function number. */ #define MC_CMD_ERR_BAD_PCI_FUNC … /* Invalid VLAN mode. */ #define MC_CMD_ERR_BAD_VLAN_MODE … /* Invalid v-switch type. */ #define MC_CMD_ERR_BAD_VSWITCH_TYPE … /* Invalid v-port type. */ #define MC_CMD_ERR_BAD_VPORT_TYPE … /* MAC address exists. */ #define MC_CMD_ERR_MAC_EXIST … /* Slave core not present */ #define MC_CMD_ERR_SLAVE_NOT_PRESENT … /* The datapath is disabled. */ #define MC_CMD_ERR_DATAPATH_DISABLED … /* The requesting client is not a function */ #define MC_CMD_ERR_CLIENT_NOT_FN … /* The requested operation might require the command to be passed between MCs, and the transport doesn't support that. Should only ever been seen over the UART. */ #define MC_CMD_ERR_TRANSPORT_NOPROXY … /* VLAN tag(s) exists */ #define MC_CMD_ERR_VLAN_EXIST … /* No MAC address assigned to an EVB port */ #define MC_CMD_ERR_NO_MAC_ADDR … /* Notifies the driver that the request has been relayed * to an admin function for authorization. The driver should * wait for a PROXY_RESPONSE event and then resend its request. * This error code is followed by a 32-bit handle that * helps matching it with the respective PROXY_RESPONSE event. */ #define MC_CMD_ERR_PROXY_PENDING … #define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST … /* The request cannot be passed for authorization because * another request from the same function is currently being * authorized. The drvier should try again later. */ #define MC_CMD_ERR_PROXY_INPROGRESS … /* Returned by MC_CMD_PROXY_COMPLETE if the caller is not the function * that has enabled proxying or BLOCK_INDEX points to a function that * doesn't await an authorization. */ #define MC_CMD_ERR_PROXY_UNEXPECTED … /* This code is currently only used internally in FW. Its meaning is that * an operation failed due to lack of SR-IOV privilege. * Normally it is translated to EPERM by send_cmd_err(), * but it may also be used to trigger some special mechanism * for handling such case, e.g. to relay the failed request * to a designated admin function for authorization. */ #define MC_CMD_ERR_NO_PRIVILEGE … /* Workaround 26807 could not be turned on/off because some functions * have already installed filters. See the comment at * MC_CMD_WORKAROUND_BUG26807. * May also returned for other operations such as sub-variant switching. */ #define MC_CMD_ERR_FILTERS_PRESENT … /* The clock whose frequency you've attempted to set * doesn't exist on this NIC */ #define MC_CMD_ERR_NO_CLOCK … /* Returned by MC_CMD_TESTASSERT if the action that should * have caused an assertion failed to do so. */ #define MC_CMD_ERR_UNREACHABLE … /* This command needs to be processed in the background but there were no * resources to do so. Send it again after a command has completed. */ #define MC_CMD_ERR_QUEUE_FULL … /* The operation could not be completed because the PCIe link has gone * away. This error code is never expected to be returned over the TLP * transport. */ #define MC_CMD_ERR_NO_PCIE … /* The operation could not be completed because the datapath has gone * away. This is distinct from MC_CMD_ERR_DATAPATH_DISABLED in that the * datapath absence may be temporary*/ #define MC_CMD_ERR_NO_DATAPATH … /* The operation could not complete because some VIs are allocated */ #define MC_CMD_ERR_VIS_PRESENT … /* The operation could not complete because some PIO buffers are allocated */ #define MC_CMD_ERR_PIOBUFS_PRESENT … #define MC_CMD_ERR_CODE_OFST … /* We define 8 "escape" commands to allow for command number space extension */ #define MC_CMD_CMD_SPACE_ESCAPE_0 … #define MC_CMD_CMD_SPACE_ESCAPE_1 … #define MC_CMD_CMD_SPACE_ESCAPE_2 … #define MC_CMD_CMD_SPACE_ESCAPE_3 … #define MC_CMD_CMD_SPACE_ESCAPE_4 … #define MC_CMD_CMD_SPACE_ESCAPE_5 … #define MC_CMD_CMD_SPACE_ESCAPE_6 … #define MC_CMD_CMD_SPACE_ESCAPE_7 … /* Vectors in the boot ROM */ /* Point to the copycode entry point. */ #define SIENA_MC_BOOTROM_COPYCODE_VEC … #define HUNT_MC_BOOTROM_COPYCODE_VEC … #define MEDFORD_MC_BOOTROM_COPYCODE_VEC … /* Points to the recovery mode entry point. Misnamed but kept for compatibility. */ #define SIENA_MC_BOOTROM_NOFLASH_VEC … #define HUNT_MC_BOOTROM_NOFLASH_VEC … #define MEDFORD_MC_BOOTROM_NOFLASH_VEC … /* Points to the recovery mode entry point. Same as above, but the right name. */ #define SIENA_MC_BOOTROM_RECOVERY_VEC … #define HUNT_MC_BOOTROM_RECOVERY_VEC … #define MEDFORD_MC_BOOTROM_RECOVERY_VEC … /* Points to noflash mode entry point. */ #define MEDFORD_MC_BOOTROM_REAL_NOFLASH_VEC … /* The command set exported by the boot ROM (MCDI v0) */ #define MC_CMD_GET_VERSION_V0_SUPPORTED_FUNCS … #define MC_CMD_SENSOR_INFO_OUT_OFFSET_OFST(_x) … #define MC_CMD_DBI_WRITE_IN_ADDRESS_OFST(n) … #define MC_CMD_DBI_WRITE_IN_BYTE_MASK_OFST(n) … #define MC_CMD_DBI_WRITE_IN_VALUE_OFST(n) … /* This may be ORed with an EVB_PORT_ID_xxx constant to pass a non-default * stack ID (which must be in the range 1-255) along with an EVB port ID. */ #define EVB_STACK_ID(n) … /* Version 2 adds an optional argument to error returns: the errno value * may be followed by the (0-based) number of the first argument that * could not be processed. */ #define MC_CMD_ERR_ARG_OFST … /* No space */ #define MC_CMD_ERR_ENOSPC … /* MCDI_EVENT structuredef */ #define MCDI_EVENT_LEN … #define MCDI_EVENT_CONT_LBN … #define MCDI_EVENT_CONT_WIDTH … #define MCDI_EVENT_LEVEL_LBN … #define MCDI_EVENT_LEVEL_WIDTH … /* enum: Info. */ #define MCDI_EVENT_LEVEL_INFO … /* enum: Warning. */ #define MCDI_EVENT_LEVEL_WARN … /* enum: Error. */ #define MCDI_EVENT_LEVEL_ERR … /* enum: Fatal. */ #define MCDI_EVENT_LEVEL_FATAL … #define MCDI_EVENT_DATA_OFST … #define MCDI_EVENT_DATA_LEN … #define MCDI_EVENT_CMDDONE_SEQ_OFST … #define MCDI_EVENT_CMDDONE_SEQ_LBN … #define MCDI_EVENT_CMDDONE_SEQ_WIDTH … #define MCDI_EVENT_CMDDONE_DATALEN_OFST … #define MCDI_EVENT_CMDDONE_DATALEN_LBN … #define MCDI_EVENT_CMDDONE_DATALEN_WIDTH … #define MCDI_EVENT_CMDDONE_ERRNO_OFST … #define MCDI_EVENT_CMDDONE_ERRNO_LBN … #define MCDI_EVENT_CMDDONE_ERRNO_WIDTH … #define MCDI_EVENT_LINKCHANGE_LP_CAP_OFST … #define MCDI_EVENT_LINKCHANGE_LP_CAP_LBN … #define MCDI_EVENT_LINKCHANGE_LP_CAP_WIDTH … #define MCDI_EVENT_LINKCHANGE_SPEED_OFST … #define MCDI_EVENT_LINKCHANGE_SPEED_LBN … #define MCDI_EVENT_LINKCHANGE_SPEED_WIDTH … /* enum: Link is down or link speed could not be determined */ #define MCDI_EVENT_LINKCHANGE_SPEED_UNKNOWN … /* enum: 100Mbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_100M … /* enum: 1Gbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_1G … /* enum: 10Gbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_10G … /* enum: 40Gbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_40G … /* enum: 25Gbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_25G … /* enum: 50Gbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_50G … /* enum: 100Gbs */ #define MCDI_EVENT_LINKCHANGE_SPEED_100G … #define MCDI_EVENT_LINKCHANGE_FCNTL_OFST … #define MCDI_EVENT_LINKCHANGE_FCNTL_LBN … #define MCDI_EVENT_LINKCHANGE_FCNTL_WIDTH … #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_OFST … #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN … #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_WIDTH … #define MCDI_EVENT_SENSOREVT_MONITOR_OFST … #define MCDI_EVENT_SENSOREVT_MONITOR_LBN … #define MCDI_EVENT_SENSOREVT_MONITOR_WIDTH … #define MCDI_EVENT_SENSOREVT_STATE_OFST … #define MCDI_EVENT_SENSOREVT_STATE_LBN … #define MCDI_EVENT_SENSOREVT_STATE_WIDTH … #define MCDI_EVENT_SENSOREVT_VALUE_OFST … #define MCDI_EVENT_SENSOREVT_VALUE_LBN … #define MCDI_EVENT_SENSOREVT_VALUE_WIDTH … #define MCDI_EVENT_FWALERT_DATA_OFST … #define MCDI_EVENT_FWALERT_DATA_LBN … #define MCDI_EVENT_FWALERT_DATA_WIDTH … #define MCDI_EVENT_FWALERT_REASON_OFST … #define MCDI_EVENT_FWALERT_REASON_LBN … #define MCDI_EVENT_FWALERT_REASON_WIDTH … /* enum: SRAM Access. */ #define MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS … #define MCDI_EVENT_FLR_VF_OFST … #define MCDI_EVENT_FLR_VF_LBN … #define MCDI_EVENT_FLR_VF_WIDTH … #define MCDI_EVENT_TX_ERR_TXQ_OFST … #define MCDI_EVENT_TX_ERR_TXQ_LBN … #define MCDI_EVENT_TX_ERR_TXQ_WIDTH … #define MCDI_EVENT_TX_ERR_TYPE_OFST … #define MCDI_EVENT_TX_ERR_TYPE_LBN … #define MCDI_EVENT_TX_ERR_TYPE_WIDTH … /* enum: Descriptor loader reported failure */ #define MCDI_EVENT_TX_ERR_DL_FAIL … /* enum: Descriptor ring empty and no EOP seen for packet */ #define MCDI_EVENT_TX_ERR_NO_EOP … /* enum: Overlength packet */ #define MCDI_EVENT_TX_ERR_2BIG … /* enum: Malformed option descriptor */ #define MCDI_EVENT_TX_BAD_OPTDESC … /* enum: Option descriptor part way through a packet */ #define MCDI_EVENT_TX_OPT_IN_PKT … /* enum: DMA or PIO data access error */ #define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO … #define MCDI_EVENT_TX_ERR_INFO_OFST … #define MCDI_EVENT_TX_ERR_INFO_LBN … #define MCDI_EVENT_TX_ERR_INFO_WIDTH … #define MCDI_EVENT_TX_FLUSH_TO_DRIVER_OFST … #define MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN … #define MCDI_EVENT_TX_FLUSH_TO_DRIVER_WIDTH … #define MCDI_EVENT_TX_FLUSH_TXQ_OFST … #define MCDI_EVENT_TX_FLUSH_TXQ_LBN … #define MCDI_EVENT_TX_FLUSH_TXQ_WIDTH … #define MCDI_EVENT_PTP_ERR_TYPE_OFST … #define MCDI_EVENT_PTP_ERR_TYPE_LBN … #define MCDI_EVENT_PTP_ERR_TYPE_WIDTH … /* enum: PLL lost lock */ #define MCDI_EVENT_PTP_ERR_PLL_LOST … /* enum: Filter overflow (PDMA) */ #define MCDI_EVENT_PTP_ERR_FILTER … /* enum: FIFO overflow (FPGA) */ #define MCDI_EVENT_PTP_ERR_FIFO … /* enum: Merge queue overflow */ #define MCDI_EVENT_PTP_ERR_QUEUE … #define MCDI_EVENT_AOE_ERR_TYPE_OFST … #define MCDI_EVENT_AOE_ERR_TYPE_LBN … #define MCDI_EVENT_AOE_ERR_TYPE_WIDTH … /* enum: AOE failed to load - no valid image? */ #define MCDI_EVENT_AOE_NO_LOAD … /* enum: AOE FC reported an exception */ #define MCDI_EVENT_AOE_FC_ASSERT … /* enum: AOE FC watchdogged */ #define MCDI_EVENT_AOE_FC_WATCHDOG … /* enum: AOE FC failed to start */ #define MCDI_EVENT_AOE_FC_NO_START … /* enum: Generic AOE fault - likely to have been reported via other means too * but intended for use by aoex driver. */ #define MCDI_EVENT_AOE_FAULT … /* enum: Results of reprogramming the CPLD (status in AOE_ERR_DATA) */ #define MCDI_EVENT_AOE_CPLD_REPROGRAMMED … /* enum: AOE loaded successfully */ #define MCDI_EVENT_AOE_LOAD … /* enum: AOE DMA operation completed (LSB of HOST_HANDLE in AOE_ERR_DATA) */ #define MCDI_EVENT_AOE_DMA … /* enum: AOE byteblaster connected/disconnected (Connection status in * AOE_ERR_DATA) */ #define MCDI_EVENT_AOE_BYTEBLASTER … /* enum: DDR ECC status update */ #define MCDI_EVENT_AOE_DDR_ECC_STATUS … /* enum: PTP status update */ #define MCDI_EVENT_AOE_PTP_STATUS … /* enum: FPGA header incorrect */ #define MCDI_EVENT_AOE_FPGA_LOAD_HEADER_ERR … /* enum: FPGA Powered Off due to error in powering up FPGA */ #define MCDI_EVENT_AOE_FPGA_POWER_OFF … /* enum: AOE FPGA load failed due to MC to MUM communication failure */ #define MCDI_EVENT_AOE_FPGA_LOAD_FAILED … /* enum: Notify that invalid flash type detected */ #define MCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE … /* enum: Notify that the attempt to run FPGA Controller firmware timedout */ #define MCDI_EVENT_AOE_FC_RUN_TIMEDOUT … /* enum: Failure to probe one or more FPGA boot flash chips */ #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID … /* enum: FPGA boot-flash contains an invalid image header */ #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_HDR_INVALID … /* enum: Failed to program clocks required by the FPGA */ #define MCDI_EVENT_AOE_FPGA_CLOCKS_PROGRAM_FAILED … /* enum: Notify that FPGA Controller is alive to serve MCDI requests */ #define MCDI_EVENT_AOE_FC_RUNNING … #define MCDI_EVENT_AOE_ERR_DATA_OFST … #define MCDI_EVENT_AOE_ERR_DATA_LBN … #define MCDI_EVENT_AOE_ERR_DATA_WIDTH … #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_OFST … #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_LBN … #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH … /* enum: FC Assert happened, but the register information is not available */ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN … /* enum: The register information for FC Assert is ready for readinng by driver */ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_OFST … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_LBN … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_WIDTH … /* enum: Reading from NV failed */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_NV_READ_FAIL … /* enum: Invalid Magic Number if FPGA header */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_MAGIC_FAIL … /* enum: Invalid Silicon type detected in header */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_SILICON_TYPE … /* enum: Unsupported VRatio */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_VRATIO … /* enum: Unsupported DDR Type */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_TYPE … /* enum: DDR Voltage out of supported range */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_VOLTAGE … /* enum: Unsupported DDR speed */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_SPEED … /* enum: Unsupported DDR size */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_SIZE … /* enum: Unsupported DDR rank */ #define MCDI_EVENT_AOE_ERR_FPGA_HEADER_DDR_RANK … #define MCDI_EVENT_AOE_ERR_CODE_INVALID_FPGA_FLASH_TYPE_INFO_OFST … #define MCDI_EVENT_AOE_ERR_CODE_INVALID_FPGA_FLASH_TYPE_INFO_LBN … #define MCDI_EVENT_AOE_ERR_CODE_INVALID_FPGA_FLASH_TYPE_INFO_WIDTH … /* enum: Primary boot flash */ #define MCDI_EVENT_AOE_FLASH_TYPE_BOOT_PRIMARY … /* enum: Secondary boot flash */ #define MCDI_EVENT_AOE_FLASH_TYPE_BOOT_SECONDARY … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_POWER_OFF_OFST … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_POWER_OFF_LBN … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_POWER_OFF_WIDTH … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_LOAD_FAILED_OFST … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_LOAD_FAILED_LBN … #define MCDI_EVENT_AOE_ERR_CODE_FPGA_LOAD_FAILED_WIDTH … #define MCDI_EVENT_RX_ERR_RXQ_OFST … #define MCDI_EVENT_RX_ERR_RXQ_LBN … #define MCDI_EVENT_RX_ERR_RXQ_WIDTH … #define MCDI_EVENT_RX_ERR_TYPE_OFST … #define MCDI_EVENT_RX_ERR_TYPE_LBN … #define MCDI_EVENT_RX_ERR_TYPE_WIDTH … #define MCDI_EVENT_RX_ERR_INFO_OFST … #define MCDI_EVENT_RX_ERR_INFO_LBN … #define MCDI_EVENT_RX_ERR_INFO_WIDTH … #define MCDI_EVENT_RX_FLUSH_TO_DRIVER_OFST … #define MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN … #define MCDI_EVENT_RX_FLUSH_TO_DRIVER_WIDTH … #define MCDI_EVENT_RX_FLUSH_RXQ_OFST … #define MCDI_EVENT_RX_FLUSH_RXQ_LBN … #define MCDI_EVENT_RX_FLUSH_RXQ_WIDTH … #define MCDI_EVENT_MC_REBOOT_COUNT_OFST … #define MCDI_EVENT_MC_REBOOT_COUNT_LBN … #define MCDI_EVENT_MC_REBOOT_COUNT_WIDTH … #define MCDI_EVENT_MUM_ERR_TYPE_OFST … #define MCDI_EVENT_MUM_ERR_TYPE_LBN … #define MCDI_EVENT_MUM_ERR_TYPE_WIDTH … /* enum: MUM failed to load - no valid image? */ #define MCDI_EVENT_MUM_NO_LOAD … /* enum: MUM f/w reported an exception */ #define MCDI_EVENT_MUM_ASSERT … /* enum: MUM not kicking watchdog */ #define MCDI_EVENT_MUM_WATCHDOG … #define MCDI_EVENT_MUM_ERR_DATA_OFST … #define MCDI_EVENT_MUM_ERR_DATA_LBN … #define MCDI_EVENT_MUM_ERR_DATA_WIDTH … #define MCDI_EVENT_DBRET_SEQ_OFST … #define MCDI_EVENT_DBRET_SEQ_LBN … #define MCDI_EVENT_DBRET_SEQ_WIDTH … #define MCDI_EVENT_SUC_ERR_TYPE_OFST … #define MCDI_EVENT_SUC_ERR_TYPE_LBN … #define MCDI_EVENT_SUC_ERR_TYPE_WIDTH … /* enum: Corrupted or bad SUC application. */ #define MCDI_EVENT_SUC_BAD_APP … /* enum: SUC application reported an assert. */ #define MCDI_EVENT_SUC_ASSERT … /* enum: SUC application reported an exception. */ #define MCDI_EVENT_SUC_EXCEPTION … /* enum: SUC watchdog timer expired. */ #define MCDI_EVENT_SUC_WATCHDOG … #define MCDI_EVENT_SUC_ERR_ADDRESS_OFST … #define MCDI_EVENT_SUC_ERR_ADDRESS_LBN … #define MCDI_EVENT_SUC_ERR_ADDRESS_WIDTH … #define MCDI_EVENT_SUC_ERR_DATA_OFST … #define MCDI_EVENT_SUC_ERR_DATA_LBN … #define MCDI_EVENT_SUC_ERR_DATA_WIDTH … #define MCDI_EVENT_LINKCHANGE_V2_LP_CAP_OFST … #define MCDI_EVENT_LINKCHANGE_V2_LP_CAP_LBN … #define MCDI_EVENT_LINKCHANGE_V2_LP_CAP_WIDTH … #define MCDI_EVENT_LINKCHANGE_V2_SPEED_OFST … #define MCDI_EVENT_LINKCHANGE_V2_SPEED_LBN … #define MCDI_EVENT_LINKCHANGE_V2_SPEED_WIDTH … /* Enum values, see field(s): */ /* MCDI_EVENT/LINKCHANGE_SPEED */ #define MCDI_EVENT_LINKCHANGE_V2_FLAGS_LINK_UP_OFST … #define MCDI_EVENT_LINKCHANGE_V2_FLAGS_LINK_UP_LBN … #define MCDI_EVENT_LINKCHANGE_V2_FLAGS_LINK_UP_WIDTH … #define MCDI_EVENT_LINKCHANGE_V2_FCNTL_OFST … #define MCDI_EVENT_LINKCHANGE_V2_FCNTL_LBN … #define MCDI_EVENT_LINKCHANGE_V2_FCNTL_WIDTH … /* Enum values, see field(s): */ /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ #define MCDI_EVENT_MODULECHANGE_LD_CAP_OFST … #define MCDI_EVENT_MODULECHANGE_LD_CAP_LBN … #define MCDI_EVENT_MODULECHANGE_LD_CAP_WIDTH … #define MCDI_EVENT_MODULECHANGE_SEQ_OFST … #define MCDI_EVENT_MODULECHANGE_SEQ_LBN … #define MCDI_EVENT_MODULECHANGE_SEQ_WIDTH … #define MCDI_EVENT_DATA_LBN … #define MCDI_EVENT_DATA_WIDTH … /* Alias for PTP_DATA. */ #define MCDI_EVENT_SRC_LBN … #define MCDI_EVENT_SRC_WIDTH … /* Data associated with PTP events which doesn't fit into the main DATA field */ #define MCDI_EVENT_PTP_DATA_LBN … #define MCDI_EVENT_PTP_DATA_WIDTH … /* EF100 specific. Defined by QDMA. The phase bit, changes each time round the * event ring */ #define MCDI_EVENT_EV_EVQ_PHASE_LBN … #define MCDI_EVENT_EV_EVQ_PHASE_WIDTH … #define MCDI_EVENT_EV_CODE_LBN … #define MCDI_EVENT_EV_CODE_WIDTH … #define MCDI_EVENT_CODE_LBN … #define MCDI_EVENT_CODE_WIDTH … /* enum: Event generated by host software */ #define MCDI_EVENT_SW_EVENT … /* enum: Bad assert. */ #define MCDI_EVENT_CODE_BADSSERT … /* enum: PM Notice. */ #define MCDI_EVENT_CODE_PMNOTICE … /* enum: Command done. */ #define MCDI_EVENT_CODE_CMDDONE … /* enum: Link change. */ #define MCDI_EVENT_CODE_LINKCHANGE … /* enum: Sensor Event. */ #define MCDI_EVENT_CODE_SENSOREVT … /* enum: Schedule error. */ #define MCDI_EVENT_CODE_SCHEDERR … /* enum: Reboot. */ #define MCDI_EVENT_CODE_REBOOT … /* enum: Mac stats DMA. */ #define MCDI_EVENT_CODE_MAC_STATS_DMA … /* enum: Firmware alert. */ #define MCDI_EVENT_CODE_FWALERT … /* enum: Function level reset. */ #define MCDI_EVENT_CODE_FLR … /* enum: Transmit error */ #define MCDI_EVENT_CODE_TX_ERR … /* enum: Tx flush has completed */ #define MCDI_EVENT_CODE_TX_FLUSH … /* enum: PTP packet received timestamp */ #define MCDI_EVENT_CODE_PTP_RX … /* enum: PTP NIC failure */ #define MCDI_EVENT_CODE_PTP_FAULT … /* enum: PTP PPS event */ #define MCDI_EVENT_CODE_PTP_PPS … /* enum: Rx flush has completed */ #define MCDI_EVENT_CODE_RX_FLUSH … /* enum: Receive error */ #define MCDI_EVENT_CODE_RX_ERR … /* enum: AOE fault */ #define MCDI_EVENT_CODE_AOE … /* enum: Network port calibration failed (VCAL). */ #define MCDI_EVENT_CODE_VCAL_FAIL … /* enum: HW PPS event */ #define MCDI_EVENT_CODE_HW_PPS … /* enum: The MC has rebooted (huntington and later, siena uses CODE_REBOOT and * a different format) */ #define MCDI_EVENT_CODE_MC_REBOOT … /* enum: the MC has detected a parity error */ #define MCDI_EVENT_CODE_PAR_ERR … /* enum: the MC has detected a correctable error */ #define MCDI_EVENT_CODE_ECC_CORR_ERR … /* enum: the MC has detected an uncorrectable error */ #define MCDI_EVENT_CODE_ECC_FATAL_ERR … /* enum: The MC has entered offline BIST mode */ #define MCDI_EVENT_CODE_MC_BIST … /* enum: PTP tick event providing current NIC time */ #define MCDI_EVENT_CODE_PTP_TIME … /* enum: MUM fault */ #define MCDI_EVENT_CODE_MUM … /* enum: notify the designated PF of a new authorization request */ #define MCDI_EVENT_CODE_PROXY_REQUEST … /* enum: notify a function that awaits an authorization that its request has * been processed and it may now resend the command */ #define MCDI_EVENT_CODE_PROXY_RESPONSE … /* enum: MCDI command accepted. New commands can be issued but this command is * not done yet. */ #define MCDI_EVENT_CODE_DBRET … /* enum: The MC has detected a fault on the SUC */ #define MCDI_EVENT_CODE_SUC … /* enum: Link change. This event is sent instead of LINKCHANGE if * WANT_V2_LINKCHANGES was set on driver attach. */ #define MCDI_EVENT_CODE_LINKCHANGE_V2 … /* enum: This event is sent if WANT_V2_LINKCHANGES was set on driver attach * when the local device capabilities changes. This will usually correspond to * a module change. */ #define MCDI_EVENT_CODE_MODULECHANGE … /* enum: Notification that the sensors have been added and/or removed from the * sensor table. This event includes the new sensor table generation count, if * this does not match the driver's local copy it is expected to call * DYNAMIC_SENSORS_LIST to refresh it. */ #define MCDI_EVENT_CODE_DYNAMIC_SENSORS_CHANGE … /* enum: Notification that a sensor has changed state as a result of a reading * crossing a threshold. This is sent as two events, the first event contains * the handle and the sensor's state (in the SRC field), and the second * contains the value. */ #define MCDI_EVENT_CODE_DYNAMIC_SENSORS_STATE_CHANGE … /* enum: Notification that a descriptor proxy function configuration has been * pushed to "live" status (visible to host). SRC field contains the handle of * the affected descriptor proxy function. DATA field contains the generation * count of configuration set applied. See MC_CMD_DESC_PROXY_FUNC_CONFIG_SET / * MC_CMD_DESC_PROXY_FUNC_CONFIG_COMMIT and SF-122927-TC for details. */ #define MCDI_EVENT_CODE_DESC_PROXY_FUNC_CONFIG_COMMITTED … /* enum: Notification that a descriptor proxy function has been reset. SRC * field contains the handle of the affected descriptor proxy function. See * SF-122927-TC for details. */ #define MCDI_EVENT_CODE_DESC_PROXY_FUNC_RESET … /* enum: Notification that a driver attached to a descriptor proxy function. * SRC field contains the handle of the affected descriptor proxy function. For * Virtio proxy functions this message consists of two MCDI events, where the * first event's (CONT=1) DATA field carries negotiated virtio feature bits 0 * to 31 and the second (CONT=0) carries bits 32 to 63. For EF100 proxy * functions event length and meaning of DATA field is not yet defined. See * SF-122927-TC for details. */ #define MCDI_EVENT_CODE_DESC_PROXY_FUNC_DRIVER_ATTACH … /* enum: Artificial event generated by host and posted via MC for test * purposes. */ #define MCDI_EVENT_CODE_TESTGEN … #define MCDI_EVENT_CMDDONE_DATA_OFST … #define MCDI_EVENT_CMDDONE_DATA_LEN … #define MCDI_EVENT_CMDDONE_DATA_LBN … #define MCDI_EVENT_CMDDONE_DATA_WIDTH … #define MCDI_EVENT_LINKCHANGE_DATA_OFST … #define MCDI_EVENT_LINKCHANGE_DATA_LEN … #define MCDI_EVENT_LINKCHANGE_DATA_LBN … #define MCDI_EVENT_LINKCHANGE_DATA_WIDTH … #define MCDI_EVENT_SENSOREVT_DATA_OFST … #define MCDI_EVENT_SENSOREVT_DATA_LEN … #define MCDI_EVENT_SENSOREVT_DATA_LBN … #define MCDI_EVENT_SENSOREVT_DATA_WIDTH … #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_OFST … #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_LEN … #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_LBN … #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_WIDTH … #define MCDI_EVENT_TX_ERR_DATA_OFST … #define MCDI_EVENT_TX_ERR_DATA_LEN … #define MCDI_EVENT_TX_ERR_DATA_LBN … #define MCDI_EVENT_TX_ERR_DATA_WIDTH … /* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the seconds field of * timestamp */ #define MCDI_EVENT_PTP_SECONDS_OFST … #define MCDI_EVENT_PTP_SECONDS_LEN … #define MCDI_EVENT_PTP_SECONDS_LBN … #define MCDI_EVENT_PTP_SECONDS_WIDTH … /* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the major field of * timestamp */ #define MCDI_EVENT_PTP_MAJOR_OFST … #define MCDI_EVENT_PTP_MAJOR_LEN … #define MCDI_EVENT_PTP_MAJOR_LBN … #define MCDI_EVENT_PTP_MAJOR_WIDTH … /* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the nanoseconds field * of timestamp */ #define MCDI_EVENT_PTP_NANOSECONDS_OFST … #define MCDI_EVENT_PTP_NANOSECONDS_LEN … #define MCDI_EVENT_PTP_NANOSECONDS_LBN … #define MCDI_EVENT_PTP_NANOSECONDS_WIDTH … /* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the minor field of * timestamp */ #define MCDI_EVENT_PTP_MINOR_OFST … #define MCDI_EVENT_PTP_MINOR_LEN … #define MCDI_EVENT_PTP_MINOR_LBN … #define MCDI_EVENT_PTP_MINOR_WIDTH … /* For CODE_PTP_RX events, the lowest four bytes of sourceUUID from PTP packet */ #define MCDI_EVENT_PTP_UUID_OFST … #define MCDI_EVENT_PTP_UUID_LEN … #define MCDI_EVENT_PTP_UUID_LBN … #define MCDI_EVENT_PTP_UUID_WIDTH … #define MCDI_EVENT_RX_ERR_DATA_OFST … #define MCDI_EVENT_RX_ERR_DATA_LEN … #define MCDI_EVENT_RX_ERR_DATA_LBN … #define MCDI_EVENT_RX_ERR_DATA_WIDTH … #define MCDI_EVENT_PAR_ERR_DATA_OFST … #define MCDI_EVENT_PAR_ERR_DATA_LEN … #define MCDI_EVENT_PAR_ERR_DATA_LBN … #define MCDI_EVENT_PAR_ERR_DATA_WIDTH … #define MCDI_EVENT_ECC_CORR_ERR_DATA_OFST … #define MCDI_EVENT_ECC_CORR_ERR_DATA_LEN … #define MCDI_EVENT_ECC_CORR_ERR_DATA_LBN … #define MCDI_EVENT_ECC_CORR_ERR_DATA_WIDTH … #define MCDI_EVENT_ECC_FATAL_ERR_DATA_OFST … #define MCDI_EVENT_ECC_FATAL_ERR_DATA_LEN … #define MCDI_EVENT_ECC_FATAL_ERR_DATA_LBN … #define MCDI_EVENT_ECC_FATAL_ERR_DATA_WIDTH … /* For CODE_PTP_TIME events, the major value of the PTP clock */ #define MCDI_EVENT_PTP_TIME_MAJOR_OFST … #define MCDI_EVENT_PTP_TIME_MAJOR_LEN … #define MCDI_EVENT_PTP_TIME_MAJOR_LBN … #define MCDI_EVENT_PTP_TIME_MAJOR_WIDTH … /* For CODE_PTP_TIME events, bits 19-26 of the minor value of the PTP clock */ #define MCDI_EVENT_PTP_TIME_MINOR_26_19_LBN … #define MCDI_EVENT_PTP_TIME_MINOR_26_19_WIDTH … /* For CODE_PTP_TIME events, most significant bits of the minor value of the * PTP clock. This is a more generic equivalent of PTP_TIME_MINOR_26_19. */ #define MCDI_EVENT_PTP_TIME_MINOR_MS_8BITS_LBN … #define MCDI_EVENT_PTP_TIME_MINOR_MS_8BITS_WIDTH … /* For CODE_PTP_TIME events where report sync status is enabled, indicates * whether the NIC clock has ever been set */ #define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_LBN … #define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_WIDTH … /* For CODE_PTP_TIME events where report sync status is enabled, indicates * whether the NIC and System clocks are in sync */ #define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_LBN … #define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_WIDTH … /* For CODE_PTP_TIME events where report sync status is enabled, bits 21-26 of * the minor value of the PTP clock */ #define MCDI_EVENT_PTP_TIME_MINOR_26_21_LBN … #define MCDI_EVENT_PTP_TIME_MINOR_26_21_WIDTH … /* For CODE_PTP_TIME events, most significant bits of the minor value of the * PTP clock. This is a more generic equivalent of PTP_TIME_MINOR_26_21. */ #define MCDI_EVENT_PTP_TIME_MINOR_MS_6BITS_LBN … #define MCDI_EVENT_PTP_TIME_MINOR_MS_6BITS_WIDTH … #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_OFST … #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_LEN … #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_LBN … #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_WIDTH … #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_OFST … #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_LEN … #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_LBN … #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_WIDTH … /* Zero means that the request has been completed or authorized, and the driver * should resend it. A non-zero value means that the authorization has been * denied, and gives the reason. Typically it will be EPERM. */ #define MCDI_EVENT_PROXY_RESPONSE_RC_LBN … #define MCDI_EVENT_PROXY_RESPONSE_RC_WIDTH … #define MCDI_EVENT_DBRET_DATA_OFST … #define MCDI_EVENT_DBRET_DATA_LEN … #define MCDI_EVENT_DBRET_DATA_LBN … #define MCDI_EVENT_DBRET_DATA_WIDTH … #define MCDI_EVENT_LINKCHANGE_V2_DATA_OFST … #define MCDI_EVENT_LINKCHANGE_V2_DATA_LEN … #define MCDI_EVENT_LINKCHANGE_V2_DATA_LBN … #define MCDI_EVENT_LINKCHANGE_V2_DATA_WIDTH … #define MCDI_EVENT_MODULECHANGE_DATA_OFST … #define MCDI_EVENT_MODULECHANGE_DATA_LEN … #define MCDI_EVENT_MODULECHANGE_DATA_LBN … #define MCDI_EVENT_MODULECHANGE_DATA_WIDTH … /* The new generation count after a sensor has been added or deleted. */ #define MCDI_EVENT_DYNAMIC_SENSORS_GENERATION_OFST … #define MCDI_EVENT_DYNAMIC_SENSORS_GENERATION_LEN … #define MCDI_EVENT_DYNAMIC_SENSORS_GENERATION_LBN … #define MCDI_EVENT_DYNAMIC_SENSORS_GENERATION_WIDTH … /* The handle of a dynamic sensor. */ #define MCDI_EVENT_DYNAMIC_SENSORS_HANDLE_OFST … #define MCDI_EVENT_DYNAMIC_SENSORS_HANDLE_LEN … #define MCDI_EVENT_DYNAMIC_SENSORS_HANDLE_LBN … #define MCDI_EVENT_DYNAMIC_SENSORS_HANDLE_WIDTH … /* The current values of a sensor. */ #define MCDI_EVENT_DYNAMIC_SENSORS_VALUE_OFST … #define MCDI_EVENT_DYNAMIC_SENSORS_VALUE_LEN … #define MCDI_EVENT_DYNAMIC_SENSORS_VALUE_LBN … #define MCDI_EVENT_DYNAMIC_SENSORS_VALUE_WIDTH … /* The current state of a sensor. */ #define MCDI_EVENT_DYNAMIC_SENSORS_STATE_LBN … #define MCDI_EVENT_DYNAMIC_SENSORS_STATE_WIDTH … #define MCDI_EVENT_DESC_PROXY_DATA_OFST … #define MCDI_EVENT_DESC_PROXY_DATA_LEN … #define MCDI_EVENT_DESC_PROXY_DATA_LBN … #define MCDI_EVENT_DESC_PROXY_DATA_WIDTH … /* Generation count of applied configuration set */ #define MCDI_EVENT_DESC_PROXY_GENERATION_OFST … #define MCDI_EVENT_DESC_PROXY_GENERATION_LEN … #define MCDI_EVENT_DESC_PROXY_GENERATION_LBN … #define MCDI_EVENT_DESC_PROXY_GENERATION_WIDTH … /* Virtio features negotiated with the host driver. First event (CONT=1) * carries bits 0 to 31. Second event (CONT=0) carries bits 32 to 63. */ #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_OFST … #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LEN … #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LBN … #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_WIDTH … /* FCDI_EVENT structuredef */ #define FCDI_EVENT_LEN … #define FCDI_EVENT_CONT_LBN … #define FCDI_EVENT_CONT_WIDTH … #define FCDI_EVENT_LEVEL_LBN … #define FCDI_EVENT_LEVEL_WIDTH … /* enum: Info. */ #define FCDI_EVENT_LEVEL_INFO … /* enum: Warning. */ #define FCDI_EVENT_LEVEL_WARN … /* enum: Error. */ #define FCDI_EVENT_LEVEL_ERR … /* enum: Fatal. */ #define FCDI_EVENT_LEVEL_FATAL … #define FCDI_EVENT_DATA_OFST … #define FCDI_EVENT_DATA_LEN … #define FCDI_EVENT_LINK_STATE_STATUS_OFST … #define FCDI_EVENT_LINK_STATE_STATUS_LBN … #define FCDI_EVENT_LINK_STATE_STATUS_WIDTH … #define FCDI_EVENT_LINK_DOWN … #define FCDI_EVENT_LINK_UP … #define FCDI_EVENT_DATA_LBN … #define FCDI_EVENT_DATA_WIDTH … #define FCDI_EVENT_SRC_LBN … #define FCDI_EVENT_SRC_WIDTH … #define FCDI_EVENT_EV_CODE_LBN … #define FCDI_EVENT_EV_CODE_WIDTH … #define FCDI_EVENT_CODE_LBN … #define FCDI_EVENT_CODE_WIDTH … /* enum: The FC was rebooted. */ #define FCDI_EVENT_CODE_REBOOT … /* enum: Bad assert. */ #define FCDI_EVENT_CODE_ASSERT … /* enum: DDR3 test result. */ #define FCDI_EVENT_CODE_DDR_TEST_RESULT … /* enum: Link status. */ #define FCDI_EVENT_CODE_LINK_STATE … /* enum: A timed read is ready to be serviced. */ #define FCDI_EVENT_CODE_TIMED_READ … /* enum: One or more PPS IN events */ #define FCDI_EVENT_CODE_PPS_IN … /* enum: Tick event from PTP clock */ #define FCDI_EVENT_CODE_PTP_TICK … /* enum: ECC error counters */ #define FCDI_EVENT_CODE_DDR_ECC_STATUS … /* enum: Current status of PTP */ #define FCDI_EVENT_CODE_PTP_STATUS … /* enum: Port id config to map MC-FC port idx */ #define FCDI_EVENT_CODE_PORT_CONFIG … /* enum: Boot result or error code */ #define FCDI_EVENT_CODE_BOOT_RESULT … #define FCDI_EVENT_REBOOT_SRC_LBN … #define FCDI_EVENT_REBOOT_SRC_WIDTH … #define FCDI_EVENT_REBOOT_FC_FW … #define FCDI_EVENT_REBOOT_FC_BOOTLOADER … #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_OFST … #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LEN … #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LBN … #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_WIDTH … #define FCDI_EVENT_ASSERT_TYPE_LBN … #define FCDI_EVENT_ASSERT_TYPE_WIDTH … #define FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_LBN … #define FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_WIDTH … #define FCDI_EVENT_DDR_TEST_RESULT_RESULT_OFST … #define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LEN … #define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LBN … #define FCDI_EVENT_DDR_TEST_RESULT_RESULT_WIDTH … #define FCDI_EVENT_LINK_STATE_DATA_OFST … #define FCDI_EVENT_LINK_STATE_DATA_LEN … #define FCDI_EVENT_LINK_STATE_DATA_LBN … #define FCDI_EVENT_LINK_STATE_DATA_WIDTH … #define FCDI_EVENT_PTP_STATE_OFST … #define FCDI_EVENT_PTP_STATE_LEN … #define FCDI_EVENT_PTP_UNDEFINED … #define FCDI_EVENT_PTP_SETUP_FAILED … #define FCDI_EVENT_PTP_OPERATIONAL … #define FCDI_EVENT_PTP_STATE_LBN … #define FCDI_EVENT_PTP_STATE_WIDTH … #define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_LBN … #define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_WIDTH … #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_OFST … #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LEN … #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LBN … #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_WIDTH … /* Index of MC port being referred to */ #define FCDI_EVENT_PORT_CONFIG_SRC_LBN … #define FCDI_EVENT_PORT_CONFIG_SRC_WIDTH … /* FC Port index that matches the MC port index in SRC */ #define FCDI_EVENT_PORT_CONFIG_DATA_OFST … #define FCDI_EVENT_PORT_CONFIG_DATA_LEN … #define FCDI_EVENT_PORT_CONFIG_DATA_LBN … #define FCDI_EVENT_PORT_CONFIG_DATA_WIDTH … #define FCDI_EVENT_BOOT_RESULT_OFST … #define FCDI_EVENT_BOOT_RESULT_LEN … /* Enum values, see field(s): */ /* MC_CMD_AOE/MC_CMD_AOE_OUT_INFO/FC_BOOT_RESULT */ #define FCDI_EVENT_BOOT_RESULT_LBN … #define FCDI_EVENT_BOOT_RESULT_WIDTH … /* FCDI_EXTENDED_EVENT_PPS structuredef: Extended FCDI event to send PPS events * to the MC. Note that this structure | is overlayed over a normal FCDI event * such that bits 32-63 containing | event code, level, source etc remain the * same. In this case the data | field of the header is defined to be the * number of timestamps */ #define FCDI_EXTENDED_EVENT_PPS_LENMIN … #define FCDI_EXTENDED_EVENT_PPS_LENMAX … #define FCDI_EXTENDED_EVENT_PPS_LENMAX_MCDI2 … #define FCDI_EXTENDED_EVENT_PPS_LEN(num) … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_NUM(len) … /* Number of timestamps following */ #define FCDI_EXTENDED_EVENT_PPS_COUNT_OFST … #define FCDI_EXTENDED_EVENT_PPS_COUNT_LEN … #define FCDI_EXTENDED_EVENT_PPS_COUNT_LBN … #define FCDI_EXTENDED_EVENT_PPS_COUNT_WIDTH … /* Seconds field of a timestamp record */ #define FCDI_EXTENDED_EVENT_PPS_SECONDS_OFST … #define FCDI_EXTENDED_EVENT_PPS_SECONDS_LEN … #define FCDI_EXTENDED_EVENT_PPS_SECONDS_LBN … #define FCDI_EXTENDED_EVENT_PPS_SECONDS_WIDTH … /* Nanoseconds field of a timestamp record */ #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_OFST … #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LEN … #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LBN … #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_WIDTH … /* Timestamp records comprising the event */ #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN … #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH … /* MUM_EVENT structuredef */ #define MUM_EVENT_LEN … #define MUM_EVENT_CONT_LBN … #define MUM_EVENT_CONT_WIDTH … #define MUM_EVENT_LEVEL_LBN … #define MUM_EVENT_LEVEL_WIDTH … /* enum: Info. */ #define MUM_EVENT_LEVEL_INFO … /* enum: Warning. */ #define MUM_EVENT_LEVEL_WARN … /* enum: Error. */ #define MUM_EVENT_LEVEL_ERR … /* enum: Fatal. */ #define MUM_EVENT_LEVEL_FATAL … #define MUM_EVENT_DATA_OFST … #define MUM_EVENT_DATA_LEN … #define MUM_EVENT_SENSOR_ID_OFST … #define MUM_EVENT_SENSOR_ID_LBN … #define MUM_EVENT_SENSOR_ID_WIDTH … /* Enum values, see field(s): */ /* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ #define MUM_EVENT_SENSOR_STATE_OFST … #define MUM_EVENT_SENSOR_STATE_LBN … #define MUM_EVENT_SENSOR_STATE_WIDTH … #define MUM_EVENT_PORT_PHY_READY_OFST … #define MUM_EVENT_PORT_PHY_READY_LBN … #define MUM_EVENT_PORT_PHY_READY_WIDTH … #define MUM_EVENT_PORT_PHY_LINK_UP_OFST … #define MUM_EVENT_PORT_PHY_LINK_UP_LBN … #define MUM_EVENT_PORT_PHY_LINK_UP_WIDTH … #define MUM_EVENT_PORT_PHY_TX_LOL_OFST … #define MUM_EVENT_PORT_PHY_TX_LOL_LBN … #define MUM_EVENT_PORT_PHY_TX_LOL_WIDTH … #define MUM_EVENT_PORT_PHY_RX_LOL_OFST … #define MUM_EVENT_PORT_PHY_RX_LOL_LBN … #define MUM_EVENT_PORT_PHY_RX_LOL_WIDTH … #define MUM_EVENT_PORT_PHY_TX_LOS_OFST … #define MUM_EVENT_PORT_PHY_TX_LOS_LBN … #define MUM_EVENT_PORT_PHY_TX_LOS_WIDTH … #define MUM_EVENT_PORT_PHY_RX_LOS_OFST … #define MUM_EVENT_PORT_PHY_RX_LOS_LBN … #define MUM_EVENT_PORT_PHY_RX_LOS_WIDTH … #define MUM_EVENT_PORT_PHY_TX_FAULT_OFST … #define MUM_EVENT_PORT_PHY_TX_FAULT_LBN … #define MUM_EVENT_PORT_PHY_TX_FAULT_WIDTH … #define MUM_EVENT_DATA_LBN … #define MUM_EVENT_DATA_WIDTH … #define MUM_EVENT_SRC_LBN … #define MUM_EVENT_SRC_WIDTH … #define MUM_EVENT_EV_CODE_LBN … #define MUM_EVENT_EV_CODE_WIDTH … #define MUM_EVENT_CODE_LBN … #define MUM_EVENT_CODE_WIDTH … /* enum: The MUM was rebooted. */ #define MUM_EVENT_CODE_REBOOT … /* enum: Bad assert. */ #define MUM_EVENT_CODE_ASSERT … /* enum: Sensor failure. */ #define MUM_EVENT_CODE_SENSOR … /* enum: Link fault has been asserted, or has cleared. */ #define MUM_EVENT_CODE_QSFP_LASI_INTERRUPT … #define MUM_EVENT_SENSOR_DATA_OFST … #define MUM_EVENT_SENSOR_DATA_LEN … #define MUM_EVENT_SENSOR_DATA_LBN … #define MUM_EVENT_SENSOR_DATA_WIDTH … #define MUM_EVENT_PORT_PHY_FLAGS_OFST … #define MUM_EVENT_PORT_PHY_FLAGS_LEN … #define MUM_EVENT_PORT_PHY_FLAGS_LBN … #define MUM_EVENT_PORT_PHY_FLAGS_WIDTH … #define MUM_EVENT_PORT_PHY_COPPER_LEN_OFST … #define MUM_EVENT_PORT_PHY_COPPER_LEN_LEN … #define MUM_EVENT_PORT_PHY_COPPER_LEN_LBN … #define MUM_EVENT_PORT_PHY_COPPER_LEN_WIDTH … #define MUM_EVENT_PORT_PHY_CAPS_OFST … #define MUM_EVENT_PORT_PHY_CAPS_LEN … #define MUM_EVENT_PORT_PHY_CAPS_LBN … #define MUM_EVENT_PORT_PHY_CAPS_WIDTH … #define MUM_EVENT_PORT_PHY_TECH_OFST … #define MUM_EVENT_PORT_PHY_TECH_LEN … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_UNKNOWN … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_OPTICAL … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE_EQUALIZED … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LIMITING … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LINEAR … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_BASE_T … #define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_LOOPBACK_PASSIVE … #define MUM_EVENT_PORT_PHY_TECH_LBN … #define MUM_EVENT_PORT_PHY_TECH_WIDTH … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_LBN … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_FLAGS … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_COPPER_LEN … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_CAPS … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_TECH … #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_MAX … #define MUM_EVENT_PORT_PHY_SRC_PORT_NO_LBN … #define MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH … /***********************************/ /* MC_CMD_READ32 * Read multiple 32byte words from MC memory. Note - this command really * belongs to INSECURE category but is required by shmboot. The command handler * has additional checks to reject insecure calls. */ #define MC_CMD_READ32 … #undef MC_CMD_0x1_PRIVILEGE_CTG #define MC_CMD_0x1_PRIVILEGE_CTG … /* MC_CMD_READ32_IN msgrequest */ #define MC_CMD_READ32_IN_LEN … #define MC_CMD_READ32_IN_ADDR_OFST … #define MC_CMD_READ32_IN_ADDR_LEN … #define MC_CMD_READ32_IN_NUMWORDS_OFST … #define MC_CMD_READ32_IN_NUMWORDS_LEN … /* MC_CMD_READ32_OUT msgresponse */ #define MC_CMD_READ32_OUT_LENMIN … #define MC_CMD_READ32_OUT_LENMAX … #define MC_CMD_READ32_OUT_LENMAX_MCDI2 … #define MC_CMD_READ32_OUT_LEN(num) … #define MC_CMD_READ32_OUT_BUFFER_NUM(len) … #define MC_CMD_READ32_OUT_BUFFER_OFST … #define MC_CMD_READ32_OUT_BUFFER_LEN … #define MC_CMD_READ32_OUT_BUFFER_MINNUM … #define MC_CMD_READ32_OUT_BUFFER_MAXNUM … #define MC_CMD_READ32_OUT_BUFFER_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_WRITE32 * Write multiple 32byte words to MC memory. */ #define MC_CMD_WRITE32 … #undef MC_CMD_0x2_PRIVILEGE_CTG #define MC_CMD_0x2_PRIVILEGE_CTG … /* MC_CMD_WRITE32_IN msgrequest */ #define MC_CMD_WRITE32_IN_LENMIN … #define MC_CMD_WRITE32_IN_LENMAX … #define MC_CMD_WRITE32_IN_LENMAX_MCDI2 … #define MC_CMD_WRITE32_IN_LEN(num) … #define MC_CMD_WRITE32_IN_BUFFER_NUM(len) … #define MC_CMD_WRITE32_IN_ADDR_OFST … #define MC_CMD_WRITE32_IN_ADDR_LEN … #define MC_CMD_WRITE32_IN_BUFFER_OFST … #define MC_CMD_WRITE32_IN_BUFFER_LEN … #define MC_CMD_WRITE32_IN_BUFFER_MINNUM … #define MC_CMD_WRITE32_IN_BUFFER_MAXNUM … #define MC_CMD_WRITE32_IN_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_WRITE32_OUT msgresponse */ #define MC_CMD_WRITE32_OUT_LEN … /***********************************/ /* MC_CMD_COPYCODE * Copy MC code between two locations and jump. Note - this command really * belongs to INSECURE category but is required by shmboot. The command handler * has additional checks to reject insecure calls. */ #define MC_CMD_COPYCODE … #undef MC_CMD_0x3_PRIVILEGE_CTG #define MC_CMD_0x3_PRIVILEGE_CTG … /* MC_CMD_COPYCODE_IN msgrequest */ #define MC_CMD_COPYCODE_IN_LEN … /* Source address * * The main image should be entered via a copy of a single word from and to a * magic address, which controls various aspects of the boot. The magic address * is a bitfield, with each bit as documented below. */ #define MC_CMD_COPYCODE_IN_SRC_ADDR_OFST … #define MC_CMD_COPYCODE_IN_SRC_ADDR_LEN … /* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT (see below) */ #define MC_CMD_COPYCODE_HUNT_NO_MAGIC_ADDR … /* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT and * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED (see below) */ #define MC_CMD_COPYCODE_HUNT_NO_DATAPATH_MAGIC_ADDR … /* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT, * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED and BOOT_MAGIC_IGNORE_CONFIG (see * below) */ #define MC_CMD_COPYCODE_HUNT_IGNORE_CONFIG_MAGIC_ADDR … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_OFST … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_LBN … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_WIDTH … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_OFST … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_LBN … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_WIDTH … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_OFST … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_LBN … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_WIDTH … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_OFST … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_WIDTH … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_OFST … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_LBN … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_WIDTH … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_OFST … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_LBN … #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_WIDTH … /* Destination address */ #define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST … #define MC_CMD_COPYCODE_IN_DEST_ADDR_LEN … #define MC_CMD_COPYCODE_IN_NUMWORDS_OFST … #define MC_CMD_COPYCODE_IN_NUMWORDS_LEN … /* Address of where to jump after copy. */ #define MC_CMD_COPYCODE_IN_JUMP_OFST … #define MC_CMD_COPYCODE_IN_JUMP_LEN … /* enum: Control should return to the caller rather than jumping */ #define MC_CMD_COPYCODE_JUMP_NONE … /* MC_CMD_COPYCODE_OUT msgresponse */ #define MC_CMD_COPYCODE_OUT_LEN … /***********************************/ /* MC_CMD_SET_FUNC * Select function for function-specific commands. */ #define MC_CMD_SET_FUNC … #undef MC_CMD_0x4_PRIVILEGE_CTG #define MC_CMD_0x4_PRIVILEGE_CTG … /* MC_CMD_SET_FUNC_IN msgrequest */ #define MC_CMD_SET_FUNC_IN_LEN … /* Set function */ #define MC_CMD_SET_FUNC_IN_FUNC_OFST … #define MC_CMD_SET_FUNC_IN_FUNC_LEN … /* MC_CMD_SET_FUNC_OUT msgresponse */ #define MC_CMD_SET_FUNC_OUT_LEN … /***********************************/ /* MC_CMD_GET_BOOT_STATUS * Get the instruction address from which the MC booted. */ #define MC_CMD_GET_BOOT_STATUS … #undef MC_CMD_0x5_PRIVILEGE_CTG #define MC_CMD_0x5_PRIVILEGE_CTG … /* MC_CMD_GET_BOOT_STATUS_IN msgrequest */ #define MC_CMD_GET_BOOT_STATUS_IN_LEN … /* MC_CMD_GET_BOOT_STATUS_OUT msgresponse */ #define MC_CMD_GET_BOOT_STATUS_OUT_LEN … /* ?? */ #define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_OFST … #define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_LEN … /* enum: indicates that the MC wasn't flash booted */ #define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_NULL … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_OFST … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_LEN … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_OFST … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_LBN … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_WIDTH … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_OFST … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_LBN … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_WIDTH … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_BACKUP_OFST … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_BACKUP_LBN … #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_BACKUP_WIDTH … /***********************************/ /* MC_CMD_GET_ASSERTS * Get (and optionally clear) the current assertion status. Only * OUT.GLOBAL_FLAGS is guaranteed to exist in the completion payload. The other * fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS */ #define MC_CMD_GET_ASSERTS … #undef MC_CMD_0x6_PRIVILEGE_CTG #define MC_CMD_0x6_PRIVILEGE_CTG … /* MC_CMD_GET_ASSERTS_IN msgrequest */ #define MC_CMD_GET_ASSERTS_IN_LEN … /* Set to clear assertion */ #define MC_CMD_GET_ASSERTS_IN_CLEAR_OFST … #define MC_CMD_GET_ASSERTS_IN_CLEAR_LEN … /* MC_CMD_GET_ASSERTS_OUT msgresponse */ #define MC_CMD_GET_ASSERTS_OUT_LEN … /* Assertion status flag. */ #define MC_CMD_GET_ASSERTS_OUT_GLOBAL_FLAGS_OFST … #define MC_CMD_GET_ASSERTS_OUT_GLOBAL_FLAGS_LEN … /* enum: No assertions have failed. */ #define MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS … /* enum: A system-level assertion has failed. */ #define MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL … /* enum: A thread-level assertion has failed. */ #define MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL … /* enum: The system was reset by the watchdog. */ #define MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED … /* enum: An illegal address trap stopped the system (huntington and later) */ #define MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP … /* Failing PC value */ #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_LEN … /* Saved GP regs */ #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM … /* enum: A magic value hinting that the value in this register at the time of * the failure has likely been lost. */ #define MC_CMD_GET_ASSERTS_REG_NO_DATA … /* Failing thread address */ #define MC_CMD_GET_ASSERTS_OUT_THREAD_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_THREAD_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_RESERVED_OFST … #define MC_CMD_GET_ASSERTS_OUT_RESERVED_LEN … /* MC_CMD_GET_ASSERTS_OUT_V2 msgresponse: Extended response for MicroBlaze CPUs * found on Riverhead designs */ #define MC_CMD_GET_ASSERTS_OUT_V2_LEN … /* Assertion status flag. */ #define MC_CMD_GET_ASSERTS_OUT_V2_GLOBAL_FLAGS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V2_GLOBAL_FLAGS_LEN … /* enum: No assertions have failed. */ /* MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 0x1 */ /* enum: A system-level assertion has failed. */ /* MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 0x2 */ /* enum: A thread-level assertion has failed. */ /* MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 0x3 */ /* enum: The system was reset by the watchdog. */ /* MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 0x4 */ /* enum: An illegal address trap stopped the system (huntington and later) */ /* MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP 0x5 */ /* Failing PC value */ #define MC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_LEN … /* Saved GP regs */ #define MC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_NUM … /* enum: A magic value hinting that the value in this register at the time of * the failure has likely been lost. */ /* MC_CMD_GET_ASSERTS_REG_NO_DATA 0xda7a1057 */ /* Failing thread address */ #define MC_CMD_GET_ASSERTS_OUT_V2_THREAD_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V2_THREAD_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_V2_RESERVED_OFST … #define MC_CMD_GET_ASSERTS_OUT_V2_RESERVED_LEN … /* Saved Special Function Registers */ #define MC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_NUM … /* MC_CMD_GET_ASSERTS_OUT_V3 msgresponse: Extended response with asserted * firmware version information */ #define MC_CMD_GET_ASSERTS_OUT_V3_LEN … /* Assertion status flag. */ #define MC_CMD_GET_ASSERTS_OUT_V3_GLOBAL_FLAGS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_GLOBAL_FLAGS_LEN … /* enum: No assertions have failed. */ /* MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 0x1 */ /* enum: A system-level assertion has failed. */ /* MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 0x2 */ /* enum: A thread-level assertion has failed. */ /* MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 0x3 */ /* enum: The system was reset by the watchdog. */ /* MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 0x4 */ /* enum: An illegal address trap stopped the system (huntington and later) */ /* MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP 0x5 */ /* Failing PC value */ #define MC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_LEN … /* Saved GP regs */ #define MC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_NUM … /* enum: A magic value hinting that the value in this register at the time of * the failure has likely been lost. */ /* MC_CMD_GET_ASSERTS_REG_NO_DATA 0xda7a1057 */ /* Failing thread address */ #define MC_CMD_GET_ASSERTS_OUT_V3_THREAD_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_THREAD_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_V3_RESERVED_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_RESERVED_LEN … /* Saved Special Function Registers */ #define MC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_LEN … #define MC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_NUM … /* MC firmware unique build ID (as binary SHA-1 value) */ #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_ID_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_ID_LEN … /* MC firmware build date (as Unix timestamp) */ #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST … /* MC firmware version number */ #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST … /* MC firmware security level */ #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN … /* MC firmware extra version info (as null-terminated US-ASCII string) */ #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_EXTRA_INFO_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_EXTRA_INFO_LEN … /* MC firmware build name (as null-terminated US-ASCII string) */ #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_NAME_OFST … #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_NAME_LEN … /***********************************/ /* MC_CMD_LOG_CTRL * Configure the output stream for log events such as link state changes, * sensor notifications and MCDI completions */ #define MC_CMD_LOG_CTRL … #undef MC_CMD_0x7_PRIVILEGE_CTG #define MC_CMD_0x7_PRIVILEGE_CTG … /* MC_CMD_LOG_CTRL_IN msgrequest */ #define MC_CMD_LOG_CTRL_IN_LEN … /* Log destination */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST … #define MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN … /* enum: UART. */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART … /* enum: Event queue. */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ … /* Legacy argument. Must be zero. */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_OFST … #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_LEN … /* MC_CMD_LOG_CTRL_OUT msgresponse */ #define MC_CMD_LOG_CTRL_OUT_LEN … /***********************************/ /* MC_CMD_GET_VERSION * Get version information about adapter components. */ #define MC_CMD_GET_VERSION … #undef MC_CMD_0x8_PRIVILEGE_CTG #define MC_CMD_0x8_PRIVILEGE_CTG … /* MC_CMD_GET_VERSION_IN msgrequest */ #define MC_CMD_GET_VERSION_IN_LEN … /* MC_CMD_GET_VERSION_EXT_IN msgrequest: Asks for the extended version */ #define MC_CMD_GET_VERSION_EXT_IN_LEN … /* placeholder, set to 0 */ #define MC_CMD_GET_VERSION_EXT_IN_EXT_FLAGS_OFST … #define MC_CMD_GET_VERSION_EXT_IN_EXT_FLAGS_LEN … /* MC_CMD_GET_VERSION_V0_OUT msgresponse: deprecated version format */ #define MC_CMD_GET_VERSION_V0_OUT_LEN … #define MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST … #define MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN … /* enum: Reserved version number to indicate "any" version. */ #define MC_CMD_GET_VERSION_OUT_FIRMWARE_ANY … /* enum: Bootrom version value for Siena. */ #define MC_CMD_GET_VERSION_OUT_FIRMWARE_SIENA_BOOTROM … /* enum: Bootrom version value for Huntington. */ #define MC_CMD_GET_VERSION_OUT_FIRMWARE_HUNT_BOOTROM … /* enum: Bootrom version value for Medford2. */ #define MC_CMD_GET_VERSION_OUT_FIRMWARE_MEDFORD2_BOOTROM … /* MC_CMD_GET_VERSION_OUT msgresponse */ #define MC_CMD_GET_VERSION_OUT_LEN … /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ /* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */ #define MC_CMD_GET_VERSION_OUT_PCOL_OFST … #define MC_CMD_GET_VERSION_OUT_PCOL_LEN … /* 128bit mask of functions supported by the current firmware */ #define MC_CMD_GET_VERSION_OUT_SUPPORTED_FUNCS_OFST … #define MC_CMD_GET_VERSION_OUT_SUPPORTED_FUNCS_LEN … #define MC_CMD_GET_VERSION_OUT_VERSION_OFST … #define MC_CMD_GET_VERSION_OUT_VERSION_LEN … #define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST … #define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST … /* MC_CMD_GET_VERSION_EXT_OUT msgresponse */ #define MC_CMD_GET_VERSION_EXT_OUT_LEN … /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ /* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */ #define MC_CMD_GET_VERSION_EXT_OUT_PCOL_OFST … #define MC_CMD_GET_VERSION_EXT_OUT_PCOL_LEN … /* 128bit mask of functions supported by the current firmware */ #define MC_CMD_GET_VERSION_EXT_OUT_SUPPORTED_FUNCS_OFST … #define MC_CMD_GET_VERSION_EXT_OUT_SUPPORTED_FUNCS_LEN … #define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST … #define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN … #define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST … #define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST … /* extra info */ #define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST … #define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN … /* MC_CMD_GET_VERSION_V2_OUT msgresponse: Extended response providing version * information for all adapter components. For Riverhead based designs, base MC * firmware version fields refer to NMC firmware, while CMC firmware data is in * dedicated CMC fields. Flags indicate which data is present in the response * (depending on which components exist on a particular adapter) */ #define MC_CMD_GET_VERSION_V2_OUT_LEN … /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ /* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */ #define MC_CMD_GET_VERSION_V2_OUT_PCOL_OFST … #define MC_CMD_GET_VERSION_V2_OUT_PCOL_LEN … /* 128bit mask of functions supported by the current firmware */ #define MC_CMD_GET_VERSION_V2_OUT_SUPPORTED_FUNCS_OFST … #define MC_CMD_GET_VERSION_V2_OUT_SUPPORTED_FUNCS_LEN … #define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST … #define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN … #define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST … #define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST … /* extra info */ #define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST … #define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN … /* Flags indicating which extended fields are valid */ #define MC_CMD_GET_VERSION_V2_OUT_FLAGS_OFST … #define MC_CMD_GET_VERSION_V2_OUT_FLAGS_LEN … #define MC_CMD_GET_VERSION_V2_OUT_MCFW_EXT_INFO_PRESENT_OFST … #define MC_CMD_GET_VERSION_V2_OUT_MCFW_EXT_INFO_PRESENT_LBN … #define MC_CMD_GET_VERSION_V2_OUT_MCFW_EXT_INFO_PRESENT_WIDTH … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_OFST … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_LBN … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH … #define MC_CMD_GET_VERSION_V2_OUT_CMC_EXT_INFO_PRESENT_OFST … #define MC_CMD_GET_VERSION_V2_OUT_CMC_EXT_INFO_PRESENT_LBN … #define MC_CMD_GET_VERSION_V2_OUT_CMC_EXT_INFO_PRESENT_WIDTH … #define MC_CMD_GET_VERSION_V2_OUT_FPGA_EXT_INFO_PRESENT_OFST … #define MC_CMD_GET_VERSION_V2_OUT_FPGA_EXT_INFO_PRESENT_LBN … #define MC_CMD_GET_VERSION_V2_OUT_FPGA_EXT_INFO_PRESENT_WIDTH … #define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST … #define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN … #define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH … /* MC firmware unique build ID (as binary SHA-1 value) */ #define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST … #define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN … /* MC firmware security level */ #define MC_CMD_GET_VERSION_V2_OUT_MCFW_SECURITY_LEVEL_OFST … #define MC_CMD_GET_VERSION_V2_OUT_MCFW_SECURITY_LEVEL_LEN … /* MC firmware build name (as null-terminated US-ASCII string) */ #define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_NAME_OFST … #define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_NAME_LEN … /* The SUC firmware version as four numbers - a.b.c.d */ #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_OFST … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_LEN … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_NUM … /* SUC firmware build date (as 64-bit Unix timestamp) */ #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST … /* The ID of the SUC chip. This is specific to the platform but typically * indicates family, memory sizes etc. See SF-116728-SW for further details. */ #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_CHIP_ID_OFST … #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_CHIP_ID_LEN … /* The CMC firmware version as four numbers - a.b.c.d */ #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_OFST … #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_LEN … #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_NUM … /* CMC firmware build date (as 64-bit Unix timestamp) */ #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST … #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN … #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST … #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST … /* FPGA version as three numbers. On Riverhead based systems this field uses * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG): * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1 * => B, ...) FPGA_VERSION[2]: Sub-revision number */ #define MC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_OFST … #define MC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_LEN … #define MC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_NUM … /* Extra FPGA revision information (as null-terminated US-ASCII string) */ #define MC_CMD_GET_VERSION_V2_OUT_FPGA_EXTRA_OFST … #define MC_CMD_GET_VERSION_V2_OUT_FPGA_EXTRA_LEN … /* Board name / adapter model (as null-terminated US-ASCII string) */ #define MC_CMD_GET_VERSION_V2_OUT_BOARD_NAME_OFST … #define MC_CMD_GET_VERSION_V2_OUT_BOARD_NAME_LEN … /* Board revision number */ #define MC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_OFST … #define MC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_LEN … /* Board serial number (as null-terminated US-ASCII string) */ #define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST … #define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN … /***********************************/ /* MC_CMD_PTP * Perform PTP operation */ #define MC_CMD_PTP … #undef MC_CMD_0xb_PRIVILEGE_CTG #define MC_CMD_0xb_PRIVILEGE_CTG … /* MC_CMD_PTP_IN msgrequest */ #define MC_CMD_PTP_IN_LEN … /* PTP operation code */ #define MC_CMD_PTP_IN_OP_OFST … #define MC_CMD_PTP_IN_OP_LEN … /* enum: Enable PTP packet timestamping operation. */ #define MC_CMD_PTP_OP_ENABLE … /* enum: Disable PTP packet timestamping operation. */ #define MC_CMD_PTP_OP_DISABLE … /* enum: Send a PTP packet. This operation is used on Siena and Huntington. * From Medford onwards it is not supported: on those platforms PTP transmit * timestamping is done using the fast path. */ #define MC_CMD_PTP_OP_TRANSMIT … /* enum: Read the current NIC time. */ #define MC_CMD_PTP_OP_READ_NIC_TIME … /* enum: Get the current PTP status. Note that the clock frequency returned (in * Hz) is rounded to the nearest MHz (e.g. 666000000 for 666666666). */ #define MC_CMD_PTP_OP_STATUS … /* enum: Adjust the PTP NIC's time. */ #define MC_CMD_PTP_OP_ADJUST … /* enum: Synchronize host and NIC time. */ #define MC_CMD_PTP_OP_SYNCHRONIZE … /* enum: Basic manufacturing tests. Siena PTP adapters only. */ #define MC_CMD_PTP_OP_MANFTEST_BASIC … /* enum: Packet based manufacturing tests. Siena PTP adapters only. */ #define MC_CMD_PTP_OP_MANFTEST_PACKET … /* enum: Reset some of the PTP related statistics */ #define MC_CMD_PTP_OP_RESET_STATS … /* enum: Debug operations to MC. */ #define MC_CMD_PTP_OP_DEBUG … /* enum: Read an FPGA register. Siena PTP adapters only. */ #define MC_CMD_PTP_OP_FPGAREAD … /* enum: Write an FPGA register. Siena PTP adapters only. */ #define MC_CMD_PTP_OP_FPGAWRITE … /* enum: Apply an offset to the NIC clock */ #define MC_CMD_PTP_OP_CLOCK_OFFSET_ADJUST … /* enum: Change the frequency correction applied to the NIC clock */ #define MC_CMD_PTP_OP_CLOCK_FREQ_ADJUST … /* enum: Set the MC packet filter VLAN tags for received PTP packets. * Deprecated for Huntington onwards. */ #define MC_CMD_PTP_OP_RX_SET_VLAN_FILTER … /* enum: Set the MC packet filter UUID for received PTP packets. Deprecated for * Huntington onwards. */ #define MC_CMD_PTP_OP_RX_SET_UUID_FILTER … /* enum: Set the MC packet filter Domain for received PTP packets. Deprecated * for Huntington onwards. */ #define MC_CMD_PTP_OP_RX_SET_DOMAIN_FILTER … /* enum: Set the clock source. Required for snapper tests on Huntington and * Medford. Not implemented for Siena or Medford2. */ #define MC_CMD_PTP_OP_SET_CLK_SRC … /* enum: Reset value of Timer Reg. Not implemented. */ #define MC_CMD_PTP_OP_RST_CLK … /* enum: Enable the forwarding of PPS events to the host */ #define MC_CMD_PTP_OP_PPS_ENABLE … /* enum: Get the time format used by this NIC for PTP operations */ #define MC_CMD_PTP_OP_GET_TIME_FORMAT … /* enum: Get the clock attributes. NOTE- extended version of * MC_CMD_PTP_OP_GET_TIME_FORMAT */ #define MC_CMD_PTP_OP_GET_ATTRIBUTES … /* enum: Get corrections that should be applied to the various different * timestamps */ #define MC_CMD_PTP_OP_GET_TIMESTAMP_CORRECTIONS … /* enum: Subscribe to receive periodic time events indicating the current NIC * time */ #define MC_CMD_PTP_OP_TIME_EVENT_SUBSCRIBE … /* enum: Unsubscribe to stop receiving time events */ #define MC_CMD_PTP_OP_TIME_EVENT_UNSUBSCRIBE … /* enum: PPS based manfacturing tests. Requires PPS output to be looped to PPS * input on the same NIC. Siena PTP adapters only. */ #define MC_CMD_PTP_OP_MANFTEST_PPS … /* enum: Set the PTP sync status. Status is used by firmware to report to event * subscribers. */ #define MC_CMD_PTP_OP_SET_SYNC_STATUS … /* enum: Above this for future use. */ #define MC_CMD_PTP_OP_MAX … /* MC_CMD_PTP_IN_ENABLE msgrequest */ #define MC_CMD_PTP_IN_ENABLE_LEN … #define MC_CMD_PTP_IN_CMD_OFST … #define MC_CMD_PTP_IN_CMD_LEN … #define MC_CMD_PTP_IN_PERIPH_ID_OFST … #define MC_CMD_PTP_IN_PERIPH_ID_LEN … /* Not used. Events are always sent to function relative queue 0. */ #define MC_CMD_PTP_IN_ENABLE_QUEUE_OFST … #define MC_CMD_PTP_IN_ENABLE_QUEUE_LEN … /* PTP timestamping mode. Not used from Huntington onwards. */ #define MC_CMD_PTP_IN_ENABLE_MODE_OFST … #define MC_CMD_PTP_IN_ENABLE_MODE_LEN … /* enum: PTP, version 1 */ #define MC_CMD_PTP_MODE_V1 … /* enum: PTP, version 1, with VLAN headers - deprecated */ #define MC_CMD_PTP_MODE_V1_VLAN … /* enum: PTP, version 2 */ #define MC_CMD_PTP_MODE_V2 … /* enum: PTP, version 2, with VLAN headers - deprecated */ #define MC_CMD_PTP_MODE_V2_VLAN … /* enum: PTP, version 2, with improved UUID filtering */ #define MC_CMD_PTP_MODE_V2_ENHANCED … /* enum: FCoE (seconds and microseconds) */ #define MC_CMD_PTP_MODE_FCOE … /* MC_CMD_PTP_IN_DISABLE msgrequest */ #define MC_CMD_PTP_IN_DISABLE_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_TRANSMIT msgrequest */ #define MC_CMD_PTP_IN_TRANSMIT_LENMIN … #define MC_CMD_PTP_IN_TRANSMIT_LENMAX … #define MC_CMD_PTP_IN_TRANSMIT_LENMAX_MCDI2 … #define MC_CMD_PTP_IN_TRANSMIT_LEN(num) … #define MC_CMD_PTP_IN_TRANSMIT_PACKET_NUM(len) … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Transmit packet length */ #define MC_CMD_PTP_IN_TRANSMIT_LENGTH_OFST … #define MC_CMD_PTP_IN_TRANSMIT_LENGTH_LEN … /* Transmit packet data */ #define MC_CMD_PTP_IN_TRANSMIT_PACKET_OFST … #define MC_CMD_PTP_IN_TRANSMIT_PACKET_LEN … #define MC_CMD_PTP_IN_TRANSMIT_PACKET_MINNUM … #define MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM … #define MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM_MCDI2 … /* MC_CMD_PTP_IN_READ_NIC_TIME msgrequest */ #define MC_CMD_PTP_IN_READ_NIC_TIME_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_READ_NIC_TIME_V2 msgrequest */ #define MC_CMD_PTP_IN_READ_NIC_TIME_V2_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_STATUS msgrequest */ #define MC_CMD_PTP_IN_STATUS_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_ADJUST msgrequest */ #define MC_CMD_PTP_IN_ADJUST_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Frequency adjustment 40 bit fixed point ns */ #define MC_CMD_PTP_IN_ADJUST_FREQ_OFST … #define MC_CMD_PTP_IN_ADJUST_FREQ_LEN … #define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST … #define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST … /* enum: Number of fractional bits in frequency adjustment */ #define MC_CMD_PTP_IN_ADJUST_BITS … /* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ * is indicated in the MC_CMD_PTP_OUT_GET_ATTRIBUTES command CAPABILITIES * field. */ #define MC_CMD_PTP_IN_ADJUST_BITS_FP44 … /* Time adjustment in seconds */ #define MC_CMD_PTP_IN_ADJUST_SECONDS_OFST … #define MC_CMD_PTP_IN_ADJUST_SECONDS_LEN … /* Time adjustment major value */ #define MC_CMD_PTP_IN_ADJUST_MAJOR_OFST … #define MC_CMD_PTP_IN_ADJUST_MAJOR_LEN … /* Time adjustment in nanoseconds */ #define MC_CMD_PTP_IN_ADJUST_NANOSECONDS_OFST … #define MC_CMD_PTP_IN_ADJUST_NANOSECONDS_LEN … /* Time adjustment minor value */ #define MC_CMD_PTP_IN_ADJUST_MINOR_OFST … #define MC_CMD_PTP_IN_ADJUST_MINOR_LEN … /* MC_CMD_PTP_IN_ADJUST_V2 msgrequest */ #define MC_CMD_PTP_IN_ADJUST_V2_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Frequency adjustment 40 bit fixed point ns */ #define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN … #define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST … /* enum: Number of fractional bits in frequency adjustment */ /* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */ /* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ * is indicated in the MC_CMD_PTP_OUT_GET_ATTRIBUTES command CAPABILITIES * field. */ /* MC_CMD_PTP_IN_ADJUST_BITS_FP44 0x2c */ /* Time adjustment in seconds */ #define MC_CMD_PTP_IN_ADJUST_V2_SECONDS_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_SECONDS_LEN … /* Time adjustment major value */ #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_LEN … /* Time adjustment in nanoseconds */ #define MC_CMD_PTP_IN_ADJUST_V2_NANOSECONDS_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_NANOSECONDS_LEN … /* Time adjustment minor value */ #define MC_CMD_PTP_IN_ADJUST_V2_MINOR_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_MINOR_LEN … /* Upper 32bits of major time offset adjustment */ #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_HI_OFST … #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_HI_LEN … /* MC_CMD_PTP_IN_SYNCHRONIZE msgrequest */ #define MC_CMD_PTP_IN_SYNCHRONIZE_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Number of time readings to capture */ #define MC_CMD_PTP_IN_SYNCHRONIZE_NUMTIMESETS_OFST … #define MC_CMD_PTP_IN_SYNCHRONIZE_NUMTIMESETS_LEN … /* Host address in which to write "synchronization started" indication (64 * bits) */ #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST … #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN … #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST … #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST … /* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */ #define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_MANFTEST_PACKET msgrequest */ #define MC_CMD_PTP_IN_MANFTEST_PACKET_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Enable or disable packet testing */ #define MC_CMD_PTP_IN_MANFTEST_PACKET_TEST_ENABLE_OFST … #define MC_CMD_PTP_IN_MANFTEST_PACKET_TEST_ENABLE_LEN … /* MC_CMD_PTP_IN_RESET_STATS msgrequest: Reset PTP statistics */ #define MC_CMD_PTP_IN_RESET_STATS_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_DEBUG msgrequest */ #define MC_CMD_PTP_IN_DEBUG_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Debug operations */ #define MC_CMD_PTP_IN_DEBUG_DEBUG_PARAM_OFST … #define MC_CMD_PTP_IN_DEBUG_DEBUG_PARAM_LEN … /* MC_CMD_PTP_IN_FPGAREAD msgrequest */ #define MC_CMD_PTP_IN_FPGAREAD_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ #define MC_CMD_PTP_IN_FPGAREAD_ADDR_OFST … #define MC_CMD_PTP_IN_FPGAREAD_ADDR_LEN … #define MC_CMD_PTP_IN_FPGAREAD_NUMBYTES_OFST … #define MC_CMD_PTP_IN_FPGAREAD_NUMBYTES_LEN … /* MC_CMD_PTP_IN_FPGAWRITE msgrequest */ #define MC_CMD_PTP_IN_FPGAWRITE_LENMIN … #define MC_CMD_PTP_IN_FPGAWRITE_LENMAX … #define MC_CMD_PTP_IN_FPGAWRITE_LENMAX_MCDI2 … #define MC_CMD_PTP_IN_FPGAWRITE_LEN(num) … #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_NUM(len) … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ #define MC_CMD_PTP_IN_FPGAWRITE_ADDR_OFST … #define MC_CMD_PTP_IN_FPGAWRITE_ADDR_LEN … #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_OFST … #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_LEN … #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MINNUM … #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MAXNUM … #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST msgrequest */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Time adjustment in seconds */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_SECONDS_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_SECONDS_LEN … /* Time adjustment major value */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MAJOR_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MAJOR_LEN … /* Time adjustment in nanoseconds */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_NANOSECONDS_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_NANOSECONDS_LEN … /* Time adjustment minor value */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MINOR_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MINOR_LEN … /* MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2 msgrequest */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Time adjustment in seconds */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_SECONDS_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_SECONDS_LEN … /* Time adjustment major value */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_LEN … /* Time adjustment in nanoseconds */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_NANOSECONDS_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_NANOSECONDS_LEN … /* Time adjustment minor value */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MINOR_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MINOR_LEN … /* Upper 32bits of major time offset adjustment */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_HI_OFST … #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_HI_LEN … /* MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST msgrequest */ #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Frequency adjustment 40 bit fixed point ns */ #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST … #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN … #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST … #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST … /* Enum values, see field(s): */ /* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */ /* MC_CMD_PTP_IN_RX_SET_VLAN_FILTER msgrequest */ #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Number of VLAN tags, 0 if not VLAN */ #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_NUM_VLAN_TAGS_OFST … #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_NUM_VLAN_TAGS_LEN … /* Set of VLAN tags to filter against */ #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_OFST … #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_LEN … #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_NUM … /* MC_CMD_PTP_IN_RX_SET_UUID_FILTER msgrequest */ #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* 1 to enable UUID filtering, 0 to disable */ #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_ENABLE_OFST … #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_ENABLE_LEN … /* UUID to filter against */ #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST … #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN … #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST … #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST … /* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */ #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* 1 to enable Domain filtering, 0 to disable */ #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_ENABLE_OFST … #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_ENABLE_LEN … /* Domain number to filter against */ #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_DOMAIN_OFST … #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_DOMAIN_LEN … /* MC_CMD_PTP_IN_SET_CLK_SRC msgrequest */ #define MC_CMD_PTP_IN_SET_CLK_SRC_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Set the clock source. */ #define MC_CMD_PTP_IN_SET_CLK_SRC_CLK_OFST … #define MC_CMD_PTP_IN_SET_CLK_SRC_CLK_LEN … /* enum: Internal. */ #define MC_CMD_PTP_CLK_SRC_INTERNAL … /* enum: External. */ #define MC_CMD_PTP_CLK_SRC_EXTERNAL … /* MC_CMD_PTP_IN_RST_CLK msgrequest: Reset value of Timer Reg. */ #define MC_CMD_PTP_IN_RST_CLK_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_PPS_ENABLE msgrequest */ #define MC_CMD_PTP_IN_PPS_ENABLE_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* Enable or disable */ #define MC_CMD_PTP_IN_PPS_ENABLE_OP_OFST … #define MC_CMD_PTP_IN_PPS_ENABLE_OP_LEN … /* enum: Enable */ #define MC_CMD_PTP_ENABLE_PPS … /* enum: Disable */ #define MC_CMD_PTP_DISABLE_PPS … /* Not used. Events are always sent to function relative queue 0. */ #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_OFST … #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_LEN … /* MC_CMD_PTP_IN_GET_TIME_FORMAT msgrequest */ #define MC_CMD_PTP_IN_GET_TIME_FORMAT_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_GET_ATTRIBUTES msgrequest */ #define MC_CMD_PTP_IN_GET_ATTRIBUTES_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_GET_TIMESTAMP_CORRECTIONS msgrequest */ #define MC_CMD_PTP_IN_GET_TIMESTAMP_CORRECTIONS_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE msgrequest */ #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Original field containing queue ID. Now extended to include flags. */ #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_OFST … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_LEN … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_ID_OFST … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_ID_LBN … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_ID_WIDTH … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_REPORT_SYNC_STATUS_OFST … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_REPORT_SYNC_STATUS_LBN … #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_REPORT_SYNC_STATUS_WIDTH … /* MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE msgrequest */ #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* Unsubscribe options */ #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_CONTROL_OFST … #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_CONTROL_LEN … /* enum: Unsubscribe a single queue */ #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_SINGLE … /* enum: Unsubscribe all queues */ #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_ALL … /* Event queue ID */ #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_OFST … #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_LEN … /* MC_CMD_PTP_IN_MANFTEST_PPS msgrequest */ #define MC_CMD_PTP_IN_MANFTEST_PPS_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* 1 to enable PPS test mode, 0 to disable and return result. */ #define MC_CMD_PTP_IN_MANFTEST_PPS_TEST_ENABLE_OFST … #define MC_CMD_PTP_IN_MANFTEST_PPS_TEST_ENABLE_LEN … /* MC_CMD_PTP_IN_SET_SYNC_STATUS msgrequest */ #define MC_CMD_PTP_IN_SET_SYNC_STATUS_LEN … /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_CMD_LEN 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */ /* NIC - Host System Clock Synchronization status */ #define MC_CMD_PTP_IN_SET_SYNC_STATUS_STATUS_OFST … #define MC_CMD_PTP_IN_SET_SYNC_STATUS_STATUS_LEN … /* enum: Host System clock and NIC clock are not in sync */ #define MC_CMD_PTP_IN_SET_SYNC_STATUS_NOT_IN_SYNC … /* enum: Host System clock and NIC clock are synchronized */ #define MC_CMD_PTP_IN_SET_SYNC_STATUS_IN_SYNC … /* If synchronized, number of seconds until clocks should be considered to be * no longer in sync. */ #define MC_CMD_PTP_IN_SET_SYNC_STATUS_TIMEOUT_OFST … #define MC_CMD_PTP_IN_SET_SYNC_STATUS_TIMEOUT_LEN … #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED0_OFST … #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED0_LEN … #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_OFST … #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_LEN … /* MC_CMD_PTP_OUT msgresponse */ #define MC_CMD_PTP_OUT_LEN … /* MC_CMD_PTP_OUT_TRANSMIT msgresponse */ #define MC_CMD_PTP_OUT_TRANSMIT_LEN … /* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_TRANSMIT_SECONDS_OFST … #define MC_CMD_PTP_OUT_TRANSMIT_SECONDS_LEN … /* Timestamp major value */ #define MC_CMD_PTP_OUT_TRANSMIT_MAJOR_OFST … #define MC_CMD_PTP_OUT_TRANSMIT_MAJOR_LEN … /* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_OFST … #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_LEN … /* Timestamp minor value */ #define MC_CMD_PTP_OUT_TRANSMIT_MINOR_OFST … #define MC_CMD_PTP_OUT_TRANSMIT_MINOR_LEN … /* MC_CMD_PTP_OUT_TIME_EVENT_SUBSCRIBE msgresponse */ #define MC_CMD_PTP_OUT_TIME_EVENT_SUBSCRIBE_LEN … /* MC_CMD_PTP_OUT_TIME_EVENT_UNSUBSCRIBE msgresponse */ #define MC_CMD_PTP_OUT_TIME_EVENT_UNSUBSCRIBE_LEN … /* MC_CMD_PTP_OUT_READ_NIC_TIME msgresponse */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_LEN … /* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_SECONDS_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_SECONDS_LEN … /* Timestamp major value */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_MAJOR_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_MAJOR_LEN … /* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_LEN … /* Timestamp minor value */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_LEN … /* MC_CMD_PTP_OUT_READ_NIC_TIME_V2 msgresponse */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_LEN … /* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_SECONDS_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_SECONDS_LEN … /* Timestamp major value */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_LEN … /* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_NANOSECONDS_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_NANOSECONDS_LEN … /* Timestamp minor value */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MINOR_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MINOR_LEN … /* Upper 32bits of major timestamp value */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_HI_OFST … #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_HI_LEN … /* MC_CMD_PTP_OUT_STATUS msgresponse */ #define MC_CMD_PTP_OUT_STATUS_LEN … /* Frequency of NIC's hardware clock */ #define MC_CMD_PTP_OUT_STATUS_CLOCK_FREQ_OFST … #define MC_CMD_PTP_OUT_STATUS_CLOCK_FREQ_LEN … /* Number of packets transmitted and timestamped */ #define MC_CMD_PTP_OUT_STATUS_STATS_TX_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_TX_LEN … /* Number of packets received and timestamped */ #define MC_CMD_PTP_OUT_STATUS_STATS_RX_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_RX_LEN … /* Number of packets timestamped by the FPGA */ #define MC_CMD_PTP_OUT_STATUS_STATS_TS_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_TS_LEN … /* Number of packets filter matched */ #define MC_CMD_PTP_OUT_STATUS_STATS_FM_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_FM_LEN … /* Number of packets not filter matched */ #define MC_CMD_PTP_OUT_STATUS_STATS_NFM_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_NFM_LEN … /* Number of PPS overflows (noise on input?) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFLOW_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFLOW_LEN … /* Number of PPS bad periods */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_BAD_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_BAD_LEN … /* Minimum period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MIN_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MIN_LEN … /* Maximum period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MAX_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MAX_LEN … /* Last period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_LAST_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_LAST_LEN … /* Mean period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MEAN_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MEAN_LEN … /* Minimum offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MIN_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MIN_LEN … /* Maximum offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MAX_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MAX_LEN … /* Last offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_LAST_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_LAST_LEN … /* Mean offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MEAN_OFST … #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MEAN_LEN … /* MC_CMD_PTP_OUT_SYNCHRONIZE msgresponse */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMIN … #define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX … #define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX_MCDI2 … #define MC_CMD_PTP_OUT_SYNCHRONIZE_LEN(num) … #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_NUM(len) … /* A set of host and NIC times */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_LEN … #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MINNUM … #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM … #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM_MCDI2 … /* Host time immediately before NIC's hardware clock read */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_LEN … /* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_LEN … /* Timestamp major value */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_LEN … /* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_NANOSECONDS_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_NANOSECONDS_LEN … /* Timestamp minor value */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_MINOR_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_MINOR_LEN … /* Host time immediately after NIC's hardware clock read */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTEND_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTEND_LEN … /* Number of nanoseconds waited after reading NIC's hardware clock */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_WAITNS_OFST … #define MC_CMD_PTP_OUT_SYNCHRONIZE_WAITNS_LEN … /* MC_CMD_PTP_OUT_MANFTEST_BASIC msgresponse */ #define MC_CMD_PTP_OUT_MANFTEST_BASIC_LEN … /* Results of testing */ #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_RESULT_OFST … #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_RESULT_LEN … /* enum: Successful test */ #define MC_CMD_PTP_MANF_SUCCESS … /* enum: FPGA load failed */ #define MC_CMD_PTP_MANF_FPGA_LOAD … /* enum: FPGA version invalid */ #define MC_CMD_PTP_MANF_FPGA_VERSION … /* enum: FPGA registers incorrect */ #define MC_CMD_PTP_MANF_FPGA_REGISTERS … /* enum: Oscillator possibly not working? */ #define MC_CMD_PTP_MANF_OSCILLATOR … /* enum: Timestamps not increasing */ #define MC_CMD_PTP_MANF_TIMESTAMPS … /* enum: Mismatched packet count */ #define MC_CMD_PTP_MANF_PACKET_COUNT … /* enum: Mismatched packet count (Siena filter and FPGA) */ #define MC_CMD_PTP_MANF_FILTER_COUNT … /* enum: Not enough packets to perform timestamp check */ #define MC_CMD_PTP_MANF_PACKET_ENOUGH … /* enum: Timestamp trigger GPIO not working */ #define MC_CMD_PTP_MANF_GPIO_TRIGGER … /* enum: Insufficient PPS events to perform checks */ #define MC_CMD_PTP_MANF_PPS_ENOUGH … /* enum: PPS time event period not sufficiently close to 1s. */ #define MC_CMD_PTP_MANF_PPS_PERIOD … /* enum: PPS time event nS reading not sufficiently close to zero. */ #define MC_CMD_PTP_MANF_PPS_NS … /* enum: PTP peripheral registers incorrect */ #define MC_CMD_PTP_MANF_REGISTERS … /* enum: Failed to read time from PTP peripheral */ #define MC_CMD_PTP_MANF_CLOCK_READ … /* Presence of external oscillator */ #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_OFST … #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_LEN … /* MC_CMD_PTP_OUT_MANFTEST_PACKET msgresponse */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_LEN … /* Results of testing */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_RESULT_OFST … #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_RESULT_LEN … /* Number of packets received by FPGA */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_OFST … #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_LEN … /* Number of packets received by Siena filters */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FILTERCOUNT_OFST … #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FILTERCOUNT_LEN … /* MC_CMD_PTP_OUT_FPGAREAD msgresponse */ #define MC_CMD_PTP_OUT_FPGAREAD_LENMIN … #define MC_CMD_PTP_OUT_FPGAREAD_LENMAX … #define MC_CMD_PTP_OUT_FPGAREAD_LENMAX_MCDI2 … #define MC_CMD_PTP_OUT_FPGAREAD_LEN(num) … #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_NUM(len) … #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_OFST … #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_LEN … #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MINNUM … #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MAXNUM … #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_PTP_OUT_GET_TIME_FORMAT msgresponse */ #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_LEN … /* Time format required/used by for this NIC. Applies to all PTP MCDI * operations that pass times between the host and firmware. If this operation * is not supported (older firmware) a format of seconds and nanoseconds should * be assumed. Note this enum is deprecated. Do not add to it- use the * TIME_FORMAT field in MC_CMD_PTP_OUT_GET_ATTRIBUTES instead. */ #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_FORMAT_OFST … #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_FORMAT_LEN … /* enum: Times are in seconds and nanoseconds */ #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_SECONDS_NANOSECONDS … /* enum: Major register has units of 16 second per tick, minor 8 ns per tick */ #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_16SECONDS_8NANOSECONDS … /* enum: Major register has units of seconds, minor 2^-27s per tick */ #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_SECONDS_27FRACTION … /* MC_CMD_PTP_OUT_GET_ATTRIBUTES msgresponse */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_LEN … /* Time format required/used by for this NIC. Applies to all PTP MCDI * operations that pass times between the host and firmware. If this operation * is not supported (older firmware) a format of seconds and nanoseconds should * be assumed. */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_TIME_FORMAT_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_TIME_FORMAT_LEN … /* enum: Times are in seconds and nanoseconds */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_NANOSECONDS … /* enum: Major register has units of 16 second per tick, minor 8 ns per tick */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_16SECONDS_8NANOSECONDS … /* enum: Major register has units of seconds, minor 2^-27s per tick */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_27FRACTION … /* enum: Major register units are seconds, minor units are quarter nanoseconds */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_QTR_NANOSECONDS … /* Minimum acceptable value for a corrected synchronization timeset. When * comparing host and NIC clock times, the MC returns a set of samples that * contain the host start and end time, the MC time when the host start was * detected and the time the MC waited between reading the time and detecting * the host end. The corrected sync window is the difference between the host * end and start times minus the time that the MC waited for host end. */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_LEN … /* Various PTP capabilities */ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_CAPABILITIES_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_CAPABILITIES_LEN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_REPORT_SYNC_STATUS_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_REPORT_SYNC_STATUS_LBN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_REPORT_SYNC_STATUS_WIDTH … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RX_TSTAMP_OOB_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RX_TSTAMP_OOB_LBN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RX_TSTAMP_OOB_WIDTH … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_64BIT_SECONDS_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_64BIT_SECONDS_LBN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_64BIT_SECONDS_WIDTH … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_FP44_FREQ_ADJ_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_FP44_FREQ_ADJ_LBN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_FP44_FREQ_ADJ_WIDTH … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED0_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED0_LEN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED1_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED1_LEN … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_OFST … #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_LEN … /* MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS msgresponse */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_LEN … /* Uncorrected error on PTP transmit timestamps in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_TRANSMIT_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_TRANSMIT_LEN … /* Uncorrected error on PTP receive timestamps in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_LEN … /* Uncorrected error on PPS output in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_OUT_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_OUT_LEN … /* Uncorrected error on PPS input in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_IN_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_IN_LEN … /* MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2 msgresponse */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_LEN … /* Uncorrected error on PTP transmit timestamps in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_TX_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_TX_LEN … /* Uncorrected error on PTP receive timestamps in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_RX_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_RX_LEN … /* Uncorrected error on PPS output in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_OUT_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_OUT_LEN … /* Uncorrected error on PPS input in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_IN_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_IN_LEN … /* Uncorrected error on non-PTP transmit timestamps in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_TX_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_TX_LEN … /* Uncorrected error on non-PTP receive timestamps in NIC clock format */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_RX_OFST … #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_RX_LEN … /* MC_CMD_PTP_OUT_MANFTEST_PPS msgresponse */ #define MC_CMD_PTP_OUT_MANFTEST_PPS_LEN … /* Results of testing */ #define MC_CMD_PTP_OUT_MANFTEST_PPS_TEST_RESULT_OFST … #define MC_CMD_PTP_OUT_MANFTEST_PPS_TEST_RESULT_LEN … /* Enum values, see field(s): */ /* MC_CMD_PTP_OUT_MANFTEST_BASIC/TEST_RESULT */ /* MC_CMD_PTP_OUT_SET_SYNC_STATUS msgresponse */ #define MC_CMD_PTP_OUT_SET_SYNC_STATUS_LEN … /***********************************/ /* MC_CMD_CSR_READ32 * Read 32bit words from the indirect memory map. */ #define MC_CMD_CSR_READ32 … #undef MC_CMD_0xc_PRIVILEGE_CTG #define MC_CMD_0xc_PRIVILEGE_CTG … /* MC_CMD_CSR_READ32_IN msgrequest */ #define MC_CMD_CSR_READ32_IN_LEN … /* Address */ #define MC_CMD_CSR_READ32_IN_ADDR_OFST … #define MC_CMD_CSR_READ32_IN_ADDR_LEN … #define MC_CMD_CSR_READ32_IN_STEP_OFST … #define MC_CMD_CSR_READ32_IN_STEP_LEN … #define MC_CMD_CSR_READ32_IN_NUMWORDS_OFST … #define MC_CMD_CSR_READ32_IN_NUMWORDS_LEN … /* MC_CMD_CSR_READ32_OUT msgresponse */ #define MC_CMD_CSR_READ32_OUT_LENMIN … #define MC_CMD_CSR_READ32_OUT_LENMAX … #define MC_CMD_CSR_READ32_OUT_LENMAX_MCDI2 … #define MC_CMD_CSR_READ32_OUT_LEN(num) … #define MC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) … /* The last dword is the status, not a value read */ #define MC_CMD_CSR_READ32_OUT_BUFFER_OFST … #define MC_CMD_CSR_READ32_OUT_BUFFER_LEN … #define MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM … #define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM … #define MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_CSR_WRITE32 * Write 32bit dwords to the indirect memory map. */ #define MC_CMD_CSR_WRITE32 … #undef MC_CMD_0xd_PRIVILEGE_CTG #define MC_CMD_0xd_PRIVILEGE_CTG … /* MC_CMD_CSR_WRITE32_IN msgrequest */ #define MC_CMD_CSR_WRITE32_IN_LENMIN … #define MC_CMD_CSR_WRITE32_IN_LENMAX … #define MC_CMD_CSR_WRITE32_IN_LENMAX_MCDI2 … #define MC_CMD_CSR_WRITE32_IN_LEN(num) … #define MC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) … /* Address */ #define MC_CMD_CSR_WRITE32_IN_ADDR_OFST … #define MC_CMD_CSR_WRITE32_IN_ADDR_LEN … #define MC_CMD_CSR_WRITE32_IN_STEP_OFST … #define MC_CMD_CSR_WRITE32_IN_STEP_LEN … #define MC_CMD_CSR_WRITE32_IN_BUFFER_OFST … #define MC_CMD_CSR_WRITE32_IN_BUFFER_LEN … #define MC_CMD_CSR_WRITE32_IN_BUFFER_MINNUM … #define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM … #define MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_CSR_WRITE32_OUT msgresponse */ #define MC_CMD_CSR_WRITE32_OUT_LEN … #define MC_CMD_CSR_WRITE32_OUT_STATUS_OFST … #define MC_CMD_CSR_WRITE32_OUT_STATUS_LEN … /***********************************/ /* MC_CMD_HP * These commands are used for HP related features. They are grouped under one * MCDI command to avoid creating too many MCDI commands. */ #define MC_CMD_HP … #undef MC_CMD_0x54_PRIVILEGE_CTG #define MC_CMD_0x54_PRIVILEGE_CTG … /* MC_CMD_HP_IN msgrequest */ #define MC_CMD_HP_IN_LEN … /* HP OCSD sub-command. When address is not NULL, request activation of OCSD at * the specified address with the specified interval.When address is NULL, * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current * state / 2: (debug) Show temperature reported by one of the supported * sensors. */ #define MC_CMD_HP_IN_SUBCMD_OFST … #define MC_CMD_HP_IN_SUBCMD_LEN … /* enum: OCSD (Option Card Sensor Data) sub-command. */ #define MC_CMD_HP_IN_OCSD_SUBCMD … /* enum: Last known valid HP sub-command. */ #define MC_CMD_HP_IN_LAST_SUBCMD … /* The address to the array of sensor fields. (Or NULL to use a sub-command.) */ #define MC_CMD_HP_IN_OCSD_ADDR_OFST … #define MC_CMD_HP_IN_OCSD_ADDR_LEN … #define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST … #define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST … /* The requested update interval, in seconds. (Or the sub-command if ADDR is * NULL.) */ #define MC_CMD_HP_IN_OCSD_INTERVAL_OFST … #define MC_CMD_HP_IN_OCSD_INTERVAL_LEN … /* MC_CMD_HP_OUT msgresponse */ #define MC_CMD_HP_OUT_LEN … #define MC_CMD_HP_OUT_OCSD_STATUS_OFST … #define MC_CMD_HP_OUT_OCSD_STATUS_LEN … /* enum: OCSD stopped for this card. */ #define MC_CMD_HP_OUT_OCSD_STOPPED … /* enum: OCSD was successfully started with the address provided. */ #define MC_CMD_HP_OUT_OCSD_STARTED … /* enum: OCSD was already started for this card. */ #define MC_CMD_HP_OUT_OCSD_ALREADY_STARTED … /***********************************/ /* MC_CMD_STACKINFO * Get stack information. */ #define MC_CMD_STACKINFO … #undef MC_CMD_0xf_PRIVILEGE_CTG #define MC_CMD_0xf_PRIVILEGE_CTG … /* MC_CMD_STACKINFO_IN msgrequest */ #define MC_CMD_STACKINFO_IN_LEN … /* MC_CMD_STACKINFO_OUT msgresponse */ #define MC_CMD_STACKINFO_OUT_LENMIN … #define MC_CMD_STACKINFO_OUT_LENMAX … #define MC_CMD_STACKINFO_OUT_LENMAX_MCDI2 … #define MC_CMD_STACKINFO_OUT_LEN(num) … #define MC_CMD_STACKINFO_OUT_THREAD_INFO_NUM(len) … /* (thread ptr, stack size, free space) for each thread in system */ #define MC_CMD_STACKINFO_OUT_THREAD_INFO_OFST … #define MC_CMD_STACKINFO_OUT_THREAD_INFO_LEN … #define MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM … #define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM … #define MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_MDIO_READ * MDIO register read. */ #define MC_CMD_MDIO_READ … #undef MC_CMD_0x10_PRIVILEGE_CTG #define MC_CMD_0x10_PRIVILEGE_CTG … /* MC_CMD_MDIO_READ_IN msgrequest */ #define MC_CMD_MDIO_READ_IN_LEN … /* Bus number; there are two MDIO buses: one for the internal PHY, and one for * external devices. */ #define MC_CMD_MDIO_READ_IN_BUS_OFST … #define MC_CMD_MDIO_READ_IN_BUS_LEN … /* enum: Internal. */ #define MC_CMD_MDIO_BUS_INTERNAL … /* enum: External. */ #define MC_CMD_MDIO_BUS_EXTERNAL … /* Port address */ #define MC_CMD_MDIO_READ_IN_PRTAD_OFST … #define MC_CMD_MDIO_READ_IN_PRTAD_LEN … /* Device Address or clause 22. */ #define MC_CMD_MDIO_READ_IN_DEVAD_OFST … #define MC_CMD_MDIO_READ_IN_DEVAD_LEN … /* enum: By default all the MCDI MDIO operations perform clause45 mode. If you * want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22. */ #define MC_CMD_MDIO_CLAUSE22 … /* Address */ #define MC_CMD_MDIO_READ_IN_ADDR_OFST … #define MC_CMD_MDIO_READ_IN_ADDR_LEN … /* MC_CMD_MDIO_READ_OUT msgresponse */ #define MC_CMD_MDIO_READ_OUT_LEN … /* Value */ #define MC_CMD_MDIO_READ_OUT_VALUE_OFST … #define MC_CMD_MDIO_READ_OUT_VALUE_LEN … /* Status the MDIO commands return the raw status bits from the MDIO block. A * "good" transaction should have the DONE bit set and all other bits clear. */ #define MC_CMD_MDIO_READ_OUT_STATUS_OFST … #define MC_CMD_MDIO_READ_OUT_STATUS_LEN … /* enum: Good. */ #define MC_CMD_MDIO_STATUS_GOOD … /***********************************/ /* MC_CMD_MDIO_WRITE * MDIO register write. */ #define MC_CMD_MDIO_WRITE … #undef MC_CMD_0x11_PRIVILEGE_CTG #define MC_CMD_0x11_PRIVILEGE_CTG … /* MC_CMD_MDIO_WRITE_IN msgrequest */ #define MC_CMD_MDIO_WRITE_IN_LEN … /* Bus number; there are two MDIO buses: one for the internal PHY, and one for * external devices. */ #define MC_CMD_MDIO_WRITE_IN_BUS_OFST … #define MC_CMD_MDIO_WRITE_IN_BUS_LEN … /* enum: Internal. */ /* MC_CMD_MDIO_BUS_INTERNAL 0x0 */ /* enum: External. */ /* MC_CMD_MDIO_BUS_EXTERNAL 0x1 */ /* Port address */ #define MC_CMD_MDIO_WRITE_IN_PRTAD_OFST … #define MC_CMD_MDIO_WRITE_IN_PRTAD_LEN … /* Device Address or clause 22. */ #define MC_CMD_MDIO_WRITE_IN_DEVAD_OFST … #define MC_CMD_MDIO_WRITE_IN_DEVAD_LEN … /* enum: By default all the MCDI MDIO operations perform clause45 mode. If you * want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22. */ /* MC_CMD_MDIO_CLAUSE22 0x20 */ /* Address */ #define MC_CMD_MDIO_WRITE_IN_ADDR_OFST … #define MC_CMD_MDIO_WRITE_IN_ADDR_LEN … /* Value */ #define MC_CMD_MDIO_WRITE_IN_VALUE_OFST … #define MC_CMD_MDIO_WRITE_IN_VALUE_LEN … /* MC_CMD_MDIO_WRITE_OUT msgresponse */ #define MC_CMD_MDIO_WRITE_OUT_LEN … /* Status; the MDIO commands return the raw status bits from the MDIO block. A * "good" transaction should have the DONE bit set and all other bits clear. */ #define MC_CMD_MDIO_WRITE_OUT_STATUS_OFST … #define MC_CMD_MDIO_WRITE_OUT_STATUS_LEN … /* enum: Good. */ /* MC_CMD_MDIO_STATUS_GOOD 0x8 */ /***********************************/ /* MC_CMD_DBI_WRITE * Write DBI register(s). */ #define MC_CMD_DBI_WRITE … #undef MC_CMD_0x12_PRIVILEGE_CTG #define MC_CMD_0x12_PRIVILEGE_CTG … /* MC_CMD_DBI_WRITE_IN msgrequest */ #define MC_CMD_DBI_WRITE_IN_LENMIN … #define MC_CMD_DBI_WRITE_IN_LENMAX … #define MC_CMD_DBI_WRITE_IN_LENMAX_MCDI2 … #define MC_CMD_DBI_WRITE_IN_LEN(num) … #define MC_CMD_DBI_WRITE_IN_DBIWROP_NUM(len) … /* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset * 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF. */ #define MC_CMD_DBI_WRITE_IN_DBIWROP_OFST … #define MC_CMD_DBI_WRITE_IN_DBIWROP_LEN … #define MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM … #define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM … #define MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM_MCDI2 … /* MC_CMD_DBI_WRITE_OUT msgresponse */ #define MC_CMD_DBI_WRITE_OUT_LEN … /* MC_CMD_DBIWROP_TYPEDEF structuredef */ #define MC_CMD_DBIWROP_TYPEDEF_LEN … #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST … #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LEN … #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LBN … #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_WIDTH … #define MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST … #define MC_CMD_DBIWROP_TYPEDEF_PARMS_LEN … #define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_OFST … #define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_LBN … #define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_WIDTH … #define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_OFST … #define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_LBN … #define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_WIDTH … #define MC_CMD_DBIWROP_TYPEDEF_CS2_OFST … #define MC_CMD_DBIWROP_TYPEDEF_CS2_LBN … #define MC_CMD_DBIWROP_TYPEDEF_CS2_WIDTH … #define MC_CMD_DBIWROP_TYPEDEF_PARMS_LBN … #define MC_CMD_DBIWROP_TYPEDEF_PARMS_WIDTH … #define MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST … #define MC_CMD_DBIWROP_TYPEDEF_VALUE_LEN … #define MC_CMD_DBIWROP_TYPEDEF_VALUE_LBN … #define MC_CMD_DBIWROP_TYPEDEF_VALUE_WIDTH … /***********************************/ /* MC_CMD_PORT_READ32 * Read a 32-bit register from the indirect port register map. The port to * access is implied by the Shared memory channel used. */ #define MC_CMD_PORT_READ32 … /* MC_CMD_PORT_READ32_IN msgrequest */ #define MC_CMD_PORT_READ32_IN_LEN … /* Address */ #define MC_CMD_PORT_READ32_IN_ADDR_OFST … #define MC_CMD_PORT_READ32_IN_ADDR_LEN … /* MC_CMD_PORT_READ32_OUT msgresponse */ #define MC_CMD_PORT_READ32_OUT_LEN … /* Value */ #define MC_CMD_PORT_READ32_OUT_VALUE_OFST … #define MC_CMD_PORT_READ32_OUT_VALUE_LEN … /* Status */ #define MC_CMD_PORT_READ32_OUT_STATUS_OFST … #define MC_CMD_PORT_READ32_OUT_STATUS_LEN … /***********************************/ /* MC_CMD_PORT_WRITE32 * Write a 32-bit register to the indirect port register map. The port to * access is implied by the Shared memory channel used. */ #define MC_CMD_PORT_WRITE32 … /* MC_CMD_PORT_WRITE32_IN msgrequest */ #define MC_CMD_PORT_WRITE32_IN_LEN … /* Address */ #define MC_CMD_PORT_WRITE32_IN_ADDR_OFST … #define MC_CMD_PORT_WRITE32_IN_ADDR_LEN … /* Value */ #define MC_CMD_PORT_WRITE32_IN_VALUE_OFST … #define MC_CMD_PORT_WRITE32_IN_VALUE_LEN … /* MC_CMD_PORT_WRITE32_OUT msgresponse */ #define MC_CMD_PORT_WRITE32_OUT_LEN … /* Status */ #define MC_CMD_PORT_WRITE32_OUT_STATUS_OFST … #define MC_CMD_PORT_WRITE32_OUT_STATUS_LEN … /***********************************/ /* MC_CMD_PORT_READ128 * Read a 128-bit register from the indirect port register map. The port to * access is implied by the Shared memory channel used. */ #define MC_CMD_PORT_READ128 … /* MC_CMD_PORT_READ128_IN msgrequest */ #define MC_CMD_PORT_READ128_IN_LEN … /* Address */ #define MC_CMD_PORT_READ128_IN_ADDR_OFST … #define MC_CMD_PORT_READ128_IN_ADDR_LEN … /* MC_CMD_PORT_READ128_OUT msgresponse */ #define MC_CMD_PORT_READ128_OUT_LEN … /* Value */ #define MC_CMD_PORT_READ128_OUT_VALUE_OFST … #define MC_CMD_PORT_READ128_OUT_VALUE_LEN … /* Status */ #define MC_CMD_PORT_READ128_OUT_STATUS_OFST … #define MC_CMD_PORT_READ128_OUT_STATUS_LEN … /***********************************/ /* MC_CMD_PORT_WRITE128 * Write a 128-bit register to the indirect port register map. The port to * access is implied by the Shared memory channel used. */ #define MC_CMD_PORT_WRITE128 … /* MC_CMD_PORT_WRITE128_IN msgrequest */ #define MC_CMD_PORT_WRITE128_IN_LEN … /* Address */ #define MC_CMD_PORT_WRITE128_IN_ADDR_OFST … #define MC_CMD_PORT_WRITE128_IN_ADDR_LEN … /* Value */ #define MC_CMD_PORT_WRITE128_IN_VALUE_OFST … #define MC_CMD_PORT_WRITE128_IN_VALUE_LEN … /* MC_CMD_PORT_WRITE128_OUT msgresponse */ #define MC_CMD_PORT_WRITE128_OUT_LEN … /* Status */ #define MC_CMD_PORT_WRITE128_OUT_STATUS_OFST … #define MC_CMD_PORT_WRITE128_OUT_STATUS_LEN … /* MC_CMD_CAPABILITIES structuredef */ #define MC_CMD_CAPABILITIES_LEN … /* Small buf table. */ #define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_LBN … #define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH … /* Turbo mode (for Maranello). */ #define MC_CMD_CAPABILITIES_TURBO_LBN … #define MC_CMD_CAPABILITIES_TURBO_WIDTH … /* Turbo mode active (for Maranello). */ #define MC_CMD_CAPABILITIES_TURBO_ACTIVE_LBN … #define MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH … /* PTP offload. */ #define MC_CMD_CAPABILITIES_PTP_LBN … #define MC_CMD_CAPABILITIES_PTP_WIDTH … /* AOE mode. */ #define MC_CMD_CAPABILITIES_AOE_LBN … #define MC_CMD_CAPABILITIES_AOE_WIDTH … /* AOE mode active. */ #define MC_CMD_CAPABILITIES_AOE_ACTIVE_LBN … #define MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH … /* AOE mode active. */ #define MC_CMD_CAPABILITIES_FC_ACTIVE_LBN … #define MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH … #define MC_CMD_CAPABILITIES_RESERVED_LBN … #define MC_CMD_CAPABILITIES_RESERVED_WIDTH … /***********************************/ /* MC_CMD_GET_BOARD_CFG * Returns the MC firmware configuration structure. */ #define MC_CMD_GET_BOARD_CFG … #undef MC_CMD_0x18_PRIVILEGE_CTG #define MC_CMD_0x18_PRIVILEGE_CTG … /* MC_CMD_GET_BOARD_CFG_IN msgrequest */ #define MC_CMD_GET_BOARD_CFG_IN_LEN … /* MC_CMD_GET_BOARD_CFG_OUT msgresponse */ #define MC_CMD_GET_BOARD_CFG_OUT_LENMIN … #define MC_CMD_GET_BOARD_CFG_OUT_LENMAX … #define MC_CMD_GET_BOARD_CFG_OUT_LENMAX_MCDI2 … #define MC_CMD_GET_BOARD_CFG_OUT_LEN(num) … #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_NUM(len) … #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_LEN … #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_LEN … /* Capabilities for Siena Port0 (see struct MC_CMD_CAPABILITIES). Unused on * EF10 and later (use MC_CMD_GET_CAPABILITIES). */ #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT0_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT0_LEN … /* Capabilities for Siena Port1 (see struct MC_CMD_CAPABILITIES). Unused on * EF10 and later (use MC_CMD_GET_CAPABILITIES). */ #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT1_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT1_LEN … /* Base MAC address for Siena Port0. Unused on EF10 and later (use * MC_CMD_GET_MAC_ADDRESSES). */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_LEN … /* Base MAC address for Siena Port1. Unused on EF10 and later (use * MC_CMD_GET_MAC_ADDRESSES). */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_LEN … /* Size of MAC address pool for Siena Port0. Unused on EF10 and later (use * MC_CMD_GET_MAC_ADDRESSES). */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT0_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT0_LEN … /* Size of MAC address pool for Siena Port1. Unused on EF10 and later (use * MC_CMD_GET_MAC_ADDRESSES). */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT1_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT1_LEN … /* Increment between addresses in MAC address pool for Siena Port0. Unused on * EF10 and later (use MC_CMD_GET_MAC_ADDRESSES). */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT0_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT0_LEN … /* Increment between addresses in MAC address pool for Siena Port1. Unused on * EF10 and later (use MC_CMD_GET_MAC_ADDRESSES). */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT1_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT1_LEN … /* Siena only. This field contains a 16-bit value for each of the types of * NVRAM area. The values are defined in the firmware/mc/platform/.c file for a * specific board type, but otherwise have no meaning to the MC; they are used * by the driver to manage selection of appropriate firmware updates. Unused on * EF10 and later (use MC_CMD_NVRAM_METADATA). */ #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST … #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN … #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM … #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM … #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_DBI_READX * Read DBI register(s) -- extended functionality */ #define MC_CMD_DBI_READX … #undef MC_CMD_0x19_PRIVILEGE_CTG #define MC_CMD_0x19_PRIVILEGE_CTG … /* MC_CMD_DBI_READX_IN msgrequest */ #define MC_CMD_DBI_READX_IN_LENMIN … #define MC_CMD_DBI_READX_IN_LENMAX … #define MC_CMD_DBI_READX_IN_LENMAX_MCDI2 … #define MC_CMD_DBI_READX_IN_LEN(num) … #define MC_CMD_DBI_READX_IN_DBIRDOP_NUM(len) … /* Each Read op consists of an address (offset 0), VF/CS2) */ #define MC_CMD_DBI_READX_IN_DBIRDOP_OFST … #define MC_CMD_DBI_READX_IN_DBIRDOP_LEN … #define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST … #define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST … #define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM … #define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM … #define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 … /* MC_CMD_DBI_READX_OUT msgresponse */ #define MC_CMD_DBI_READX_OUT_LENMIN … #define MC_CMD_DBI_READX_OUT_LENMAX … #define MC_CMD_DBI_READX_OUT_LENMAX_MCDI2 … #define MC_CMD_DBI_READX_OUT_LEN(num) … #define MC_CMD_DBI_READX_OUT_VALUE_NUM(len) … /* Value */ #define MC_CMD_DBI_READX_OUT_VALUE_OFST … #define MC_CMD_DBI_READX_OUT_VALUE_LEN … #define MC_CMD_DBI_READX_OUT_VALUE_MINNUM … #define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM … #define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM_MCDI2 … /* MC_CMD_DBIRDOP_TYPEDEF structuredef */ #define MC_CMD_DBIRDOP_TYPEDEF_LEN … #define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_OFST … #define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LEN … #define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LBN … #define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_WIDTH … #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST … #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LEN … #define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_OFST … #define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_LBN … #define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_WIDTH … #define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_OFST … #define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_LBN … #define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_WIDTH … #define MC_CMD_DBIRDOP_TYPEDEF_CS2_OFST … #define MC_CMD_DBIRDOP_TYPEDEF_CS2_LBN … #define MC_CMD_DBIRDOP_TYPEDEF_CS2_WIDTH … #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LBN … #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_WIDTH … /***********************************/ /* MC_CMD_SET_RAND_SEED * Set the 16byte seed for the MC pseudo-random generator. */ #define MC_CMD_SET_RAND_SEED … #undef MC_CMD_0x1a_PRIVILEGE_CTG #define MC_CMD_0x1a_PRIVILEGE_CTG … /* MC_CMD_SET_RAND_SEED_IN msgrequest */ #define MC_CMD_SET_RAND_SEED_IN_LEN … /* Seed value. */ #define MC_CMD_SET_RAND_SEED_IN_SEED_OFST … #define MC_CMD_SET_RAND_SEED_IN_SEED_LEN … /* MC_CMD_SET_RAND_SEED_OUT msgresponse */ #define MC_CMD_SET_RAND_SEED_OUT_LEN … /***********************************/ /* MC_CMD_LTSSM_HIST * Retrieve the history of the LTSSM, if the build supports it. */ #define MC_CMD_LTSSM_HIST … /* MC_CMD_LTSSM_HIST_IN msgrequest */ #define MC_CMD_LTSSM_HIST_IN_LEN … /* MC_CMD_LTSSM_HIST_OUT msgresponse */ #define MC_CMD_LTSSM_HIST_OUT_LENMIN … #define MC_CMD_LTSSM_HIST_OUT_LENMAX … #define MC_CMD_LTSSM_HIST_OUT_LENMAX_MCDI2 … #define MC_CMD_LTSSM_HIST_OUT_LEN(num) … #define MC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) … /* variable number of LTSSM values, as bytes. The history is read-to-clear. */ #define MC_CMD_LTSSM_HIST_OUT_DATA_OFST … #define MC_CMD_LTSSM_HIST_OUT_DATA_LEN … #define MC_CMD_LTSSM_HIST_OUT_DATA_MINNUM … #define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM … #define MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_DRV_ATTACH * Inform MCPU that this port is managed on the host (i.e. driver active). For * Huntington, also request the preferred datapath firmware to use if possible * (it may not be possible for this request to be fulfilled; the driver must * issue a subsequent MC_CMD_GET_CAPABILITIES command to determine which * features are actually available). The FIRMWARE_ID field is ignored by older * platforms. */ #define MC_CMD_DRV_ATTACH … #undef MC_CMD_0x1c_PRIVILEGE_CTG #define MC_CMD_0x1c_PRIVILEGE_CTG … /* MC_CMD_DRV_ATTACH_IN msgrequest */ #define MC_CMD_DRV_ATTACH_IN_LEN … /* new state to set if UPDATE=1 */ #define MC_CMD_DRV_ATTACH_IN_NEW_STATE_OFST … #define MC_CMD_DRV_ATTACH_IN_NEW_STATE_LEN … #define MC_CMD_DRV_ATTACH_OFST … #define MC_CMD_DRV_ATTACH_LBN … #define MC_CMD_DRV_ATTACH_WIDTH … #define MC_CMD_DRV_ATTACH_IN_ATTACH_OFST … #define MC_CMD_DRV_ATTACH_IN_ATTACH_LBN … #define MC_CMD_DRV_ATTACH_IN_ATTACH_WIDTH … #define MC_CMD_DRV_PREBOOT_OFST … #define MC_CMD_DRV_PREBOOT_LBN … #define MC_CMD_DRV_PREBOOT_WIDTH … #define MC_CMD_DRV_ATTACH_IN_PREBOOT_OFST … #define MC_CMD_DRV_ATTACH_IN_PREBOOT_LBN … #define MC_CMD_DRV_ATTACH_IN_PREBOOT_WIDTH … #define MC_CMD_DRV_ATTACH_IN_SUBVARIANT_AWARE_OFST … #define MC_CMD_DRV_ATTACH_IN_SUBVARIANT_AWARE_LBN … #define MC_CMD_DRV_ATTACH_IN_SUBVARIANT_AWARE_WIDTH … #define MC_CMD_DRV_ATTACH_IN_WANT_VI_SPREADING_OFST … #define MC_CMD_DRV_ATTACH_IN_WANT_VI_SPREADING_LBN … #define MC_CMD_DRV_ATTACH_IN_WANT_VI_SPREADING_WIDTH … #define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_OFST … #define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_LBN … #define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_WIDTH … #define MC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_OFST … #define MC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_LBN … #define MC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_WIDTH … #define MC_CMD_DRV_ATTACH_IN_WANT_TX_ONLY_SPREADING_OFST … #define MC_CMD_DRV_ATTACH_IN_WANT_TX_ONLY_SPREADING_LBN … #define MC_CMD_DRV_ATTACH_IN_WANT_TX_ONLY_SPREADING_WIDTH … /* 1 to set new state, or 0 to just report the existing state */ #define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST … #define MC_CMD_DRV_ATTACH_IN_UPDATE_LEN … /* preferred datapath firmware (for Huntington; ignored for Siena) */ #define MC_CMD_DRV_ATTACH_IN_FIRMWARE_ID_OFST … #define MC_CMD_DRV_ATTACH_IN_FIRMWARE_ID_LEN … /* enum: Prefer to use full featured firmware */ #define MC_CMD_FW_FULL_FEATURED … /* enum: Prefer to use firmware with fewer features but lower latency */ #define MC_CMD_FW_LOW_LATENCY … /* enum: Prefer to use firmware for SolarCapture packed stream mode */ #define MC_CMD_FW_PACKED_STREAM … /* enum: Prefer to use firmware with fewer features and simpler TX event * batching but higher TX packet rate */ #define MC_CMD_FW_HIGH_TX_RATE … /* enum: Reserved value */ #define MC_CMD_FW_PACKED_STREAM_HASH_MODE_1 … /* enum: Prefer to use firmware with additional "rules engine" filtering * support */ #define MC_CMD_FW_RULES_ENGINE … /* enum: Prefer to use firmware with additional DPDK support */ #define MC_CMD_FW_DPDK … /* enum: Prefer to use "l3xudp" custom datapath firmware (see SF-119495-PD and * bug69716) */ #define MC_CMD_FW_L3XUDP … /* enum: Requests that the MC keep whatever datapath firmware is currently * running. It's used for test purposes, where we want to be able to shmboot * special test firmware variants. This option is only recognised in eftest * (i.e. non-production) builds. */ #define MC_CMD_FW_KEEP_CURRENT_EFTEST_ONLY … /* enum: Only this option is allowed for non-admin functions */ #define MC_CMD_FW_DONT_CARE … /* MC_CMD_DRV_ATTACH_IN_V2 msgrequest: Updated DRV_ATTACH to include driver * version */ #define MC_CMD_DRV_ATTACH_IN_V2_LEN … /* new state to set if UPDATE=1 */ #define MC_CMD_DRV_ATTACH_IN_V2_NEW_STATE_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_NEW_STATE_LEN … /* MC_CMD_DRV_ATTACH_OFST 0 */ /* MC_CMD_DRV_ATTACH_LBN 0 */ /* MC_CMD_DRV_ATTACH_WIDTH 1 */ #define MC_CMD_DRV_ATTACH_IN_V2_ATTACH_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_ATTACH_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_ATTACH_WIDTH … /* MC_CMD_DRV_PREBOOT_OFST 0 */ /* MC_CMD_DRV_PREBOOT_LBN 1 */ /* MC_CMD_DRV_PREBOOT_WIDTH 1 */ #define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_WIDTH … #define MC_CMD_DRV_ATTACH_IN_V2_SUBVARIANT_AWARE_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_SUBVARIANT_AWARE_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_SUBVARIANT_AWARE_WIDTH … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_VI_SPREADING_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_VI_SPREADING_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_VI_SPREADING_WIDTH … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_WIDTH … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_WIDTH … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_TX_ONLY_SPREADING_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_TX_ONLY_SPREADING_LBN … #define MC_CMD_DRV_ATTACH_IN_V2_WANT_TX_ONLY_SPREADING_WIDTH … /* 1 to set new state, or 0 to just report the existing state */ #define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_LEN … /* preferred datapath firmware (for Huntington; ignored for Siena) */ #define MC_CMD_DRV_ATTACH_IN_V2_FIRMWARE_ID_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_FIRMWARE_ID_LEN … /* enum: Prefer to use full featured firmware */ /* MC_CMD_FW_FULL_FEATURED 0x0 */ /* enum: Prefer to use firmware with fewer features but lower latency */ /* MC_CMD_FW_LOW_LATENCY 0x1 */ /* enum: Prefer to use firmware for SolarCapture packed stream mode */ /* MC_CMD_FW_PACKED_STREAM 0x2 */ /* enum: Prefer to use firmware with fewer features and simpler TX event * batching but higher TX packet rate */ /* MC_CMD_FW_HIGH_TX_RATE 0x3 */ /* enum: Reserved value */ /* MC_CMD_FW_PACKED_STREAM_HASH_MODE_1 0x4 */ /* enum: Prefer to use firmware with additional "rules engine" filtering * support */ /* MC_CMD_FW_RULES_ENGINE 0x5 */ /* enum: Prefer to use firmware with additional DPDK support */ /* MC_CMD_FW_DPDK 0x6 */ /* enum: Prefer to use "l3xudp" custom datapath firmware (see SF-119495-PD and * bug69716) */ /* MC_CMD_FW_L3XUDP 0x7 */ /* enum: Requests that the MC keep whatever datapath firmware is currently * running. It's used for test purposes, where we want to be able to shmboot * special test firmware variants. This option is only recognised in eftest * (i.e. non-production) builds. */ /* MC_CMD_FW_KEEP_CURRENT_EFTEST_ONLY 0xfffffffe */ /* enum: Only this option is allowed for non-admin functions */ /* MC_CMD_FW_DONT_CARE 0xffffffff */ /* Version of the driver to be reported by management protocols (e.g. NC-SI) * handled by the NIC. This is a zero-terminated ASCII string. */ #define MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_OFST … #define MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_LEN … /* MC_CMD_DRV_ATTACH_OUT msgresponse */ #define MC_CMD_DRV_ATTACH_OUT_LEN … /* previous or existing state, see the bitmask at NEW_STATE */ #define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_OFST … #define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_LEN … /* MC_CMD_DRV_ATTACH_EXT_OUT msgresponse */ #define MC_CMD_DRV_ATTACH_EXT_OUT_LEN … /* previous or existing state, see the bitmask at NEW_STATE */ #define MC_CMD_DRV_ATTACH_EXT_OUT_OLD_STATE_OFST … #define MC_CMD_DRV_ATTACH_EXT_OUT_OLD_STATE_LEN … /* Flags associated with this function */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST … #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN … /* enum: Labels the lowest-numbered function visible to the OS */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY … /* enum: The function can control the link state of the physical port it is * bound to. */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL … /* enum: The function can perform privileged operations */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED … /* enum: The function does not have an active port associated with it. The port * refers to the Sorrento external FPGA port. */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_NO_ACTIVE_PORT … /* enum: If set, indicates that VI spreading is currently enabled. Will always * indicate the current state, regardless of the value in the WANT_VI_SPREADING * input. */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_VI_SPREADING_ENABLED … /* enum: Used during development only. Should no longer be used. */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_RX_VI_SPREADING_INHIBITED … /* enum: If set, indicates that TX only spreading is enabled. Even-numbered * TXQs will use one engine, and odd-numbered TXQs will use the other. This * also has the effect that only even-numbered RXQs will receive traffic. */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TX_ONLY_VI_SPREADING_ENABLED … /***********************************/ /* MC_CMD_SHMUART * Route UART output to circular buffer in shared memory instead. */ #define MC_CMD_SHMUART … /* MC_CMD_SHMUART_IN msgrequest */ #define MC_CMD_SHMUART_IN_LEN … /* ??? */ #define MC_CMD_SHMUART_IN_FLAG_OFST … #define MC_CMD_SHMUART_IN_FLAG_LEN … /* MC_CMD_SHMUART_OUT msgresponse */ #define MC_CMD_SHMUART_OUT_LEN … /***********************************/ /* MC_CMD_PORT_RESET * Generic per-port reset. There is no equivalent for per-board reset. Locks * required: None; Return code: 0, ETIME. NOTE: This command is deprecated - * use MC_CMD_ENTITY_RESET instead. */ #define MC_CMD_PORT_RESET … #undef MC_CMD_0x20_PRIVILEGE_CTG #define MC_CMD_0x20_PRIVILEGE_CTG … /* MC_CMD_PORT_RESET_IN msgrequest */ #define MC_CMD_PORT_RESET_IN_LEN … /* MC_CMD_PORT_RESET_OUT msgresponse */ #define MC_CMD_PORT_RESET_OUT_LEN … /***********************************/ /* MC_CMD_ENTITY_RESET * Generic per-resource reset. There is no equivalent for per-board reset. * Locks required: None; Return code: 0, ETIME. NOTE: This command is an * extended version of the deprecated MC_CMD_PORT_RESET with added fields. */ #define MC_CMD_ENTITY_RESET … /* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */ /* MC_CMD_ENTITY_RESET_IN msgrequest */ #define MC_CMD_ENTITY_RESET_IN_LEN … /* Optional flags field. Omitting this will perform a "legacy" reset action * (TBD). */ #define MC_CMD_ENTITY_RESET_IN_FLAG_OFST … #define MC_CMD_ENTITY_RESET_IN_FLAG_LEN … #define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_OFST … #define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_LBN … #define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_WIDTH … /* MC_CMD_ENTITY_RESET_OUT msgresponse */ #define MC_CMD_ENTITY_RESET_OUT_LEN … /***********************************/ /* MC_CMD_PCIE_CREDITS * Read instantaneous and minimum flow control thresholds. */ #define MC_CMD_PCIE_CREDITS … /* MC_CMD_PCIE_CREDITS_IN msgrequest */ #define MC_CMD_PCIE_CREDITS_IN_LEN … /* poll period. 0 is disabled */ #define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_OFST … #define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_LEN … /* wipe statistics */ #define MC_CMD_PCIE_CREDITS_IN_WIPE_OFST … #define MC_CMD_PCIE_CREDITS_IN_WIPE_LEN … /* MC_CMD_PCIE_CREDITS_OUT msgresponse */ #define MC_CMD_PCIE_CREDITS_OUT_LEN … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_OFST … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_LEN … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_OFST … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_LEN … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_OFST … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_LEN … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_OFST … #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_LEN … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_OFST … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_LEN … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_OFST … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_LEN … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_OFST … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_LEN … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_OFST … #define MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_LEN … /***********************************/ /* MC_CMD_RXD_MONITOR * Get histogram of RX queue fill level. */ #define MC_CMD_RXD_MONITOR … /* MC_CMD_RXD_MONITOR_IN msgrequest */ #define MC_CMD_RXD_MONITOR_IN_LEN … #define MC_CMD_RXD_MONITOR_IN_QID_OFST … #define MC_CMD_RXD_MONITOR_IN_QID_LEN … #define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_OFST … #define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_LEN … #define MC_CMD_RXD_MONITOR_IN_WIPE_OFST … #define MC_CMD_RXD_MONITOR_IN_WIPE_LEN … /* MC_CMD_RXD_MONITOR_OUT msgresponse */ #define MC_CMD_RXD_MONITOR_OUT_LEN … #define MC_CMD_RXD_MONITOR_OUT_QID_OFST … #define MC_CMD_RXD_MONITOR_OUT_QID_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_FILL_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_FILL_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_LEN … #define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_OFST … #define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_LEN … #define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_OFST … #define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_LEN … /***********************************/ /* MC_CMD_PUTS * Copy the given ASCII string out onto UART and/or out of the network port. */ #define MC_CMD_PUTS … #undef MC_CMD_0x23_PRIVILEGE_CTG #define MC_CMD_0x23_PRIVILEGE_CTG … /* MC_CMD_PUTS_IN msgrequest */ #define MC_CMD_PUTS_IN_LENMIN … #define MC_CMD_PUTS_IN_LENMAX … #define MC_CMD_PUTS_IN_LENMAX_MCDI2 … #define MC_CMD_PUTS_IN_LEN(num) … #define MC_CMD_PUTS_IN_STRING_NUM(len) … #define MC_CMD_PUTS_IN_DEST_OFST … #define MC_CMD_PUTS_IN_DEST_LEN … #define MC_CMD_PUTS_IN_UART_OFST … #define MC_CMD_PUTS_IN_UART_LBN … #define MC_CMD_PUTS_IN_UART_WIDTH … #define MC_CMD_PUTS_IN_PORT_OFST … #define MC_CMD_PUTS_IN_PORT_LBN … #define MC_CMD_PUTS_IN_PORT_WIDTH … #define MC_CMD_PUTS_IN_DHOST_OFST … #define MC_CMD_PUTS_IN_DHOST_LEN … #define MC_CMD_PUTS_IN_STRING_OFST … #define MC_CMD_PUTS_IN_STRING_LEN … #define MC_CMD_PUTS_IN_STRING_MINNUM … #define MC_CMD_PUTS_IN_STRING_MAXNUM … #define MC_CMD_PUTS_IN_STRING_MAXNUM_MCDI2 … /* MC_CMD_PUTS_OUT msgresponse */ #define MC_CMD_PUTS_OUT_LEN … /***********************************/ /* MC_CMD_GET_PHY_CFG * Report PHY configuration. This guarantees to succeed even if the PHY is in a * 'zombie' state. Locks required: None */ #define MC_CMD_GET_PHY_CFG … #undef MC_CMD_0x24_PRIVILEGE_CTG #define MC_CMD_0x24_PRIVILEGE_CTG … /* MC_CMD_GET_PHY_CFG_IN msgrequest */ #define MC_CMD_GET_PHY_CFG_IN_LEN … /* MC_CMD_GET_PHY_CFG_OUT msgresponse */ #define MC_CMD_GET_PHY_CFG_OUT_LEN … /* flags */ #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_OFST … #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_LEN … #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_OFST … #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_LBN … #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_WIDTH … #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_OFST … #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN … #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_WIDTH … #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_OFST … #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN … #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_WIDTH … #define MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_OFST … #define MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN … #define MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_WIDTH … #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_OFST … #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN … #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_WIDTH … #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_OFST … #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN … #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_WIDTH … #define MC_CMD_GET_PHY_CFG_OUT_BIST_OFST … #define MC_CMD_GET_PHY_CFG_OUT_BIST_LBN … #define MC_CMD_GET_PHY_CFG_OUT_BIST_WIDTH … /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST … #define MC_CMD_GET_PHY_CFG_OUT_TYPE_LEN … /* Bitmask of supported capabilities */ #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_OFST … #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_LEN … #define MC_CMD_PHY_CAP_10HDX_OFST … #define MC_CMD_PHY_CAP_10HDX_LBN … #define MC_CMD_PHY_CAP_10HDX_WIDTH … #define MC_CMD_PHY_CAP_10FDX_OFST … #define MC_CMD_PHY_CAP_10FDX_LBN … #define MC_CMD_PHY_CAP_10FDX_WIDTH … #define MC_CMD_PHY_CAP_100HDX_OFST … #define MC_CMD_PHY_CAP_100HDX_LBN … #define MC_CMD_PHY_CAP_100HDX_WIDTH … #define MC_CMD_PHY_CAP_100FDX_OFST … #define MC_CMD_PHY_CAP_100FDX_LBN … #define MC_CMD_PHY_CAP_100FDX_WIDTH … #define MC_CMD_PHY_CAP_1000HDX_OFST … #define MC_CMD_PHY_CAP_1000HDX_LBN … #define MC_CMD_PHY_CAP_1000HDX_WIDTH … #define MC_CMD_PHY_CAP_1000FDX_OFST … #define MC_CMD_PHY_CAP_1000FDX_LBN … #define MC_CMD_PHY_CAP_1000FDX_WIDTH … #define MC_CMD_PHY_CAP_10000FDX_OFST … #define MC_CMD_PHY_CAP_10000FDX_LBN … #define MC_CMD_PHY_CAP_10000FDX_WIDTH … #define MC_CMD_PHY_CAP_PAUSE_OFST … #define MC_CMD_PHY_CAP_PAUSE_LBN … #define MC_CMD_PHY_CAP_PAUSE_WIDTH … #define MC_CMD_PHY_CAP_ASYM_OFST … #define MC_CMD_PHY_CAP_ASYM_LBN … #define MC_CMD_PHY_CAP_ASYM_WIDTH … #define MC_CMD_PHY_CAP_AN_OFST … #define MC_CMD_PHY_CAP_AN_LBN … #define MC_CMD_PHY_CAP_AN_WIDTH … #define MC_CMD_PHY_CAP_40000FDX_OFST … #define MC_CMD_PHY_CAP_40000FDX_LBN … #define MC_CMD_PHY_CAP_40000FDX_WIDTH … #define MC_CMD_PHY_CAP_DDM_OFST … #define MC_CMD_PHY_CAP_DDM_LBN … #define MC_CMD_PHY_CAP_DDM_WIDTH … #define MC_CMD_PHY_CAP_100000FDX_OFST … #define MC_CMD_PHY_CAP_100000FDX_LBN … #define MC_CMD_PHY_CAP_100000FDX_WIDTH … #define MC_CMD_PHY_CAP_25000FDX_OFST … #define MC_CMD_PHY_CAP_25000FDX_LBN … #define MC_CMD_PHY_CAP_25000FDX_WIDTH … #define MC_CMD_PHY_CAP_50000FDX_OFST … #define MC_CMD_PHY_CAP_50000FDX_LBN … #define MC_CMD_PHY_CAP_50000FDX_WIDTH … #define MC_CMD_PHY_CAP_BASER_FEC_OFST … #define MC_CMD_PHY_CAP_BASER_FEC_LBN … #define MC_CMD_PHY_CAP_BASER_FEC_WIDTH … #define MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_OFST … #define MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN … #define MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_WIDTH … #define MC_CMD_PHY_CAP_RS_FEC_OFST … #define MC_CMD_PHY_CAP_RS_FEC_LBN … #define MC_CMD_PHY_CAP_RS_FEC_WIDTH … #define MC_CMD_PHY_CAP_RS_FEC_REQUESTED_OFST … #define MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN … #define MC_CMD_PHY_CAP_RS_FEC_REQUESTED_WIDTH … #define MC_CMD_PHY_CAP_25G_BASER_FEC_OFST … #define MC_CMD_PHY_CAP_25G_BASER_FEC_LBN … #define MC_CMD_PHY_CAP_25G_BASER_FEC_WIDTH … #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_OFST … #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN … #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH … /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST … #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN … /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_PRT_OFST … #define MC_CMD_GET_PHY_CFG_OUT_PRT_LEN … /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_OFST … #define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_LEN … /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_NAME_OFST … #define MC_CMD_GET_PHY_CFG_OUT_NAME_LEN … /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_OFST … #define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_LEN … /* enum: Xaui. */ #define MC_CMD_MEDIA_XAUI … /* enum: CX4. */ #define MC_CMD_MEDIA_CX4 … /* enum: KX4. */ #define MC_CMD_MEDIA_KX4 … /* enum: XFP Far. */ #define MC_CMD_MEDIA_XFP … /* enum: SFP+. */ #define MC_CMD_MEDIA_SFP_PLUS … /* enum: 10GBaseT. */ #define MC_CMD_MEDIA_BASE_T … /* enum: QSFP+. */ #define MC_CMD_MEDIA_QSFP_PLUS … #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST … #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN … /* enum: Native clause 22 */ #define MC_CMD_MMD_CLAUSE22 … #define MC_CMD_MMD_CLAUSE45_PMAPMD … #define MC_CMD_MMD_CLAUSE45_WIS … #define MC_CMD_MMD_CLAUSE45_PCS … #define MC_CMD_MMD_CLAUSE45_PHYXS … #define MC_CMD_MMD_CLAUSE45_DTEXS … #define MC_CMD_MMD_CLAUSE45_TC … #define MC_CMD_MMD_CLAUSE45_AN … /* enum: Clause22 proxied over clause45 by PHY. */ #define MC_CMD_MMD_CLAUSE45_C22EXT … #define MC_CMD_MMD_CLAUSE45_VEND1 … #define MC_CMD_MMD_CLAUSE45_VEND2 … #define MC_CMD_GET_PHY_CFG_OUT_REVISION_OFST … #define MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN … /***********************************/ /* MC_CMD_START_BIST * Start a BIST test on the PHY. Locks required: PHY_LOCK if doing a PHY BIST * Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held) */ #define MC_CMD_START_BIST … #undef MC_CMD_0x25_PRIVILEGE_CTG #define MC_CMD_0x25_PRIVILEGE_CTG … /* MC_CMD_START_BIST_IN msgrequest */ #define MC_CMD_START_BIST_IN_LEN … /* Type of test. */ #define MC_CMD_START_BIST_IN_TYPE_OFST … #define MC_CMD_START_BIST_IN_TYPE_LEN … /* enum: Run the PHY's short cable BIST. */ #define MC_CMD_PHY_BIST_CABLE_SHORT … /* enum: Run the PHY's long cable BIST. */ #define MC_CMD_PHY_BIST_CABLE_LONG … /* enum: Run BIST on the currently selected BPX Serdes (XAUI or XFI) . */ #define MC_CMD_BPX_SERDES_BIST … /* enum: Run the MC loopback tests. */ #define MC_CMD_MC_LOOPBACK_BIST … /* enum: Run the PHY's standard BIST. */ #define MC_CMD_PHY_BIST … /* enum: Run MC RAM test. */ #define MC_CMD_MC_MEM_BIST … /* enum: Run Port RAM test. */ #define MC_CMD_PORT_MEM_BIST … /* enum: Run register test. */ #define MC_CMD_REG_BIST … /* MC_CMD_START_BIST_OUT msgresponse */ #define MC_CMD_START_BIST_OUT_LEN … /***********************************/ /* MC_CMD_POLL_BIST * Poll for BIST completion. Returns a single status code, and optionally some * PHY specific bist output. The driver should only consume the BIST output * after validating OUTLEN and MC_CMD_GET_PHY_CFG.TYPE. If a driver can't * successfully parse the BIST output, it should still respect the pass/Fail in * OUT.RESULT. Locks required: PHY_LOCK if doing a PHY BIST. Return code: 0, * EACCES (if PHY_LOCK is not held). */ #define MC_CMD_POLL_BIST … #undef MC_CMD_0x26_PRIVILEGE_CTG #define MC_CMD_0x26_PRIVILEGE_CTG … /* MC_CMD_POLL_BIST_IN msgrequest */ #define MC_CMD_POLL_BIST_IN_LEN … /* MC_CMD_POLL_BIST_OUT msgresponse */ #define MC_CMD_POLL_BIST_OUT_LEN … /* result */ #define MC_CMD_POLL_BIST_OUT_RESULT_OFST … #define MC_CMD_POLL_BIST_OUT_RESULT_LEN … /* enum: Running. */ #define MC_CMD_POLL_BIST_RUNNING … /* enum: Passed. */ #define MC_CMD_POLL_BIST_PASSED … /* enum: Failed. */ #define MC_CMD_POLL_BIST_FAILED … /* enum: Timed-out. */ #define MC_CMD_POLL_BIST_TIMEOUT … #define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST … #define MC_CMD_POLL_BIST_OUT_PRIVATE_LEN … /* MC_CMD_POLL_BIST_OUT_SFT9001 msgresponse */ #define MC_CMD_POLL_BIST_OUT_SFT9001_LEN … /* result */ /* MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 */ /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */ /* Enum values, see field(s): */ /* MC_CMD_POLL_BIST_OUT/MC_CMD_POLL_BIST_OUT_RESULT */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_LEN … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B_LEN … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C_LEN … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D_LEN … /* Status of each channel A */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_A_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_A_LEN … /* enum: Ok. */ #define MC_CMD_POLL_BIST_SFT9001_PAIR_OK … /* enum: Open. */ #define MC_CMD_POLL_BIST_SFT9001_PAIR_OPEN … /* enum: Intra-pair short. */ #define MC_CMD_POLL_BIST_SFT9001_INTRA_PAIR_SHORT … /* enum: Inter-pair short. */ #define MC_CMD_POLL_BIST_SFT9001_INTER_PAIR_SHORT … /* enum: Busy. */ #define MC_CMD_POLL_BIST_SFT9001_PAIR_BUSY … /* Status of each channel B */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_B_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_B_LEN … /* Enum values, see field(s): */ /* CABLE_STATUS_A */ /* Status of each channel C */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_C_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_C_LEN … /* Enum values, see field(s): */ /* CABLE_STATUS_A */ /* Status of each channel D */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_D_OFST … #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_D_LEN … /* Enum values, see field(s): */ /* CABLE_STATUS_A */ /* MC_CMD_POLL_BIST_OUT_MRSFP msgresponse */ #define MC_CMD_POLL_BIST_OUT_MRSFP_LEN … /* result */ /* MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 */ /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */ /* Enum values, see field(s): */ /* MC_CMD_POLL_BIST_OUT/MC_CMD_POLL_BIST_OUT_RESULT */ #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_OFST … #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_LEN … /* enum: Complete. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_COMPLETE … /* enum: Bus switch off I2C write. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_WRITE … /* enum: Bus switch off I2C no access IO exp. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_IO_EXP … /* enum: Bus switch off I2C no access module. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_MODULE … /* enum: IO exp I2C configure. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_IO_EXP_I2C_CONFIGURE … /* enum: Bus switch I2C no cross talk. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_I2C_NO_CROSSTALK … /* enum: Module presence. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_PRESENCE … /* enum: Module ID I2C access. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_I2C_ACCESS … /* enum: Module ID sane value. */ #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_SANE_VALUE … /* MC_CMD_POLL_BIST_OUT_MEM msgresponse */ #define MC_CMD_POLL_BIST_OUT_MEM_LEN … /* result */ /* MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 */ /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */ /* Enum values, see field(s): */ /* MC_CMD_POLL_BIST_OUT/MC_CMD_POLL_BIST_OUT_RESULT */ #define MC_CMD_POLL_BIST_OUT_MEM_TEST_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_TEST_LEN … /* enum: Test has completed. */ #define MC_CMD_POLL_BIST_MEM_COMPLETE … /* enum: RAM test - walk ones. */ #define MC_CMD_POLL_BIST_MEM_MEM_WALK_ONES … /* enum: RAM test - walk zeros. */ #define MC_CMD_POLL_BIST_MEM_MEM_WALK_ZEROS … /* enum: RAM test - walking inversions zeros/ones. */ #define MC_CMD_POLL_BIST_MEM_MEM_INV_ZERO_ONE … /* enum: RAM test - walking inversions checkerboard. */ #define MC_CMD_POLL_BIST_MEM_MEM_INV_CHKBOARD … /* enum: Register test - set / clear individual bits. */ #define MC_CMD_POLL_BIST_MEM_REG … /* enum: ECC error detected. */ #define MC_CMD_POLL_BIST_MEM_ECC … /* Failure address, only valid if result is POLL_BIST_FAILED */ #define MC_CMD_POLL_BIST_OUT_MEM_ADDR_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_ADDR_LEN … /* Bus or address space to which the failure address corresponds */ #define MC_CMD_POLL_BIST_OUT_MEM_BUS_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_BUS_LEN … /* enum: MC MIPS bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_MC … /* enum: CSR IREG bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_CSR … /* enum: RX0 DPCPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_RX … /* enum: TX0 DPCPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_TX0 … /* enum: TX1 DPCPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_TX1 … /* enum: RX0 DICPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DICPU_RX … /* enum: TX DICPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DICPU_TX … /* enum: RX1 DPCPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_RX1 … /* enum: RX1 DICPU bus. */ #define MC_CMD_POLL_BIST_MEM_BUS_DICPU_RX1 … /* Pattern written to RAM / register */ #define MC_CMD_POLL_BIST_OUT_MEM_EXPECT_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_EXPECT_LEN … /* Actual value read from RAM / register */ #define MC_CMD_POLL_BIST_OUT_MEM_ACTUAL_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_ACTUAL_LEN … /* ECC error mask */ #define MC_CMD_POLL_BIST_OUT_MEM_ECC_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_ECC_LEN … /* ECC parity error mask */ #define MC_CMD_POLL_BIST_OUT_MEM_ECC_PARITY_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_ECC_PARITY_LEN … /* ECC fatal error mask */ #define MC_CMD_POLL_BIST_OUT_MEM_ECC_FATAL_OFST … #define MC_CMD_POLL_BIST_OUT_MEM_ECC_FATAL_LEN … /***********************************/ /* MC_CMD_FLUSH_RX_QUEUES * Flush receive queue(s). If SRIOV is enabled (via MC_CMD_SRIOV), then RXQ * flushes should be initiated via this MCDI operation, rather than via * directly writing FLUSH_CMD. * * The flush is completed (either done/fail) asynchronously (after this command * returns). The driver must still wait for flush done/failure events as usual. */ #define MC_CMD_FLUSH_RX_QUEUES … /* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */ #define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN … #define MC_CMD_FLUSH_RX_QUEUES_IN_LENMAX … #define MC_CMD_FLUSH_RX_QUEUES_IN_LENMAX_MCDI2 … #define MC_CMD_FLUSH_RX_QUEUES_IN_LEN(num) … #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_NUM(len) … #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_OFST … #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_LEN … #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MINNUM … #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM … #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM_MCDI2 … /* MC_CMD_FLUSH_RX_QUEUES_OUT msgresponse */ #define MC_CMD_FLUSH_RX_QUEUES_OUT_LEN … /***********************************/ /* MC_CMD_GET_LOOPBACK_MODES * Returns a bitmask of loopback modes available at each speed. */ #define MC_CMD_GET_LOOPBACK_MODES … #undef MC_CMD_0x28_PRIVILEGE_CTG #define MC_CMD_0x28_PRIVILEGE_CTG … /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */ #define MC_CMD_GET_LOOPBACK_MODES_IN_LEN … /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN … /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST … /* enum: None. */ #define MC_CMD_LOOPBACK_NONE … /* enum: Data. */ #define MC_CMD_LOOPBACK_DATA … /* enum: GMAC. */ #define MC_CMD_LOOPBACK_GMAC … /* enum: XGMII. */ #define MC_CMD_LOOPBACK_XGMII … /* enum: XGXS. */ #define MC_CMD_LOOPBACK_XGXS … /* enum: XAUI. */ #define MC_CMD_LOOPBACK_XAUI … /* enum: GMII. */ #define MC_CMD_LOOPBACK_GMII … /* enum: SGMII. */ #define MC_CMD_LOOPBACK_SGMII … /* enum: XGBR. */ #define MC_CMD_LOOPBACK_XGBR … /* enum: XFI. */ #define MC_CMD_LOOPBACK_XFI … /* enum: XAUI Far. */ #define MC_CMD_LOOPBACK_XAUI_FAR … /* enum: GMII Far. */ #define MC_CMD_LOOPBACK_GMII_FAR … /* enum: SGMII Far. */ #define MC_CMD_LOOPBACK_SGMII_FAR … /* enum: XFI Far. */ #define MC_CMD_LOOPBACK_XFI_FAR … /* enum: GPhy. */ #define MC_CMD_LOOPBACK_GPHY … /* enum: PhyXS. */ #define MC_CMD_LOOPBACK_PHYXS … /* enum: PCS. */ #define MC_CMD_LOOPBACK_PCS … /* enum: PMA-PMD. */ #define MC_CMD_LOOPBACK_PMAPMD … /* enum: Cross-Port. */ #define MC_CMD_LOOPBACK_XPORT … /* enum: XGMII-Wireside. */ #define MC_CMD_LOOPBACK_XGMII_WS … /* enum: XAUI Wireside. */ #define MC_CMD_LOOPBACK_XAUI_WS … /* enum: XAUI Wireside Far. */ #define MC_CMD_LOOPBACK_XAUI_WS_FAR … /* enum: XAUI Wireside near. */ #define MC_CMD_LOOPBACK_XAUI_WS_NEAR … /* enum: GMII Wireside. */ #define MC_CMD_LOOPBACK_GMII_WS … /* enum: XFI Wireside. */ #define MC_CMD_LOOPBACK_XFI_WS … /* enum: XFI Wireside Far. */ #define MC_CMD_LOOPBACK_XFI_WS_FAR … /* enum: PhyXS Wireside. */ #define MC_CMD_LOOPBACK_PHYXS_WS … /* enum: PMA lanes MAC-Serdes. */ #define MC_CMD_LOOPBACK_PMA_INT … /* enum: KR Serdes Parallel (Encoder). */ #define MC_CMD_LOOPBACK_SD_NEAR … /* enum: KR Serdes Serial. */ #define MC_CMD_LOOPBACK_SD_FAR … /* enum: PMA lanes MAC-Serdes Wireside. */ #define MC_CMD_LOOPBACK_PMA_INT_WS … /* enum: KR Serdes Parallel Wireside (Full PCS). */ #define MC_CMD_LOOPBACK_SD_FEP2_WS … /* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */ #define MC_CMD_LOOPBACK_SD_FEP1_5_WS … /* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */ #define MC_CMD_LOOPBACK_SD_FEP_WS … /* enum: KR Serdes Serial Wireside. */ #define MC_CMD_LOOPBACK_SD_FES_WS … /* enum: Near side of AOE Siena side port */ #define MC_CMD_LOOPBACK_AOE_INT_NEAR … /* enum: Medford Wireside datapath loopback */ #define MC_CMD_LOOPBACK_DATA_WS … /* enum: Force link up without setting up any physical loopback (snapper use * only) */ #define MC_CMD_LOOPBACK_FORCE_EXT_LINK … /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* MC_CMD_GET_LOOPBACK_MODES_OUT_V2 msgresponse: Supported loopback modes for * newer NICs with 25G/50G/100G support */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_LEN … /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST … /* enum: None. */ /* MC_CMD_LOOPBACK_NONE 0x0 */ /* enum: Data. */ /* MC_CMD_LOOPBACK_DATA 0x1 */ /* enum: GMAC. */ /* MC_CMD_LOOPBACK_GMAC 0x2 */ /* enum: XGMII. */ /* MC_CMD_LOOPBACK_XGMII 0x3 */ /* enum: XGXS. */ /* MC_CMD_LOOPBACK_XGXS 0x4 */ /* enum: XAUI. */ /* MC_CMD_LOOPBACK_XAUI 0x5 */ /* enum: GMII. */ /* MC_CMD_LOOPBACK_GMII 0x6 */ /* enum: SGMII. */ /* MC_CMD_LOOPBACK_SGMII 0x7 */ /* enum: XGBR. */ /* MC_CMD_LOOPBACK_XGBR 0x8 */ /* enum: XFI. */ /* MC_CMD_LOOPBACK_XFI 0x9 */ /* enum: XAUI Far. */ /* MC_CMD_LOOPBACK_XAUI_FAR 0xa */ /* enum: GMII Far. */ /* MC_CMD_LOOPBACK_GMII_FAR 0xb */ /* enum: SGMII Far. */ /* MC_CMD_LOOPBACK_SGMII_FAR 0xc */ /* enum: XFI Far. */ /* MC_CMD_LOOPBACK_XFI_FAR 0xd */ /* enum: GPhy. */ /* MC_CMD_LOOPBACK_GPHY 0xe */ /* enum: PhyXS. */ /* MC_CMD_LOOPBACK_PHYXS 0xf */ /* enum: PCS. */ /* MC_CMD_LOOPBACK_PCS 0x10 */ /* enum: PMA-PMD. */ /* MC_CMD_LOOPBACK_PMAPMD 0x11 */ /* enum: Cross-Port. */ /* MC_CMD_LOOPBACK_XPORT 0x12 */ /* enum: XGMII-Wireside. */ /* MC_CMD_LOOPBACK_XGMII_WS 0x13 */ /* enum: XAUI Wireside. */ /* MC_CMD_LOOPBACK_XAUI_WS 0x14 */ /* enum: XAUI Wireside Far. */ /* MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 */ /* enum: XAUI Wireside near. */ /* MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 */ /* enum: GMII Wireside. */ /* MC_CMD_LOOPBACK_GMII_WS 0x17 */ /* enum: XFI Wireside. */ /* MC_CMD_LOOPBACK_XFI_WS 0x18 */ /* enum: XFI Wireside Far. */ /* MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 */ /* enum: PhyXS Wireside. */ /* MC_CMD_LOOPBACK_PHYXS_WS 0x1a */ /* enum: PMA lanes MAC-Serdes. */ /* MC_CMD_LOOPBACK_PMA_INT 0x1b */ /* enum: KR Serdes Parallel (Encoder). */ /* MC_CMD_LOOPBACK_SD_NEAR 0x1c */ /* enum: KR Serdes Serial. */ /* MC_CMD_LOOPBACK_SD_FAR 0x1d */ /* enum: PMA lanes MAC-Serdes Wireside. */ /* MC_CMD_LOOPBACK_PMA_INT_WS 0x1e */ /* enum: KR Serdes Parallel Wireside (Full PCS). */ /* MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f */ /* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */ /* MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 */ /* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */ /* MC_CMD_LOOPBACK_SD_FEP_WS 0x21 */ /* enum: KR Serdes Serial Wireside. */ /* MC_CMD_LOOPBACK_SD_FES_WS 0x22 */ /* enum: Near side of AOE Siena side port */ /* MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 */ /* enum: Medford Wireside datapath loopback */ /* MC_CMD_LOOPBACK_DATA_WS 0x24 */ /* enum: Force link up without setting up any physical loopback (snapper use * only) */ /* MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported 25G loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported 50 loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* Supported 100G loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST … #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST … /* Enum values, see field(s): */ /* 100M */ /* AN_TYPE structuredef: Auto-negotiation types defined in IEEE802.3 */ #define AN_TYPE_LEN … #define AN_TYPE_TYPE_OFST … #define AN_TYPE_TYPE_LEN … /* enum: None, AN disabled or not supported */ #define MC_CMD_AN_NONE … /* enum: Clause 28 - BASE-T */ #define MC_CMD_AN_CLAUSE28 … /* enum: Clause 37 - BASE-X */ #define MC_CMD_AN_CLAUSE37 … /* enum: Clause 73 - BASE-R startup protocol for backplane and copper cable * assemblies. Includes Clause 72/Clause 92 link-training. */ #define MC_CMD_AN_CLAUSE73 … #define AN_TYPE_TYPE_LBN … #define AN_TYPE_TYPE_WIDTH … /* FEC_TYPE structuredef: Forward error correction types defined in IEEE802.3 */ #define FEC_TYPE_LEN … #define FEC_TYPE_TYPE_OFST … #define FEC_TYPE_TYPE_LEN … /* enum: No FEC */ #define MC_CMD_FEC_NONE … /* enum: Clause 74 BASE-R FEC (a.k.a Firecode) */ #define MC_CMD_FEC_BASER … /* enum: Clause 91/Clause 108 Reed-Solomon FEC */ #define MC_CMD_FEC_RS … #define FEC_TYPE_TYPE_LBN … #define FEC_TYPE_TYPE_WIDTH … /***********************************/ /* MC_CMD_GET_LINK * Read the unified MAC/PHY link state. Locks required: None Return code: 0, * ETIME. */ #define MC_CMD_GET_LINK … #undef MC_CMD_0x29_PRIVILEGE_CTG #define MC_CMD_0x29_PRIVILEGE_CTG … /* MC_CMD_GET_LINK_IN msgrequest */ #define MC_CMD_GET_LINK_IN_LEN … /* MC_CMD_GET_LINK_OUT msgresponse */ #define MC_CMD_GET_LINK_OUT_LEN … /* Near-side advertised capabilities. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_GET_LINK_OUT_CAP_OFST … #define MC_CMD_GET_LINK_OUT_CAP_LEN … /* Link-partner advertised capabilities. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_GET_LINK_OUT_LP_CAP_OFST … #define MC_CMD_GET_LINK_OUT_LP_CAP_LEN … /* Autonegotiated speed in mbit/s. The link may still be down even if this * reads non-zero. */ #define MC_CMD_GET_LINK_OUT_LINK_SPEED_OFST … #define MC_CMD_GET_LINK_OUT_LINK_SPEED_LEN … /* Current loopback setting. */ #define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_OFST … #define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ #define MC_CMD_GET_LINK_OUT_FLAGS_OFST … #define MC_CMD_GET_LINK_OUT_FLAGS_LEN … #define MC_CMD_GET_LINK_OUT_LINK_UP_OFST … #define MC_CMD_GET_LINK_OUT_LINK_UP_LBN … #define MC_CMD_GET_LINK_OUT_LINK_UP_WIDTH … #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_OFST … #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN … #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_WIDTH … #define MC_CMD_GET_LINK_OUT_BPX_LINK_OFST … #define MC_CMD_GET_LINK_OUT_BPX_LINK_LBN … #define MC_CMD_GET_LINK_OUT_BPX_LINK_WIDTH … #define MC_CMD_GET_LINK_OUT_PHY_LINK_OFST … #define MC_CMD_GET_LINK_OUT_PHY_LINK_LBN … #define MC_CMD_GET_LINK_OUT_PHY_LINK_WIDTH … #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_OFST … #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_LBN … #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_WIDTH … #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_OFST … #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_LBN … #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_WIDTH … #define MC_CMD_GET_LINK_OUT_MODULE_UP_VALID_OFST … #define MC_CMD_GET_LINK_OUT_MODULE_UP_VALID_LBN … #define MC_CMD_GET_LINK_OUT_MODULE_UP_VALID_WIDTH … #define MC_CMD_GET_LINK_OUT_MODULE_UP_OFST … #define MC_CMD_GET_LINK_OUT_MODULE_UP_LBN … #define MC_CMD_GET_LINK_OUT_MODULE_UP_WIDTH … /* This returns the negotiated flow control value. */ #define MC_CMD_GET_LINK_OUT_FCNTL_OFST … #define MC_CMD_GET_LINK_OUT_FCNTL_LEN … /* Enum values, see field(s): */ /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ #define MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST … #define MC_CMD_GET_LINK_OUT_MAC_FAULT_LEN … #define MC_CMD_MAC_FAULT_XGMII_LOCAL_OFST … #define MC_CMD_MAC_FAULT_XGMII_LOCAL_LBN … #define MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH … #define MC_CMD_MAC_FAULT_XGMII_REMOTE_OFST … #define MC_CMD_MAC_FAULT_XGMII_REMOTE_LBN … #define MC_CMD_MAC_FAULT_XGMII_REMOTE_WIDTH … #define MC_CMD_MAC_FAULT_SGMII_REMOTE_OFST … #define MC_CMD_MAC_FAULT_SGMII_REMOTE_LBN … #define MC_CMD_MAC_FAULT_SGMII_REMOTE_WIDTH … #define MC_CMD_MAC_FAULT_PENDING_RECONFIG_OFST … #define MC_CMD_MAC_FAULT_PENDING_RECONFIG_LBN … #define MC_CMD_MAC_FAULT_PENDING_RECONFIG_WIDTH … /* MC_CMD_GET_LINK_OUT_V2 msgresponse: Extended link state information */ #define MC_CMD_GET_LINK_OUT_V2_LEN … /* Near-side advertised capabilities. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_GET_LINK_OUT_V2_CAP_OFST … #define MC_CMD_GET_LINK_OUT_V2_CAP_LEN … /* Link-partner advertised capabilities. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_GET_LINK_OUT_V2_LP_CAP_OFST … #define MC_CMD_GET_LINK_OUT_V2_LP_CAP_LEN … /* Autonegotiated speed in mbit/s. The link may still be down even if this * reads non-zero. */ #define MC_CMD_GET_LINK_OUT_V2_LINK_SPEED_OFST … #define MC_CMD_GET_LINK_OUT_V2_LINK_SPEED_LEN … /* Current loopback setting. */ #define MC_CMD_GET_LINK_OUT_V2_LOOPBACK_MODE_OFST … #define MC_CMD_GET_LINK_OUT_V2_LOOPBACK_MODE_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ #define MC_CMD_GET_LINK_OUT_V2_FLAGS_OFST … #define MC_CMD_GET_LINK_OUT_V2_FLAGS_LEN … #define MC_CMD_GET_LINK_OUT_V2_LINK_UP_OFST … #define MC_CMD_GET_LINK_OUT_V2_LINK_UP_LBN … #define MC_CMD_GET_LINK_OUT_V2_LINK_UP_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_FULL_DUPLEX_OFST … #define MC_CMD_GET_LINK_OUT_V2_FULL_DUPLEX_LBN … #define MC_CMD_GET_LINK_OUT_V2_FULL_DUPLEX_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_BPX_LINK_OFST … #define MC_CMD_GET_LINK_OUT_V2_BPX_LINK_LBN … #define MC_CMD_GET_LINK_OUT_V2_BPX_LINK_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_PHY_LINK_OFST … #define MC_CMD_GET_LINK_OUT_V2_PHY_LINK_LBN … #define MC_CMD_GET_LINK_OUT_V2_PHY_LINK_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_RX_OFST … #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_RX_LBN … #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_RX_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_TX_OFST … #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_TX_LBN … #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_TX_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_VALID_OFST … #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_VALID_LBN … #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_VALID_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_OFST … #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_LBN … #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_WIDTH … /* This returns the negotiated flow control value. */ #define MC_CMD_GET_LINK_OUT_V2_FCNTL_OFST … #define MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN … /* Enum values, see field(s): */ /* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ #define MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_OFST … #define MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_LEN … /* MC_CMD_MAC_FAULT_XGMII_LOCAL_OFST 24 */ /* MC_CMD_MAC_FAULT_XGMII_LOCAL_LBN 0 */ /* MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH 1 */ /* MC_CMD_MAC_FAULT_XGMII_REMOTE_OFST 24 */ /* MC_CMD_MAC_FAULT_XGMII_REMOTE_LBN 1 */ /* MC_CMD_MAC_FAULT_XGMII_REMOTE_WIDTH 1 */ /* MC_CMD_MAC_FAULT_SGMII_REMOTE_OFST 24 */ /* MC_CMD_MAC_FAULT_SGMII_REMOTE_LBN 2 */ /* MC_CMD_MAC_FAULT_SGMII_REMOTE_WIDTH 1 */ /* MC_CMD_MAC_FAULT_PENDING_RECONFIG_OFST 24 */ /* MC_CMD_MAC_FAULT_PENDING_RECONFIG_LBN 3 */ /* MC_CMD_MAC_FAULT_PENDING_RECONFIG_WIDTH 1 */ /* True local device capabilities (taking into account currently used PMD/MDI, * e.g. plugged-in module). In general, subset of * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP, but may include extra _FEC_REQUEST * bits, if the PMD requires FEC. 0 if unknown (e.g. module unplugged). Equal * to SUPPORTED_CAP for non-pluggable PMDs. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_GET_LINK_OUT_V2_LD_CAP_OFST … #define MC_CMD_GET_LINK_OUT_V2_LD_CAP_LEN … /* Auto-negotiation type used on the link */ #define MC_CMD_GET_LINK_OUT_V2_AN_TYPE_OFST … #define MC_CMD_GET_LINK_OUT_V2_AN_TYPE_LEN … /* Enum values, see field(s): */ /* AN_TYPE/TYPE */ /* Forward error correction used on the link */ #define MC_CMD_GET_LINK_OUT_V2_FEC_TYPE_OFST … #define MC_CMD_GET_LINK_OUT_V2_FEC_TYPE_LEN … /* Enum values, see field(s): */ /* FEC_TYPE/TYPE */ #define MC_CMD_GET_LINK_OUT_V2_EXT_FLAGS_OFST … #define MC_CMD_GET_LINK_OUT_V2_EXT_FLAGS_LEN … #define MC_CMD_GET_LINK_OUT_V2_PMD_MDI_CONNECTED_OFST … #define MC_CMD_GET_LINK_OUT_V2_PMD_MDI_CONNECTED_LBN … #define MC_CMD_GET_LINK_OUT_V2_PMD_MDI_CONNECTED_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_PMD_READY_OFST … #define MC_CMD_GET_LINK_OUT_V2_PMD_READY_LBN … #define MC_CMD_GET_LINK_OUT_V2_PMD_READY_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_PMD_LINK_UP_OFST … #define MC_CMD_GET_LINK_OUT_V2_PMD_LINK_UP_LBN … #define MC_CMD_GET_LINK_OUT_V2_PMD_LINK_UP_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_PMA_LINK_UP_OFST … #define MC_CMD_GET_LINK_OUT_V2_PMA_LINK_UP_LBN … #define MC_CMD_GET_LINK_OUT_V2_PMA_LINK_UP_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_PCS_LOCK_OFST … #define MC_CMD_GET_LINK_OUT_V2_PCS_LOCK_LBN … #define MC_CMD_GET_LINK_OUT_V2_PCS_LOCK_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_ALIGN_LOCK_OFST … #define MC_CMD_GET_LINK_OUT_V2_ALIGN_LOCK_LBN … #define MC_CMD_GET_LINK_OUT_V2_ALIGN_LOCK_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_HI_BER_OFST … #define MC_CMD_GET_LINK_OUT_V2_HI_BER_LBN … #define MC_CMD_GET_LINK_OUT_V2_HI_BER_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_FEC_LOCK_OFST … #define MC_CMD_GET_LINK_OUT_V2_FEC_LOCK_LBN … #define MC_CMD_GET_LINK_OUT_V2_FEC_LOCK_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_AN_DONE_OFST … #define MC_CMD_GET_LINK_OUT_V2_AN_DONE_LBN … #define MC_CMD_GET_LINK_OUT_V2_AN_DONE_WIDTH … #define MC_CMD_GET_LINK_OUT_V2_PORT_SHUTDOWN_OFST … #define MC_CMD_GET_LINK_OUT_V2_PORT_SHUTDOWN_LBN … #define MC_CMD_GET_LINK_OUT_V2_PORT_SHUTDOWN_WIDTH … /***********************************/ /* MC_CMD_SET_LINK * Write the unified MAC/PHY link configuration. Locks required: None. Return * code: 0, EINVAL, ETIME, EAGAIN */ #define MC_CMD_SET_LINK … #undef MC_CMD_0x2a_PRIVILEGE_CTG #define MC_CMD_0x2a_PRIVILEGE_CTG … /* MC_CMD_SET_LINK_IN msgrequest */ #define MC_CMD_SET_LINK_IN_LEN … /* Near-side advertised capabilities. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_SET_LINK_IN_CAP_OFST … #define MC_CMD_SET_LINK_IN_CAP_LEN … /* Flags */ #define MC_CMD_SET_LINK_IN_FLAGS_OFST … #define MC_CMD_SET_LINK_IN_FLAGS_LEN … #define MC_CMD_SET_LINK_IN_LOWPOWER_OFST … #define MC_CMD_SET_LINK_IN_LOWPOWER_LBN … #define MC_CMD_SET_LINK_IN_LOWPOWER_WIDTH … #define MC_CMD_SET_LINK_IN_POWEROFF_OFST … #define MC_CMD_SET_LINK_IN_POWEROFF_LBN … #define MC_CMD_SET_LINK_IN_POWEROFF_WIDTH … #define MC_CMD_SET_LINK_IN_TXDIS_OFST … #define MC_CMD_SET_LINK_IN_TXDIS_LBN … #define MC_CMD_SET_LINK_IN_TXDIS_WIDTH … #define MC_CMD_SET_LINK_IN_LINKDOWN_OFST … #define MC_CMD_SET_LINK_IN_LINKDOWN_LBN … #define MC_CMD_SET_LINK_IN_LINKDOWN_WIDTH … /* Loopback mode. */ #define MC_CMD_SET_LINK_IN_LOOPBACK_MODE_OFST … #define MC_CMD_SET_LINK_IN_LOOPBACK_MODE_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ /* A loopback speed of "0" is supported, and means (choose any available * speed). */ #define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_OFST … #define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_LEN … /* MC_CMD_SET_LINK_IN_V2 msgrequest: Updated SET_LINK to include sequence * number to ensure this SET_LINK command corresponds to the latest * MODULECHANGE event. */ #define MC_CMD_SET_LINK_IN_V2_LEN … /* Near-side advertised capabilities. Refer to * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. */ #define MC_CMD_SET_LINK_IN_V2_CAP_OFST … #define MC_CMD_SET_LINK_IN_V2_CAP_LEN … /* Flags */ #define MC_CMD_SET_LINK_IN_V2_FLAGS_OFST … #define MC_CMD_SET_LINK_IN_V2_FLAGS_LEN … #define MC_CMD_SET_LINK_IN_V2_LOWPOWER_OFST … #define MC_CMD_SET_LINK_IN_V2_LOWPOWER_LBN … #define MC_CMD_SET_LINK_IN_V2_LOWPOWER_WIDTH … #define MC_CMD_SET_LINK_IN_V2_POWEROFF_OFST … #define MC_CMD_SET_LINK_IN_V2_POWEROFF_LBN … #define MC_CMD_SET_LINK_IN_V2_POWEROFF_WIDTH … #define MC_CMD_SET_LINK_IN_V2_TXDIS_OFST … #define MC_CMD_SET_LINK_IN_V2_TXDIS_LBN … #define MC_CMD_SET_LINK_IN_V2_TXDIS_WIDTH … #define MC_CMD_SET_LINK_IN_V2_LINKDOWN_OFST … #define MC_CMD_SET_LINK_IN_V2_LINKDOWN_LBN … #define MC_CMD_SET_LINK_IN_V2_LINKDOWN_WIDTH … /* Loopback mode. */ #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_MODE_OFST … #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_MODE_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ /* A loopback speed of "0" is supported, and means (choose any available * speed). */ #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_SPEED_OFST … #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_SPEED_LEN … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_OFST … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_LEN … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_NUMBER_OFST … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_NUMBER_LBN … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_NUMBER_WIDTH … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_OFST … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN … #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH … /* MC_CMD_SET_LINK_OUT msgresponse */ #define MC_CMD_SET_LINK_OUT_LEN … /***********************************/ /* MC_CMD_SET_ID_LED * Set identification LED state. Locks required: None. Return code: 0, EINVAL */ #define MC_CMD_SET_ID_LED … #undef MC_CMD_0x2b_PRIVILEGE_CTG #define MC_CMD_0x2b_PRIVILEGE_CTG … /* MC_CMD_SET_ID_LED_IN msgrequest */ #define MC_CMD_SET_ID_LED_IN_LEN … /* Set LED state. */ #define MC_CMD_SET_ID_LED_IN_STATE_OFST … #define MC_CMD_SET_ID_LED_IN_STATE_LEN … #define MC_CMD_LED_OFF … #define MC_CMD_LED_ON … #define MC_CMD_LED_DEFAULT … /* MC_CMD_SET_ID_LED_OUT msgresponse */ #define MC_CMD_SET_ID_LED_OUT_LEN … /***********************************/ /* MC_CMD_SET_MAC * Set MAC configuration. Locks required: None. Return code: 0, EINVAL */ #define MC_CMD_SET_MAC … #undef MC_CMD_0x2c_PRIVILEGE_CTG #define MC_CMD_0x2c_PRIVILEGE_CTG … /* MC_CMD_SET_MAC_IN msgrequest */ #define MC_CMD_SET_MAC_IN_LEN … /* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of * EtherII, VLAN, bug16011 padding). */ #define MC_CMD_SET_MAC_IN_MTU_OFST … #define MC_CMD_SET_MAC_IN_MTU_LEN … #define MC_CMD_SET_MAC_IN_DRAIN_OFST … #define MC_CMD_SET_MAC_IN_DRAIN_LEN … #define MC_CMD_SET_MAC_IN_ADDR_OFST … #define MC_CMD_SET_MAC_IN_ADDR_LEN … #define MC_CMD_SET_MAC_IN_ADDR_LO_OFST … #define MC_CMD_SET_MAC_IN_ADDR_HI_OFST … #define MC_CMD_SET_MAC_IN_REJECT_OFST … #define MC_CMD_SET_MAC_IN_REJECT_LEN … #define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST … #define MC_CMD_SET_MAC_IN_REJECT_UNCST_LBN … #define MC_CMD_SET_MAC_IN_REJECT_UNCST_WIDTH … #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_OFST … #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_LBN … #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_WIDTH … #define MC_CMD_SET_MAC_IN_FCNTL_OFST … #define MC_CMD_SET_MAC_IN_FCNTL_LEN … /* enum: Flow control is off. */ #define MC_CMD_FCNTL_OFF … /* enum: Respond to flow control. */ #define MC_CMD_FCNTL_RESPOND … /* enum: Respond to and Issue flow control. */ #define MC_CMD_FCNTL_BIDIR … /* enum: Auto neg flow control. */ #define MC_CMD_FCNTL_AUTO … /* enum: Priority flow control (eftest builds only). */ #define MC_CMD_FCNTL_QBB … /* enum: Issue flow control. */ #define MC_CMD_FCNTL_GENERATE … #define MC_CMD_SET_MAC_IN_FLAGS_OFST … #define MC_CMD_SET_MAC_IN_FLAGS_LEN … #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_OFST … #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_LBN … #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_WIDTH … /* MC_CMD_SET_MAC_EXT_IN msgrequest */ #define MC_CMD_SET_MAC_EXT_IN_LEN … /* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of * EtherII, VLAN, bug16011 padding). */ #define MC_CMD_SET_MAC_EXT_IN_MTU_OFST … #define MC_CMD_SET_MAC_EXT_IN_MTU_LEN … #define MC_CMD_SET_MAC_EXT_IN_DRAIN_OFST … #define MC_CMD_SET_MAC_EXT_IN_DRAIN_LEN … #define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST … #define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN … #define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST … #define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST … #define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST … #define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN … #define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST … #define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_LBN … #define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_WIDTH … #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_OFST … #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_LBN … #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_WIDTH … #define MC_CMD_SET_MAC_EXT_IN_FCNTL_OFST … #define MC_CMD_SET_MAC_EXT_IN_FCNTL_LEN … /* enum: Flow control is off. */ /* MC_CMD_FCNTL_OFF 0x0 */ /* enum: Respond to flow control. */ /* MC_CMD_FCNTL_RESPOND 0x1 */ /* enum: Respond to and Issue flow control. */ /* MC_CMD_FCNTL_BIDIR 0x2 */ /* enum: Auto neg flow control. */ /* MC_CMD_FCNTL_AUTO 0x3 */ /* enum: Priority flow control (eftest builds only). */ /* MC_CMD_FCNTL_QBB 0x4 */ /* enum: Issue flow control. */ /* MC_CMD_FCNTL_GENERATE 0x5 */ #define MC_CMD_SET_MAC_EXT_IN_FLAGS_OFST … #define MC_CMD_SET_MAC_EXT_IN_FLAGS_LEN … #define MC_CMD_SET_MAC_EXT_IN_FLAG_INCLUDE_FCS_OFST … #define MC_CMD_SET_MAC_EXT_IN_FLAG_INCLUDE_FCS_LBN … #define MC_CMD_SET_MAC_EXT_IN_FLAG_INCLUDE_FCS_WIDTH … /* Select which parameters to configure. A parameter will only be modified if * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in * capabilities then this field is ignored (and all flags are assumed to be * set). */ #define MC_CMD_SET_MAC_EXT_IN_CONTROL_OFST … #define MC_CMD_SET_MAC_EXT_IN_CONTROL_LEN … #define MC_CMD_SET_MAC_EXT_IN_CFG_MTU_OFST … #define MC_CMD_SET_MAC_EXT_IN_CFG_MTU_LBN … #define MC_CMD_SET_MAC_EXT_IN_CFG_MTU_WIDTH … #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_OFST … #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_LBN … #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_WIDTH … #define MC_CMD_SET_MAC_EXT_IN_CFG_REJECT_OFST … #define MC_CMD_SET_MAC_EXT_IN_CFG_REJECT_LBN … #define MC_CMD_SET_MAC_EXT_IN_CFG_REJECT_WIDTH … #define MC_CMD_SET_MAC_EXT_IN_CFG_FCNTL_OFST … #define MC_CMD_SET_MAC_EXT_IN_CFG_FCNTL_LBN … #define MC_CMD_SET_MAC_EXT_IN_CFG_FCNTL_WIDTH … #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_OFST … #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN … #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH … /* MC_CMD_SET_MAC_OUT msgresponse */ #define MC_CMD_SET_MAC_OUT_LEN … /* MC_CMD_SET_MAC_V2_OUT msgresponse */ #define MC_CMD_SET_MAC_V2_OUT_LEN … /* MTU as configured after processing the request. See comment at * MC_CMD_SET_MAC_IN/MTU. To query MTU without doing any changes, set CONTROL * to 0. */ #define MC_CMD_SET_MAC_V2_OUT_MTU_OFST … #define MC_CMD_SET_MAC_V2_OUT_MTU_LEN … /***********************************/ /* MC_CMD_PHY_STATS * Get generic PHY statistics. This call returns the statistics for a generic * PHY in a sparse array (indexed by the enumerate). Each value is represented * by a 32bit number. If the DMA_ADDR is 0, then no DMA is performed, and the * statistics may be read from the message response. If DMA_ADDR != 0, then the * statistics are dmad to that (page-aligned location). Locks required: None. * Returns: 0, ETIME */ #define MC_CMD_PHY_STATS … #undef MC_CMD_0x2d_PRIVILEGE_CTG #define MC_CMD_0x2d_PRIVILEGE_CTG … /* MC_CMD_PHY_STATS_IN msgrequest */ #define MC_CMD_PHY_STATS_IN_LEN … /* ??? */ #define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST … #define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN … #define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST … #define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST … /* MC_CMD_PHY_STATS_OUT_DMA msgresponse */ #define MC_CMD_PHY_STATS_OUT_DMA_LEN … /* MC_CMD_PHY_STATS_OUT_NO_DMA msgresponse */ #define MC_CMD_PHY_STATS_OUT_NO_DMA_LEN … #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_OFST … #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_LEN … #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_NUM … /* enum: OUI. */ #define MC_CMD_OUI … /* enum: PMA-PMD Link Up. */ #define MC_CMD_PMA_PMD_LINK_UP … /* enum: PMA-PMD RX Fault. */ #define MC_CMD_PMA_PMD_RX_FAULT … /* enum: PMA-PMD TX Fault. */ #define MC_CMD_PMA_PMD_TX_FAULT … /* enum: PMA-PMD Signal */ #define MC_CMD_PMA_PMD_SIGNAL … /* enum: PMA-PMD SNR A. */ #define MC_CMD_PMA_PMD_SNR_A … /* enum: PMA-PMD SNR B. */ #define MC_CMD_PMA_PMD_SNR_B … /* enum: PMA-PMD SNR C. */ #define MC_CMD_PMA_PMD_SNR_C … /* enum: PMA-PMD SNR D. */ #define MC_CMD_PMA_PMD_SNR_D … /* enum: PCS Link Up. */ #define MC_CMD_PCS_LINK_UP … /* enum: PCS RX Fault. */ #define MC_CMD_PCS_RX_FAULT … /* enum: PCS TX Fault. */ #define MC_CMD_PCS_TX_FAULT … /* enum: PCS BER. */ #define MC_CMD_PCS_BER … /* enum: PCS Block Errors. */ #define MC_CMD_PCS_BLOCK_ERRORS … /* enum: PhyXS Link Up. */ #define MC_CMD_PHYXS_LINK_UP … /* enum: PhyXS RX Fault. */ #define MC_CMD_PHYXS_RX_FAULT … /* enum: PhyXS TX Fault. */ #define MC_CMD_PHYXS_TX_FAULT … /* enum: PhyXS Align. */ #define MC_CMD_PHYXS_ALIGN … /* enum: PhyXS Sync. */ #define MC_CMD_PHYXS_SYNC … /* enum: AN link-up. */ #define MC_CMD_AN_LINK_UP … /* enum: AN Complete. */ #define MC_CMD_AN_COMPLETE … /* enum: AN 10GBaseT Status. */ #define MC_CMD_AN_10GBT_STATUS … /* enum: Clause 22 Link-Up. */ #define MC_CMD_CL22_LINK_UP … /* enum: (Last entry) */ #define MC_CMD_PHY_NSTATS … /***********************************/ /* MC_CMD_MAC_STATS * Get generic MAC statistics. This call returns unified statistics maintained * by the MC as it switches between the GMAC and XMAC. The MC will write out * all supported stats. The driver should zero initialise the buffer to * guarantee consistent results. If the DMA_ADDR is 0, then no DMA is * performed, and the statistics may be read from the message response. If * DMA_ADDR != 0, then the statistics are dmad to that (page-aligned location). * Locks required: None. The PERIODIC_CLEAR option is not used and now has no * effect. Returns: 0, ETIME */ #define MC_CMD_MAC_STATS … #undef MC_CMD_0x2e_PRIVILEGE_CTG #define MC_CMD_0x2e_PRIVILEGE_CTG … /* MC_CMD_MAC_STATS_IN msgrequest */ #define MC_CMD_MAC_STATS_IN_LEN … /* ??? */ #define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST … #define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN … #define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST … #define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST … #define MC_CMD_MAC_STATS_IN_CMD_OFST … #define MC_CMD_MAC_STATS_IN_CMD_LEN … #define MC_CMD_MAC_STATS_IN_DMA_OFST … #define MC_CMD_MAC_STATS_IN_DMA_LBN … #define MC_CMD_MAC_STATS_IN_DMA_WIDTH … #define MC_CMD_MAC_STATS_IN_CLEAR_OFST … #define MC_CMD_MAC_STATS_IN_CLEAR_LBN … #define MC_CMD_MAC_STATS_IN_CLEAR_WIDTH … #define MC_CMD_MAC_STATS_IN_PERIODIC_CHANGE_OFST … #define MC_CMD_MAC_STATS_IN_PERIODIC_CHANGE_LBN … #define MC_CMD_MAC_STATS_IN_PERIODIC_CHANGE_WIDTH … #define MC_CMD_MAC_STATS_IN_PERIODIC_ENABLE_OFST … #define MC_CMD_MAC_STATS_IN_PERIODIC_ENABLE_LBN … #define MC_CMD_MAC_STATS_IN_PERIODIC_ENABLE_WIDTH … #define MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR_OFST … #define MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR_LBN … #define MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR_WIDTH … #define MC_CMD_MAC_STATS_IN_PERIODIC_NOEVENT_OFST … #define MC_CMD_MAC_STATS_IN_PERIODIC_NOEVENT_LBN … #define MC_CMD_MAC_STATS_IN_PERIODIC_NOEVENT_WIDTH … #define MC_CMD_MAC_STATS_IN_PERIOD_MS_OFST … #define MC_CMD_MAC_STATS_IN_PERIOD_MS_LBN … #define MC_CMD_MAC_STATS_IN_PERIOD_MS_WIDTH … /* DMA length. Should be set to MAC_STATS_NUM_STATS * sizeof(uint64_t), as * returned by MC_CMD_GET_CAPABILITIES_V4_OUT. For legacy firmware not * supporting MC_CMD_GET_CAPABILITIES_V4_OUT, DMA_LEN should be set to * MC_CMD_MAC_NSTATS * sizeof(uint64_t) */ #define MC_CMD_MAC_STATS_IN_DMA_LEN_OFST … #define MC_CMD_MAC_STATS_IN_DMA_LEN_LEN … /* port id so vadapter stats can be provided */ #define MC_CMD_MAC_STATS_IN_PORT_ID_OFST … #define MC_CMD_MAC_STATS_IN_PORT_ID_LEN … /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_OUT_DMA_LEN … /* MC_CMD_MAC_STATS_OUT_NO_DMA msgresponse */ #define MC_CMD_MAC_STATS_OUT_NO_DMA_LEN … #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST … #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN … #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST … #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST … #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM … #define MC_CMD_MAC_GENERATION_START … #define MC_CMD_MAC_DMABUF_START … #define MC_CMD_MAC_TX_PKTS … #define MC_CMD_MAC_TX_PAUSE_PKTS … #define MC_CMD_MAC_TX_CONTROL_PKTS … #define MC_CMD_MAC_TX_UNICAST_PKTS … #define MC_CMD_MAC_TX_MULTICAST_PKTS … #define MC_CMD_MAC_TX_BROADCAST_PKTS … #define MC_CMD_MAC_TX_BYTES … #define MC_CMD_MAC_TX_BAD_BYTES … #define MC_CMD_MAC_TX_LT64_PKTS … #define MC_CMD_MAC_TX_64_PKTS … #define MC_CMD_MAC_TX_65_TO_127_PKTS … #define MC_CMD_MAC_TX_128_TO_255_PKTS … #define MC_CMD_MAC_TX_256_TO_511_PKTS … #define MC_CMD_MAC_TX_512_TO_1023_PKTS … #define MC_CMD_MAC_TX_1024_TO_15XX_PKTS … #define MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS … #define MC_CMD_MAC_TX_GTJUMBO_PKTS … #define MC_CMD_MAC_TX_BAD_FCS_PKTS … #define MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS … #define MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS … #define MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS … #define MC_CMD_MAC_TX_LATE_COLLISION_PKTS … #define MC_CMD_MAC_TX_DEFERRED_PKTS … #define MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS … #define MC_CMD_MAC_TX_NON_TCPUDP_PKTS … #define MC_CMD_MAC_TX_MAC_SRC_ERR_PKTS … #define MC_CMD_MAC_TX_IP_SRC_ERR_PKTS … #define MC_CMD_MAC_RX_PKTS … #define MC_CMD_MAC_RX_PAUSE_PKTS … #define MC_CMD_MAC_RX_GOOD_PKTS … #define MC_CMD_MAC_RX_CONTROL_PKTS … #define MC_CMD_MAC_RX_UNICAST_PKTS … #define MC_CMD_MAC_RX_MULTICAST_PKTS … #define MC_CMD_MAC_RX_BROADCAST_PKTS … #define MC_CMD_MAC_RX_BYTES … #define MC_CMD_MAC_RX_BAD_BYTES … #define MC_CMD_MAC_RX_64_PKTS … #define MC_CMD_MAC_RX_65_TO_127_PKTS … #define MC_CMD_MAC_RX_128_TO_255_PKTS … #define MC_CMD_MAC_RX_256_TO_511_PKTS … #define MC_CMD_MAC_RX_512_TO_1023_PKTS … #define MC_CMD_MAC_RX_1024_TO_15XX_PKTS … #define MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS … #define MC_CMD_MAC_RX_GTJUMBO_PKTS … #define MC_CMD_MAC_RX_UNDERSIZE_PKTS … #define MC_CMD_MAC_RX_BAD_FCS_PKTS … #define MC_CMD_MAC_RX_OVERFLOW_PKTS … #define MC_CMD_MAC_RX_FALSE_CARRIER_PKTS … #define MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS … #define MC_CMD_MAC_RX_ALIGN_ERROR_PKTS … #define MC_CMD_MAC_RX_LENGTH_ERROR_PKTS … #define MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS … #define MC_CMD_MAC_RX_JABBER_PKTS … #define MC_CMD_MAC_RX_NODESC_DROPS … #define MC_CMD_MAC_RX_LANES01_CHAR_ERR … #define MC_CMD_MAC_RX_LANES23_CHAR_ERR … #define MC_CMD_MAC_RX_LANES01_DISP_ERR … #define MC_CMD_MAC_RX_LANES23_DISP_ERR … #define MC_CMD_MAC_RX_MATCH_FAULT … /* enum: PM trunc_bb_overflow counter. Valid for EF10 with PM_AND_RXDP_COUNTERS * capability only. */ #define MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW … /* enum: PM discard_bb_overflow counter. Valid for EF10 with * PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW … /* enum: PM trunc_vfifo_full counter. Valid for EF10 with PM_AND_RXDP_COUNTERS * capability only. */ #define MC_CMD_MAC_PM_TRUNC_VFIFO_FULL … /* enum: PM discard_vfifo_full counter. Valid for EF10 with * PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_PM_DISCARD_VFIFO_FULL … /* enum: PM trunc_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS * capability only. */ #define MC_CMD_MAC_PM_TRUNC_QBB … /* enum: PM discard_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS * capability only. */ #define MC_CMD_MAC_PM_DISCARD_QBB … /* enum: PM discard_mapping counter. Valid for EF10 with PM_AND_RXDP_COUNTERS * capability only. */ #define MC_CMD_MAC_PM_DISCARD_MAPPING … /* enum: RXDP counter: Number of packets dropped due to the queue being * disabled. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_RXDP_Q_DISABLED_PKTS … /* enum: RXDP counter: Number of packets dropped by the DICPU. Valid for EF10 * with PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_RXDP_DI_DROPPED_PKTS … /* enum: RXDP counter: Number of non-host packets. Valid for EF10 with * PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_RXDP_STREAMING_PKTS … /* enum: RXDP counter: Number of times an hlb descriptor fetch was performed. * Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS … /* enum: RXDP counter: Number of times the DPCPU waited for an existing * descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. */ #define MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS … #define MC_CMD_MAC_VADAPTER_RX_DMABUF_START … #define MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS … #define MC_CMD_MAC_VADAPTER_RX_UNICAST_BYTES … #define MC_CMD_MAC_VADAPTER_RX_MULTICAST_PACKETS … #define MC_CMD_MAC_VADAPTER_RX_MULTICAST_BYTES … #define MC_CMD_MAC_VADAPTER_RX_BROADCAST_PACKETS … #define MC_CMD_MAC_VADAPTER_RX_BROADCAST_BYTES … #define MC_CMD_MAC_VADAPTER_RX_BAD_PACKETS … #define MC_CMD_MAC_VADAPTER_RX_BAD_BYTES … #define MC_CMD_MAC_VADAPTER_RX_OVERFLOW … #define MC_CMD_MAC_VADAPTER_TX_DMABUF_START … #define MC_CMD_MAC_VADAPTER_TX_UNICAST_PACKETS … #define MC_CMD_MAC_VADAPTER_TX_UNICAST_BYTES … #define MC_CMD_MAC_VADAPTER_TX_MULTICAST_PACKETS … #define MC_CMD_MAC_VADAPTER_TX_MULTICAST_BYTES … #define MC_CMD_MAC_VADAPTER_TX_BROADCAST_PACKETS … #define MC_CMD_MAC_VADAPTER_TX_BROADCAST_BYTES … #define MC_CMD_MAC_VADAPTER_TX_BAD_PACKETS … #define MC_CMD_MAC_VADAPTER_TX_BAD_BYTES … #define MC_CMD_MAC_VADAPTER_TX_OVERFLOW … /* enum: Start of GMAC stats buffer space, for Siena only. */ #define MC_CMD_GMAC_DMABUF_START … /* enum: End of GMAC stats buffer space, for Siena only. */ #define MC_CMD_GMAC_DMABUF_END … /* enum: GENERATION_END value, used together with GENERATION_START to verify * consistency of DMAd data. For legacy firmware / drivers without extended * stats (more precisely, when DMA_LEN == MC_CMD_MAC_NSTATS * * sizeof(uint64_t)), this entry holds the GENERATION_END value. Otherwise, * this value is invalid/ reserved and GENERATION_END is written as the last * 64-bit word of the DMA buffer (at DMA_LEN - sizeof(uint64_t)). Note that * this is consistent with the legacy behaviour, in the sense that entry 96 is * the last 64-bit word in the buffer when DMA_LEN == MC_CMD_MAC_NSTATS * * sizeof(uint64_t). See SF-109306-TC, Section 9.2 for details. */ #define MC_CMD_MAC_GENERATION_END … #define MC_CMD_MAC_NSTATS … /* MC_CMD_MAC_STATS_V2_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_V2_OUT_DMA_LEN … /* MC_CMD_MAC_STATS_V2_OUT_NO_DMA msgresponse */ #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_LEN … #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST … #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN … #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST … #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST … #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM … /* enum: Start of FEC stats buffer space, Medford2 and up */ #define MC_CMD_MAC_FEC_DMABUF_START … /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2) */ #define MC_CMD_MAC_FEC_UNCORRECTED_ERRORS … /* enum: Number of corrected FEC codewords on link (RS-FEC only for Medford2) */ #define MC_CMD_MAC_FEC_CORRECTED_ERRORS … /* enum: Number of corrected 10-bit symbol errors, lane 0 (RS-FEC only) */ #define MC_CMD_MAC_FEC_CORRECTED_SYMBOLS_LANE0 … /* enum: Number of corrected 10-bit symbol errors, lane 1 (RS-FEC only) */ #define MC_CMD_MAC_FEC_CORRECTED_SYMBOLS_LANE1 … /* enum: Number of corrected 10-bit symbol errors, lane 2 (RS-FEC only) */ #define MC_CMD_MAC_FEC_CORRECTED_SYMBOLS_LANE2 … /* enum: Number of corrected 10-bit symbol errors, lane 3 (RS-FEC only) */ #define MC_CMD_MAC_FEC_CORRECTED_SYMBOLS_LANE3 … /* enum: This includes the space at offset 103 which is the final * GENERATION_END in a MAC_STATS_V2 response and otherwise unused. */ #define MC_CMD_MAC_NSTATS_V2 … /* Other enum values, see field(s): */ /* MC_CMD_MAC_STATS_OUT_NO_DMA/STATISTICS */ /* MC_CMD_MAC_STATS_V3_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_V3_OUT_DMA_LEN … /* MC_CMD_MAC_STATS_V3_OUT_NO_DMA msgresponse */ #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_LEN … #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST … #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN … #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST … #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST … #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM … /* enum: Start of CTPIO stats buffer space, Medford2 and up */ #define MC_CMD_MAC_CTPIO_DMABUF_START … /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the * target VI */ #define MC_CMD_MAC_CTPIO_VI_BUSY_FALLBACK … /* enum: Number of times a CTPIO send wrote beyond frame end (informational * only) */ #define MC_CMD_MAC_CTPIO_LONG_WRITE_SUCCESS … /* enum: Number of CTPIO failures because the TX doorbell was written before * the end of the frame data */ #define MC_CMD_MAC_CTPIO_MISSING_DBELL_FAIL … /* enum: Number of CTPIO failures because the internal FIFO overflowed */ #define MC_CMD_MAC_CTPIO_OVERFLOW_FAIL … /* enum: Number of CTPIO failures because the host did not deliver data fast * enough to avoid MAC underflow */ #define MC_CMD_MAC_CTPIO_UNDERFLOW_FAIL … /* enum: Number of CTPIO failures because the host did not deliver all the * frame data within the timeout */ #define MC_CMD_MAC_CTPIO_TIMEOUT_FAIL … /* enum: Number of CTPIO failures because the frame data arrived out of order * or with gaps */ #define MC_CMD_MAC_CTPIO_NONCONTIG_WR_FAIL … /* enum: Number of CTPIO failures because the host started a new frame before * completing the previous one */ #define MC_CMD_MAC_CTPIO_FRM_CLOBBER_FAIL … /* enum: Number of CTPIO failures because a write was not a multiple of 32 bits * or not 32-bit aligned */ #define MC_CMD_MAC_CTPIO_INVALID_WR_FAIL … /* enum: Number of CTPIO fallbacks because another VI on the same port was * sending a CTPIO frame */ #define MC_CMD_MAC_CTPIO_VI_CLOBBER_FALLBACK … /* enum: Number of CTPIO fallbacks because target VI did not have CTPIO enabled */ #define MC_CMD_MAC_CTPIO_UNQUALIFIED_FALLBACK … /* enum: Number of CTPIO fallbacks because length in header was less than 29 * bytes */ #define MC_CMD_MAC_CTPIO_RUNT_FALLBACK … /* enum: Total number of successful CTPIO sends on this port */ #define MC_CMD_MAC_CTPIO_SUCCESS … /* enum: Total number of CTPIO fallbacks on this port */ #define MC_CMD_MAC_CTPIO_FALLBACK … /* enum: Total number of CTPIO poisoned frames on this port, whether erased or * not */ #define MC_CMD_MAC_CTPIO_POISON … /* enum: Total number of CTPIO erased frames on this port */ #define MC_CMD_MAC_CTPIO_ERASE … /* enum: This includes the space at offset 120 which is the final * GENERATION_END in a MAC_STATS_V3 response and otherwise unused. */ #define MC_CMD_MAC_NSTATS_V3 … /* Other enum values, see field(s): */ /* MC_CMD_MAC_STATS_V2_OUT_NO_DMA/STATISTICS */ /* MC_CMD_MAC_STATS_V4_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_V4_OUT_DMA_LEN … /* MC_CMD_MAC_STATS_V4_OUT_NO_DMA msgresponse */ #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_LEN … #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST … #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN … #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST … #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST … #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM … /* enum: Start of V4 stats buffer space */ #define MC_CMD_MAC_V4_DMABUF_START … /* enum: RXDP counter: Number of packets truncated because scattering was * disabled. */ #define MC_CMD_MAC_RXDP_SCATTER_DISABLED_TRUNC … /* enum: RXDP counter: Number of times the RXDP head of line blocked waiting * for descriptors. Will be zero unless RXDP_HLB_IDLE capability is set. */ #define MC_CMD_MAC_RXDP_HLB_IDLE … /* enum: RXDP counter: Number of times the RXDP timed out while head of line * blocking. Will be zero unless RXDP_HLB_IDLE capability is set. */ #define MC_CMD_MAC_RXDP_HLB_TIMEOUT … /* enum: This includes the space at offset 124 which is the final * GENERATION_END in a MAC_STATS_V4 response and otherwise unused. */ #define MC_CMD_MAC_NSTATS_V4 … /* Other enum values, see field(s): */ /* MC_CMD_MAC_STATS_V3_OUT_NO_DMA/STATISTICS */ /***********************************/ /* MC_CMD_SRIOV * to be documented */ #define MC_CMD_SRIOV … /* MC_CMD_SRIOV_IN msgrequest */ #define MC_CMD_SRIOV_IN_LEN … #define MC_CMD_SRIOV_IN_ENABLE_OFST … #define MC_CMD_SRIOV_IN_ENABLE_LEN … #define MC_CMD_SRIOV_IN_VI_BASE_OFST … #define MC_CMD_SRIOV_IN_VI_BASE_LEN … #define MC_CMD_SRIOV_IN_VF_COUNT_OFST … #define MC_CMD_SRIOV_IN_VF_COUNT_LEN … /* MC_CMD_SRIOV_OUT msgresponse */ #define MC_CMD_SRIOV_OUT_LEN … #define MC_CMD_SRIOV_OUT_VI_SCALE_OFST … #define MC_CMD_SRIOV_OUT_VI_SCALE_LEN … #define MC_CMD_SRIOV_OUT_VF_TOTAL_OFST … #define MC_CMD_SRIOV_OUT_VF_TOTAL_LEN … /* MC_CMD_MEMCPY_RECORD_TYPEDEF structuredef */ #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LEN … /* this is only used for the first record */ #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LEN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LBN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_WIDTH … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LEN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LBN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_WIDTH … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LEN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_RID_INLINE … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LBN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_WIDTH … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LEN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LBN … #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_WIDTH … /***********************************/ /* MC_CMD_MEMCPY * DMA write data into (Rid,Addr), either by dma reading (Rid,Addr), or by data * embedded directly in the command. * * A common pattern is for a client to use generation counts to signal a dma * update of a datastructure. To facilitate this, this MCDI operation can * contain multiple requests which are executed in strict order. Requests take * the form of duplicating the entire MCDI request continuously (including the * requests record, which is ignored in all but the first structure) * * The source data can either come from a DMA from the host, or it can be * embedded within the request directly, thereby eliminating a DMA read. To * indicate this, the client sets FROM_RID=%RID_INLINE, ADDR_HI=0, and * ADDR_LO=offset, and inserts the data at %offset from the start of the * payload. It's the callers responsibility to ensure that the embedded data * doesn't overlap the records. * * Returns: 0, EINVAL (invalid RID) */ #define MC_CMD_MEMCPY … /* MC_CMD_MEMCPY_IN msgrequest */ #define MC_CMD_MEMCPY_IN_LENMIN … #define MC_CMD_MEMCPY_IN_LENMAX … #define MC_CMD_MEMCPY_IN_LENMAX_MCDI2 … #define MC_CMD_MEMCPY_IN_LEN(num) … #define MC_CMD_MEMCPY_IN_RECORD_NUM(len) … /* see MC_CMD_MEMCPY_RECORD_TYPEDEF */ #define MC_CMD_MEMCPY_IN_RECORD_OFST … #define MC_CMD_MEMCPY_IN_RECORD_LEN … #define MC_CMD_MEMCPY_IN_RECORD_MINNUM … #define MC_CMD_MEMCPY_IN_RECORD_MAXNUM … #define MC_CMD_MEMCPY_IN_RECORD_MAXNUM_MCDI2 … /* MC_CMD_MEMCPY_OUT msgresponse */ #define MC_CMD_MEMCPY_OUT_LEN … /***********************************/ /* MC_CMD_WOL_FILTER_SET * Set a WoL filter. */ #define MC_CMD_WOL_FILTER_SET … #undef MC_CMD_0x32_PRIVILEGE_CTG #define MC_CMD_0x32_PRIVILEGE_CTG … /* MC_CMD_WOL_FILTER_SET_IN msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_LEN … #define MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST … #define MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN … #define MC_CMD_FILTER_MODE_SIMPLE … #define MC_CMD_FILTER_MODE_STRUCTURED … /* A type value of 1 is unused. */ #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST … #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN … /* enum: Magic */ #define MC_CMD_WOL_TYPE_MAGIC … /* enum: MS Windows Magic */ #define MC_CMD_WOL_TYPE_WIN_MAGIC … /* enum: IPv4 Syn */ #define MC_CMD_WOL_TYPE_IPV4_SYN … /* enum: IPv6 Syn */ #define MC_CMD_WOL_TYPE_IPV6_SYN … /* enum: Bitmap */ #define MC_CMD_WOL_TYPE_BITMAP … /* enum: Link */ #define MC_CMD_WOL_TYPE_LINK … /* enum: (Above this for future use) */ #define MC_CMD_WOL_TYPE_MAX … #define MC_CMD_WOL_FILTER_SET_IN_DATA_OFST … #define MC_CMD_WOL_FILTER_SET_IN_DATA_LEN … #define MC_CMD_WOL_FILTER_SET_IN_DATA_NUM … /* MC_CMD_WOL_FILTER_SET_IN_MAGIC msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_MAGIC_LEN … /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0 */ /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */ #define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST … #define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN … #define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST … #define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST … /* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN … /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0 */ /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */ #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_IP_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_IP_LEN … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_IP_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_IP_LEN … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_PORT_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_PORT_LEN … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_PORT_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_PORT_LEN … /* MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_LEN … /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0 */ /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */ #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_SRC_IP_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_SRC_IP_LEN … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_DST_IP_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_DST_IP_LEN … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_SRC_PORT_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_SRC_PORT_LEN … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_DST_PORT_OFST … #define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_DST_PORT_LEN … /* MC_CMD_WOL_FILTER_SET_IN_BITMAP msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LEN … /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0 */ /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */ #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_MASK_OFST … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_MASK_LEN … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_BITMAP_OFST … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_BITMAP_LEN … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LEN_OFST … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LEN_LEN … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER3_OFST … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER3_LEN … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER4_OFST … #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER4_LEN … /* MC_CMD_WOL_FILTER_SET_IN_LINK msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_LINK_LEN … /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0 */ /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */ /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */ #define MC_CMD_WOL_FILTER_SET_IN_LINK_MASK_OFST … #define MC_CMD_WOL_FILTER_SET_IN_LINK_MASK_LEN … #define MC_CMD_WOL_FILTER_SET_IN_LINK_UP_OFST … #define MC_CMD_WOL_FILTER_SET_IN_LINK_UP_LBN … #define MC_CMD_WOL_FILTER_SET_IN_LINK_UP_WIDTH … #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_OFST … #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_LBN … #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_WIDTH … /* MC_CMD_WOL_FILTER_SET_OUT msgresponse */ #define MC_CMD_WOL_FILTER_SET_OUT_LEN … #define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_OFST … #define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_LEN … /***********************************/ /* MC_CMD_WOL_FILTER_REMOVE * Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS */ #define MC_CMD_WOL_FILTER_REMOVE … #undef MC_CMD_0x33_PRIVILEGE_CTG #define MC_CMD_0x33_PRIVILEGE_CTG … /* MC_CMD_WOL_FILTER_REMOVE_IN msgrequest */ #define MC_CMD_WOL_FILTER_REMOVE_IN_LEN … #define MC_CMD_WOL_FILTER_REMOVE_IN_FILTER_ID_OFST … #define MC_CMD_WOL_FILTER_REMOVE_IN_FILTER_ID_LEN … /* MC_CMD_WOL_FILTER_REMOVE_OUT msgresponse */ #define MC_CMD_WOL_FILTER_REMOVE_OUT_LEN … /***********************************/ /* MC_CMD_WOL_FILTER_RESET * Reset (i.e. remove all) WoL filters. Locks required: None. Returns: 0, * ENOSYS */ #define MC_CMD_WOL_FILTER_RESET … #undef MC_CMD_0x34_PRIVILEGE_CTG #define MC_CMD_0x34_PRIVILEGE_CTG … /* MC_CMD_WOL_FILTER_RESET_IN msgrequest */ #define MC_CMD_WOL_FILTER_RESET_IN_LEN … #define MC_CMD_WOL_FILTER_RESET_IN_MASK_OFST … #define MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN … #define MC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS … #define MC_CMD_WOL_FILTER_RESET_IN_LIGHTSOUT_OFFLOADS … /* MC_CMD_WOL_FILTER_RESET_OUT msgresponse */ #define MC_CMD_WOL_FILTER_RESET_OUT_LEN … /***********************************/ /* MC_CMD_SET_MCAST_HASH * Set the MCAST hash value without otherwise reconfiguring the MAC */ #define MC_CMD_SET_MCAST_HASH … /* MC_CMD_SET_MCAST_HASH_IN msgrequest */ #define MC_CMD_SET_MCAST_HASH_IN_LEN … #define MC_CMD_SET_MCAST_HASH_IN_HASH0_OFST … #define MC_CMD_SET_MCAST_HASH_IN_HASH0_LEN … #define MC_CMD_SET_MCAST_HASH_IN_HASH1_OFST … #define MC_CMD_SET_MCAST_HASH_IN_HASH1_LEN … /* MC_CMD_SET_MCAST_HASH_OUT msgresponse */ #define MC_CMD_SET_MCAST_HASH_OUT_LEN … /***********************************/ /* MC_CMD_NVRAM_TYPES * Return bitfield indicating available types of virtual NVRAM partitions. * Locks required: none. Returns: 0 */ #define MC_CMD_NVRAM_TYPES … #undef MC_CMD_0x36_PRIVILEGE_CTG #define MC_CMD_0x36_PRIVILEGE_CTG … /* MC_CMD_NVRAM_TYPES_IN msgrequest */ #define MC_CMD_NVRAM_TYPES_IN_LEN … /* MC_CMD_NVRAM_TYPES_OUT msgresponse */ #define MC_CMD_NVRAM_TYPES_OUT_LEN … /* Bit mask of supported types. */ #define MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST … #define MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN … /* enum: Disabled callisto. */ #define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO … /* enum: MC firmware. */ #define MC_CMD_NVRAM_TYPE_MC_FW … /* enum: MC backup firmware. */ #define MC_CMD_NVRAM_TYPE_MC_FW_BACKUP … /* enum: Static configuration Port0. */ #define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0 … /* enum: Static configuration Port1. */ #define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1 … /* enum: Dynamic configuration Port0. */ #define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 … /* enum: Dynamic configuration Port1. */ #define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1 … /* enum: Expansion Rom. */ #define MC_CMD_NVRAM_TYPE_EXP_ROM … /* enum: Expansion Rom Configuration Port0. */ #define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0 … /* enum: Expansion Rom Configuration Port1. */ #define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1 … /* enum: Phy Configuration Port0. */ #define MC_CMD_NVRAM_TYPE_PHY_PORT0 … /* enum: Phy Configuration Port1. */ #define MC_CMD_NVRAM_TYPE_PHY_PORT1 … /* enum: Log. */ #define MC_CMD_NVRAM_TYPE_LOG … /* enum: FPGA image. */ #define MC_CMD_NVRAM_TYPE_FPGA … /* enum: FPGA backup image */ #define MC_CMD_NVRAM_TYPE_FPGA_BACKUP … /* enum: FC firmware. */ #define MC_CMD_NVRAM_TYPE_FC_FW … /* enum: FC backup firmware. */ #define MC_CMD_NVRAM_TYPE_FC_FW_BACKUP … /* enum: CPLD image. */ #define MC_CMD_NVRAM_TYPE_CPLD … /* enum: Licensing information. */ #define MC_CMD_NVRAM_TYPE_LICENSE … /* enum: FC Log. */ #define MC_CMD_NVRAM_TYPE_FC_LOG … /* enum: Additional flash on FPGA. */ #define MC_CMD_NVRAM_TYPE_FC_EXTRA … /***********************************/ /* MC_CMD_NVRAM_INFO * Read info about a virtual NVRAM partition. Locks required: none. Returns: 0, * EINVAL (bad type). */ #define MC_CMD_NVRAM_INFO … #undef MC_CMD_0x37_PRIVILEGE_CTG #define MC_CMD_0x37_PRIVILEGE_CTG … /* MC_CMD_NVRAM_INFO_IN msgrequest */ #define MC_CMD_NVRAM_INFO_IN_LEN … #define MC_CMD_NVRAM_INFO_IN_TYPE_OFST … #define MC_CMD_NVRAM_INFO_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ /* MC_CMD_NVRAM_INFO_OUT msgresponse */ #define MC_CMD_NVRAM_INFO_OUT_LEN … #define MC_CMD_NVRAM_INFO_OUT_TYPE_OFST … #define MC_CMD_NVRAM_INFO_OUT_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_INFO_OUT_SIZE_OFST … #define MC_CMD_NVRAM_INFO_OUT_SIZE_LEN … #define MC_CMD_NVRAM_INFO_OUT_ERASESIZE_OFST … #define MC_CMD_NVRAM_INFO_OUT_ERASESIZE_LEN … #define MC_CMD_NVRAM_INFO_OUT_FLAGS_OFST … #define MC_CMD_NVRAM_INFO_OUT_FLAGS_LEN … #define MC_CMD_NVRAM_INFO_OUT_PROTECTED_OFST … #define MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN … #define MC_CMD_NVRAM_INFO_OUT_PROTECTED_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_TLV_OFST … #define MC_CMD_NVRAM_INFO_OUT_TLV_LBN … #define MC_CMD_NVRAM_INFO_OUT_TLV_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_IF_TSA_BOUND_OFST … #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_IF_TSA_BOUND_LBN … #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_IF_TSA_BOUND_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_CRC_OFST … #define MC_CMD_NVRAM_INFO_OUT_CRC_LBN … #define MC_CMD_NVRAM_INFO_OUT_CRC_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_OFST … #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_LBN … #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_CMAC_OFST … #define MC_CMD_NVRAM_INFO_OUT_CMAC_LBN … #define MC_CMD_NVRAM_INFO_OUT_CMAC_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_A_B_OFST … #define MC_CMD_NVRAM_INFO_OUT_A_B_LBN … #define MC_CMD_NVRAM_INFO_OUT_A_B_WIDTH … #define MC_CMD_NVRAM_INFO_OUT_PHYSDEV_OFST … #define MC_CMD_NVRAM_INFO_OUT_PHYSDEV_LEN … #define MC_CMD_NVRAM_INFO_OUT_PHYSADDR_OFST … #define MC_CMD_NVRAM_INFO_OUT_PHYSADDR_LEN … /* MC_CMD_NVRAM_INFO_V2_OUT msgresponse */ #define MC_CMD_NVRAM_INFO_V2_OUT_LEN … #define MC_CMD_NVRAM_INFO_V2_OUT_TYPE_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_INFO_V2_OUT_SIZE_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_SIZE_LEN … #define MC_CMD_NVRAM_INFO_V2_OUT_ERASESIZE_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_ERASESIZE_LEN … #define MC_CMD_NVRAM_INFO_V2_OUT_FLAGS_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_FLAGS_LEN … #define MC_CMD_NVRAM_INFO_V2_OUT_PROTECTED_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_PROTECTED_LBN … #define MC_CMD_NVRAM_INFO_V2_OUT_PROTECTED_WIDTH … #define MC_CMD_NVRAM_INFO_V2_OUT_TLV_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_TLV_LBN … #define MC_CMD_NVRAM_INFO_V2_OUT_TLV_WIDTH … #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_IF_TSA_BOUND_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_IF_TSA_BOUND_LBN … #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_IF_TSA_BOUND_WIDTH … #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_LBN … #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_WIDTH … #define MC_CMD_NVRAM_INFO_V2_OUT_A_B_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_A_B_LBN … #define MC_CMD_NVRAM_INFO_V2_OUT_A_B_WIDTH … #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSDEV_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSDEV_LEN … #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSADDR_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSADDR_LEN … /* Writes must be multiples of this size. Added to support the MUM on Sorrento. */ #define MC_CMD_NVRAM_INFO_V2_OUT_WRITESIZE_OFST … #define MC_CMD_NVRAM_INFO_V2_OUT_WRITESIZE_LEN … /***********************************/ /* MC_CMD_NVRAM_UPDATE_START * Start a group of update operations on a virtual NVRAM partition. Locks * required: PHY_LOCK if type==*PHY*. Returns: 0, EINVAL (bad type), EACCES (if * PHY_LOCK required and not held). In an adapter bound to a TSA controller, * MC_CMD_NVRAM_UPDATE_START can only be used on a subset of partition types * i.e. static config, dynamic config and expansion ROM config. Attempting to * perform this operation on a restricted partition will return the error * EPERM. */ #define MC_CMD_NVRAM_UPDATE_START … #undef MC_CMD_0x38_PRIVILEGE_CTG #define MC_CMD_0x38_PRIVILEGE_CTG … /* MC_CMD_NVRAM_UPDATE_START_IN msgrequest: Legacy NVRAM_UPDATE_START request. * Use NVRAM_UPDATE_START_V2_IN in new code */ #define MC_CMD_NVRAM_UPDATE_START_IN_LEN … #define MC_CMD_NVRAM_UPDATE_START_IN_TYPE_OFST … #define MC_CMD_NVRAM_UPDATE_START_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ /* MC_CMD_NVRAM_UPDATE_START_V2_IN msgrequest: Extended NVRAM_UPDATE_START * request with additional flags indicating version of command in use. See * MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT for details of extended functionality. Use * paired up with NVRAM_UPDATE_FINISH_V2_IN. */ #define MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN … #define MC_CMD_NVRAM_UPDATE_START_V2_IN_TYPE_OFST … #define MC_CMD_NVRAM_UPDATE_START_V2_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAGS_OFST … #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAGS_LEN … #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT_WIDTH … /* MC_CMD_NVRAM_UPDATE_START_OUT msgresponse */ #define MC_CMD_NVRAM_UPDATE_START_OUT_LEN … /***********************************/ /* MC_CMD_NVRAM_READ * Read data from a virtual NVRAM partition. Locks required: PHY_LOCK if * type==*PHY*. Returns: 0, EINVAL (bad type/offset/length), EACCES (if * PHY_LOCK required and not held) */ #define MC_CMD_NVRAM_READ … #undef MC_CMD_0x39_PRIVILEGE_CTG #define MC_CMD_0x39_PRIVILEGE_CTG … /* MC_CMD_NVRAM_READ_IN msgrequest */ #define MC_CMD_NVRAM_READ_IN_LEN … #define MC_CMD_NVRAM_READ_IN_TYPE_OFST … #define MC_CMD_NVRAM_READ_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_READ_IN_OFFSET_OFST … #define MC_CMD_NVRAM_READ_IN_OFFSET_LEN … /* amount to read in bytes */ #define MC_CMD_NVRAM_READ_IN_LENGTH_OFST … #define MC_CMD_NVRAM_READ_IN_LENGTH_LEN … /* MC_CMD_NVRAM_READ_IN_V2 msgrequest */ #define MC_CMD_NVRAM_READ_IN_V2_LEN … #define MC_CMD_NVRAM_READ_IN_V2_TYPE_OFST … #define MC_CMD_NVRAM_READ_IN_V2_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_READ_IN_V2_OFFSET_OFST … #define MC_CMD_NVRAM_READ_IN_V2_OFFSET_LEN … /* amount to read in bytes */ #define MC_CMD_NVRAM_READ_IN_V2_LENGTH_OFST … #define MC_CMD_NVRAM_READ_IN_V2_LENGTH_LEN … /* Optional control info. If a partition is stored with an A/B versioning * scheme (i.e. in more than one physical partition in NVRAM) the host can set * this to control which underlying physical partition is used to read data * from. This allows it to perform a read-modify-write-verify with the write * lock continuously held by calling NVRAM_UPDATE_START, reading the old * contents using MODE=TARGET_CURRENT, overwriting the old partition and then * verifying by reading with MODE=TARGET_BACKUP. */ #define MC_CMD_NVRAM_READ_IN_V2_MODE_OFST … #define MC_CMD_NVRAM_READ_IN_V2_MODE_LEN … /* enum: Same as omitting MODE: caller sees data in current partition unless it * holds the write lock in which case it sees data in the partition it is * updating. */ #define MC_CMD_NVRAM_READ_IN_V2_DEFAULT … /* enum: Read from the current partition of an A/B pair, even if holding the * write lock. */ #define MC_CMD_NVRAM_READ_IN_V2_TARGET_CURRENT … /* enum: Read from the non-current (i.e. to be updated) partition of an A/B * pair */ #define MC_CMD_NVRAM_READ_IN_V2_TARGET_BACKUP … /* MC_CMD_NVRAM_READ_OUT msgresponse */ #define MC_CMD_NVRAM_READ_OUT_LENMIN … #define MC_CMD_NVRAM_READ_OUT_LENMAX … #define MC_CMD_NVRAM_READ_OUT_LENMAX_MCDI2 … #define MC_CMD_NVRAM_READ_OUT_LEN(num) … #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_NUM(len) … #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_OFST … #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_LEN … #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MINNUM … #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MAXNUM … #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_NVRAM_WRITE * Write data to a virtual NVRAM partition. Locks required: PHY_LOCK if * type==*PHY*. Returns: 0, EINVAL (bad type/offset/length), EACCES (if * PHY_LOCK required and not held) */ #define MC_CMD_NVRAM_WRITE … #undef MC_CMD_0x3a_PRIVILEGE_CTG #define MC_CMD_0x3a_PRIVILEGE_CTG … /* MC_CMD_NVRAM_WRITE_IN msgrequest */ #define MC_CMD_NVRAM_WRITE_IN_LENMIN … #define MC_CMD_NVRAM_WRITE_IN_LENMAX … #define MC_CMD_NVRAM_WRITE_IN_LENMAX_MCDI2 … #define MC_CMD_NVRAM_WRITE_IN_LEN(num) … #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_NUM(len) … #define MC_CMD_NVRAM_WRITE_IN_TYPE_OFST … #define MC_CMD_NVRAM_WRITE_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_WRITE_IN_OFFSET_OFST … #define MC_CMD_NVRAM_WRITE_IN_OFFSET_LEN … #define MC_CMD_NVRAM_WRITE_IN_LENGTH_OFST … #define MC_CMD_NVRAM_WRITE_IN_LENGTH_LEN … #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_OFST … #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_LEN … #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MINNUM … #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MAXNUM … #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_NVRAM_WRITE_OUT msgresponse */ #define MC_CMD_NVRAM_WRITE_OUT_LEN … /***********************************/ /* MC_CMD_NVRAM_ERASE * Erase sector(s) from a virtual NVRAM partition. Locks required: PHY_LOCK if * type==*PHY*. Returns: 0, EINVAL (bad type/offset/length), EACCES (if * PHY_LOCK required and not held) */ #define MC_CMD_NVRAM_ERASE … #undef MC_CMD_0x3b_PRIVILEGE_CTG #define MC_CMD_0x3b_PRIVILEGE_CTG … /* MC_CMD_NVRAM_ERASE_IN msgrequest */ #define MC_CMD_NVRAM_ERASE_IN_LEN … #define MC_CMD_NVRAM_ERASE_IN_TYPE_OFST … #define MC_CMD_NVRAM_ERASE_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_ERASE_IN_OFFSET_OFST … #define MC_CMD_NVRAM_ERASE_IN_OFFSET_LEN … #define MC_CMD_NVRAM_ERASE_IN_LENGTH_OFST … #define MC_CMD_NVRAM_ERASE_IN_LENGTH_LEN … /* MC_CMD_NVRAM_ERASE_OUT msgresponse */ #define MC_CMD_NVRAM_ERASE_OUT_LEN … /***********************************/ /* MC_CMD_NVRAM_UPDATE_FINISH * Finish a group of update operations on a virtual NVRAM partition. Locks * required: PHY_LOCK if type==*PHY*. Returns: 0, EINVAL (bad type/offset/ * length), EACCES (if PHY_LOCK required and not held). In an adapter bound to * a TSA controller, MC_CMD_NVRAM_UPDATE_FINISH can only be used on a subset of * partition types i.e. static config, dynamic config and expansion ROM config. * Attempting to perform this operation on a restricted partition will return * the error EPERM. */ #define MC_CMD_NVRAM_UPDATE_FINISH … #undef MC_CMD_0x3c_PRIVILEGE_CTG #define MC_CMD_0x3c_PRIVILEGE_CTG … /* MC_CMD_NVRAM_UPDATE_FINISH_IN msgrequest: Legacy NVRAM_UPDATE_FINISH * request. Use NVRAM_UPDATE_FINISH_V2_IN in new code */ #define MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN … #define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_LEN … /* MC_CMD_NVRAM_UPDATE_FINISH_V2_IN msgrequest: Extended NVRAM_UPDATE_FINISH * request with additional flags indicating version of NVRAM_UPDATE commands in * use. See MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT for details of extended * functionality. Use paired up with NVRAM_UPDATE_START_V2_IN. */ #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_TYPE_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_REBOOT_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_REBOOT_LEN … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAGS_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAGS_LEN … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_LBN … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_WIDTH … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH … /* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH * response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code */ #define MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN … /* MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT msgresponse: * * Extended NVRAM_UPDATE_FINISH response that communicates the result of secure * firmware validation where applicable back to the host. * * Medford only: For signed firmware images, such as those for medford, the MC * firmware verifies the signature before marking the firmware image as valid. * This process takes a few seconds to complete. So is likely to take more than * the MCDI timeout. Hence signature verification is initiated when * MC_CMD_NVRAM_UPDATE_FINISH_V2_IN is received by the firmware, however, the * MCDI command is run in a background MCDI processing thread. This response * payload includes the results of the signature verification. Note that the * per-partition nvram lock in firmware is only released after the verification * has completed. */ #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN … /* Result of nvram update completion processing. Result codes that indicate an * internal build failure and therefore not expected to be seen by customers in * the field are marked with a prefix 'Internal-error'. */ #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE_OFST … #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE_LEN … /* enum: Invalid return code; only non-zero values are defined. Defined as * unknown for backwards compatibility with NVRAM_UPDATE_FINISH_OUT. */ #define MC_CMD_NVRAM_VERIFY_RC_UNKNOWN … /* enum: Verify succeeded without any errors. */ #define MC_CMD_NVRAM_VERIFY_RC_SUCCESS … /* enum: CMS format verification failed due to an internal error. */ #define MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED … /* enum: Invalid CMS format in image metadata. */ #define MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT … /* enum: Message digest verification failed due to an internal error. */ #define MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED … /* enum: Error in message digest calculated over the reflash-header, payload * and reflash-trailer. */ #define MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST … /* enum: Signature verification failed due to an internal error. */ #define MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED … /* enum: There are no valid signatures in the image. */ #define MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES … /* enum: Trusted approvers verification failed due to an internal error. */ #define MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED … /* enum: The Trusted approver's list is empty. */ #define MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS … /* enum: Signature chain verification failed due to an internal error. */ #define MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED … /* enum: The signers of the signatures in the image are not listed in the * Trusted approver's list. */ #define MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH … /* enum: The image contains a test-signed certificate, but the adapter accepts * only production signed images. */ #define MC_CMD_NVRAM_VERIFY_RC_REJECT_TEST_SIGNED … /* enum: The image has a lower security level than the current firmware. */ #define MC_CMD_NVRAM_VERIFY_RC_SECURITY_LEVEL_DOWNGRADE … /* enum: Internal-error. The signed image is missing the 'contents' section, * where the 'contents' section holds the actual image payload to be applied. */ #define MC_CMD_NVRAM_VERIFY_RC_CONTENT_NOT_FOUND … /* enum: Internal-error. The bundle header is invalid. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_CONTENT_HEADER_INVALID … /* enum: Internal-error. The bundle does not have a valid reflash image layout. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_REFLASH_IMAGE_INVALID … /* enum: Internal-error. The bundle has an inconsistent layout of components or * incorrect checksum. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_IMAGE_LAYOUT_INVALID … /* enum: Internal-error. The bundle manifest is inconsistent with components in * the bundle. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_INVALID … /* enum: Internal-error. The number of components in a bundle do not match the * number of components advertised by the bundle manifest. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_NUM_COMPONENTS_MISMATCH … /* enum: Internal-error. The bundle contains too many components for the MC * firmware to process */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_TOO_MANY_COMPONENTS … /* enum: Internal-error. The bundle manifest has an invalid/inconsistent * component. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_INVALID … /* enum: Internal-error. The hash of a component does not match the hash stored * in the bundle manifest. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_HASH_MISMATCH … /* enum: Internal-error. Component hash calculation failed. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_HASH_FAILED … /* enum: Internal-error. The component does not have a valid reflash image * layout. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_REFLASH_IMAGE_INVALID … /* enum: The bundle processing code failed to copy a component to its target * partition. */ #define MC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_COPY_FAILED … /* enum: The update operation is in-progress. */ #define MC_CMD_NVRAM_VERIFY_RC_PENDING … /***********************************/ /* MC_CMD_REBOOT * Reboot the MC. * * The AFTER_ASSERTION flag is intended to be used when the driver notices an * assertion failure (at which point it is expected to perform a complete tear * down and reinitialise), to allow both ports to reset the MC once in an * atomic fashion. * * Production mc firmwares are generally compiled with REBOOT_ON_ASSERT=1, * which means that they will automatically reboot out of the assertion * handler, so this is in practise an optional operation. It is still * recommended that drivers execute this to support custom firmwares with * REBOOT_ON_ASSERT=0. * * Locks required: NONE Returns: Nothing. You get back a response with ERR=1, * DATALEN=0 */ #define MC_CMD_REBOOT … #undef MC_CMD_0x3d_PRIVILEGE_CTG #define MC_CMD_0x3d_PRIVILEGE_CTG … /* MC_CMD_REBOOT_IN msgrequest */ #define MC_CMD_REBOOT_IN_LEN … #define MC_CMD_REBOOT_IN_FLAGS_OFST … #define MC_CMD_REBOOT_IN_FLAGS_LEN … #define MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION … /* MC_CMD_REBOOT_OUT msgresponse */ #define MC_CMD_REBOOT_OUT_LEN … /***********************************/ /* MC_CMD_SCHEDINFO * Request scheduler info. Locks required: NONE. Returns: An array of * (timeslice,maximum overrun), one for each thread, in ascending order of * thread address. */ #define MC_CMD_SCHEDINFO … #undef MC_CMD_0x3e_PRIVILEGE_CTG #define MC_CMD_0x3e_PRIVILEGE_CTG … /* MC_CMD_SCHEDINFO_IN msgrequest */ #define MC_CMD_SCHEDINFO_IN_LEN … /* MC_CMD_SCHEDINFO_OUT msgresponse */ #define MC_CMD_SCHEDINFO_OUT_LENMIN … #define MC_CMD_SCHEDINFO_OUT_LENMAX … #define MC_CMD_SCHEDINFO_OUT_LENMAX_MCDI2 … #define MC_CMD_SCHEDINFO_OUT_LEN(num) … #define MC_CMD_SCHEDINFO_OUT_DATA_NUM(len) … #define MC_CMD_SCHEDINFO_OUT_DATA_OFST … #define MC_CMD_SCHEDINFO_OUT_DATA_LEN … #define MC_CMD_SCHEDINFO_OUT_DATA_MINNUM … #define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM … #define MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_REBOOT_MODE * Set the mode for the next MC reboot. Locks required: NONE. Sets the reboot * mode to the specified value. Returns the old mode. */ #define MC_CMD_REBOOT_MODE … #undef MC_CMD_0x3f_PRIVILEGE_CTG #define MC_CMD_0x3f_PRIVILEGE_CTG … /* MC_CMD_REBOOT_MODE_IN msgrequest */ #define MC_CMD_REBOOT_MODE_IN_LEN … #define MC_CMD_REBOOT_MODE_IN_VALUE_OFST … #define MC_CMD_REBOOT_MODE_IN_VALUE_LEN … /* enum: Normal. */ #define MC_CMD_REBOOT_MODE_NORMAL … /* enum: Power-on Reset. */ #define MC_CMD_REBOOT_MODE_POR … /* enum: Snapper. */ #define MC_CMD_REBOOT_MODE_SNAPPER … /* enum: snapper fake POR */ #define MC_CMD_REBOOT_MODE_SNAPPER_POR … #define MC_CMD_REBOOT_MODE_IN_FAKE_OFST … #define MC_CMD_REBOOT_MODE_IN_FAKE_LBN … #define MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH … /* MC_CMD_REBOOT_MODE_OUT msgresponse */ #define MC_CMD_REBOOT_MODE_OUT_LEN … #define MC_CMD_REBOOT_MODE_OUT_VALUE_OFST … #define MC_CMD_REBOOT_MODE_OUT_VALUE_LEN … /***********************************/ /* MC_CMD_SENSOR_INFO * Returns information about every available sensor. * * Each sensor has a single (16bit) value, and a corresponding state. The * mapping between value and state is nominally determined by the MC, but may * be implemented using up to 2 ranges per sensor. * * This call returns a mask (32bit) of the sensors that are supported by this * platform, then an array of sensor information structures, in order of sensor * type (but without gaps for unimplemented sensors). Each structure defines * the ranges for the corresponding sensor. An unused range is indicated by * equal limit values. If one range is used, a value outside that range results * in STATE_FATAL. If two ranges are used, a value outside the second range * results in STATE_FATAL while a value outside the first and inside the second * range results in STATE_WARNING. * * Sensor masks and sensor information arrays are organised into pages. For * backward compatibility, older host software can only use sensors in page 0. * Bit 32 in the sensor mask was previously unused, and is no reserved for use * as the next page flag. * * If the request does not contain a PAGE value then firmware will only return * page 0 of sensor information, with bit 31 in the sensor mask cleared. * * If the request contains a PAGE value then firmware responds with the sensor * mask and sensor information array for that page of sensors. In this case bit * 31 in the mask is set if another page exists. * * Locks required: None Returns: 0 */ #define MC_CMD_SENSOR_INFO … #undef MC_CMD_0x41_PRIVILEGE_CTG #define MC_CMD_0x41_PRIVILEGE_CTG … /* MC_CMD_SENSOR_INFO_IN msgrequest */ #define MC_CMD_SENSOR_INFO_IN_LEN … /* MC_CMD_SENSOR_INFO_EXT_IN msgrequest */ #define MC_CMD_SENSOR_INFO_EXT_IN_LEN … /* Which page of sensors to report. * * Page 0 contains sensors 0 to 30 (sensor 31 is the next page bit). * * Page 1 contains sensors 32 to 62 (sensor 63 is the next page bit). etc. */ #define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_OFST … #define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_LEN … /* MC_CMD_SENSOR_INFO_EXT_IN_V2 msgrequest */ #define MC_CMD_SENSOR_INFO_EXT_IN_V2_LEN … /* Which page of sensors to report. * * Page 0 contains sensors 0 to 30 (sensor 31 is the next page bit). * * Page 1 contains sensors 32 to 62 (sensor 63 is the next page bit). etc. */ #define MC_CMD_SENSOR_INFO_EXT_IN_V2_PAGE_OFST … #define MC_CMD_SENSOR_INFO_EXT_IN_V2_PAGE_LEN … /* Flags controlling information retrieved */ #define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_OFST … #define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_LEN … #define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_OFST … #define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_LBN … #define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_WIDTH … /* MC_CMD_SENSOR_INFO_OUT msgresponse */ #define MC_CMD_SENSOR_INFO_OUT_LENMIN … #define MC_CMD_SENSOR_INFO_OUT_LENMAX … #define MC_CMD_SENSOR_INFO_OUT_LENMAX_MCDI2 … #define MC_CMD_SENSOR_INFO_OUT_LEN(num) … #define MC_CMD_SENSOR_INFO_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) … #define MC_CMD_SENSOR_INFO_OUT_MASK_OFST … #define MC_CMD_SENSOR_INFO_OUT_MASK_LEN … /* enum: Controller temperature: degC */ #define MC_CMD_SENSOR_CONTROLLER_TEMP … /* enum: Phy common temperature: degC */ #define MC_CMD_SENSOR_PHY_COMMON_TEMP … /* enum: Controller cooling: bool */ #define MC_CMD_SENSOR_CONTROLLER_COOLING … /* enum: Phy 0 temperature: degC */ #define MC_CMD_SENSOR_PHY0_TEMP … /* enum: Phy 0 cooling: bool */ #define MC_CMD_SENSOR_PHY0_COOLING … /* enum: Phy 1 temperature: degC */ #define MC_CMD_SENSOR_PHY1_TEMP … /* enum: Phy 1 cooling: bool */ #define MC_CMD_SENSOR_PHY1_COOLING … /* enum: 1.0v power: mV */ #define MC_CMD_SENSOR_IN_1V0 … /* enum: 1.2v power: mV */ #define MC_CMD_SENSOR_IN_1V2 … /* enum: 1.8v power: mV */ #define MC_CMD_SENSOR_IN_1V8 … /* enum: 2.5v power: mV */ #define MC_CMD_SENSOR_IN_2V5 … /* enum: 3.3v power: mV */ #define MC_CMD_SENSOR_IN_3V3 … /* enum: 12v power: mV */ #define MC_CMD_SENSOR_IN_12V0 … /* enum: 1.2v analogue power: mV */ #define MC_CMD_SENSOR_IN_1V2A … /* enum: reference voltage: mV */ #define MC_CMD_SENSOR_IN_VREF … /* enum: AOE FPGA power: mV */ #define MC_CMD_SENSOR_OUT_VAOE … /* enum: AOE FPGA temperature: degC */ #define MC_CMD_SENSOR_AOE_TEMP … /* enum: AOE FPGA PSU temperature: degC */ #define MC_CMD_SENSOR_PSU_AOE_TEMP … /* enum: AOE PSU temperature: degC */ #define MC_CMD_SENSOR_PSU_TEMP … /* enum: Fan 0 speed: RPM */ #define MC_CMD_SENSOR_FAN_0 … /* enum: Fan 1 speed: RPM */ #define MC_CMD_SENSOR_FAN_1 … /* enum: Fan 2 speed: RPM */ #define MC_CMD_SENSOR_FAN_2 … /* enum: Fan 3 speed: RPM */ #define MC_CMD_SENSOR_FAN_3 … /* enum: Fan 4 speed: RPM */ #define MC_CMD_SENSOR_FAN_4 … /* enum: AOE FPGA input power: mV */ #define MC_CMD_SENSOR_IN_VAOE … /* enum: AOE FPGA current: mA */ #define MC_CMD_SENSOR_OUT_IAOE … /* enum: AOE FPGA input current: mA */ #define MC_CMD_SENSOR_IN_IAOE … /* enum: NIC power consumption: W */ #define MC_CMD_SENSOR_NIC_POWER … /* enum: 0.9v power voltage: mV */ #define MC_CMD_SENSOR_IN_0V9 … /* enum: 0.9v power current: mA */ #define MC_CMD_SENSOR_IN_I0V9 … /* enum: 1.2v power current: mA */ #define MC_CMD_SENSOR_IN_I1V2 … /* enum: Not a sensor: reserved for the next page flag */ #define MC_CMD_SENSOR_PAGE0_NEXT … /* enum: 0.9v power voltage (at ADC): mV */ #define MC_CMD_SENSOR_IN_0V9_ADC … /* enum: Controller temperature 2: degC */ #define MC_CMD_SENSOR_CONTROLLER_2_TEMP … /* enum: Voltage regulator internal temperature: degC */ #define MC_CMD_SENSOR_VREG_INTERNAL_TEMP … /* enum: 0.9V voltage regulator temperature: degC */ #define MC_CMD_SENSOR_VREG_0V9_TEMP … /* enum: 1.2V voltage regulator temperature: degC */ #define MC_CMD_SENSOR_VREG_1V2_TEMP … /* enum: controller internal temperature sensor voltage (internal ADC): mV */ #define MC_CMD_SENSOR_CONTROLLER_VPTAT … /* enum: controller internal temperature (internal ADC): degC */ #define MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP … /* enum: controller internal temperature sensor voltage (external ADC): mV */ #define MC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC … /* enum: controller internal temperature (external ADC): degC */ #define MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC … /* enum: ambient temperature: degC */ #define MC_CMD_SENSOR_AMBIENT_TEMP … /* enum: air flow: bool */ #define MC_CMD_SENSOR_AIRFLOW … /* enum: voltage between VSS08D and VSS08D at CSR: mV */ #define MC_CMD_SENSOR_VDD08D_VSS08D_CSR … /* enum: voltage between VSS08D and VSS08D at CSR (external ADC): mV */ #define MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC … /* enum: Hotpoint temperature: degC */ #define MC_CMD_SENSOR_HOTPOINT_TEMP … /* enum: Port 0 PHY power switch over-current: bool */ #define MC_CMD_SENSOR_PHY_POWER_PORT0 … /* enum: Port 1 PHY power switch over-current: bool */ #define MC_CMD_SENSOR_PHY_POWER_PORT1 … /* enum: Mop-up microcontroller reference voltage: mV */ #define MC_CMD_SENSOR_MUM_VCC … /* enum: 0.9v power phase A voltage: mV */ #define MC_CMD_SENSOR_IN_0V9_A … /* enum: 0.9v power phase A current: mA */ #define MC_CMD_SENSOR_IN_I0V9_A … /* enum: 0.9V voltage regulator phase A temperature: degC */ #define MC_CMD_SENSOR_VREG_0V9_A_TEMP … /* enum: 0.9v power phase B voltage: mV */ #define MC_CMD_SENSOR_IN_0V9_B … /* enum: 0.9v power phase B current: mA */ #define MC_CMD_SENSOR_IN_I0V9_B … /* enum: 0.9V voltage regulator phase B temperature: degC */ #define MC_CMD_SENSOR_VREG_0V9_B_TEMP … /* enum: CCOM AVREG 1v2 supply (interval ADC): mV */ #define MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY … /* enum: CCOM AVREG 1v2 supply (external ADC): mV */ #define MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_EXTADC … /* enum: CCOM AVREG 1v8 supply (interval ADC): mV */ #define MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY … /* enum: CCOM AVREG 1v8 supply (external ADC): mV */ #define MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_EXTADC … /* enum: CCOM RTS temperature: degC */ #define MC_CMD_SENSOR_CONTROLLER_RTS … /* enum: Not a sensor: reserved for the next page flag */ #define MC_CMD_SENSOR_PAGE1_NEXT … /* enum: controller internal temperature sensor voltage on master core * (internal ADC): mV */ #define MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT … /* enum: controller internal temperature on master core (internal ADC): degC */ #define MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP … /* enum: controller internal temperature sensor voltage on master core * (external ADC): mV */ #define MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_EXTADC … /* enum: controller internal temperature on master core (external ADC): degC */ #define MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC … /* enum: controller internal temperature on slave core sensor voltage (internal * ADC): mV */ #define MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT … /* enum: controller internal temperature on slave core (internal ADC): degC */ #define MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP … /* enum: controller internal temperature on slave core sensor voltage (external * ADC): mV */ #define MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_EXTADC … /* enum: controller internal temperature on slave core (external ADC): degC */ #define MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC … /* enum: Voltage supplied to the SODIMMs from their power supply: mV */ #define MC_CMD_SENSOR_SODIMM_VOUT … /* enum: Temperature of SODIMM 0 (if installed): degC */ #define MC_CMD_SENSOR_SODIMM_0_TEMP … /* enum: Temperature of SODIMM 1 (if installed): degC */ #define MC_CMD_SENSOR_SODIMM_1_TEMP … /* enum: Voltage supplied to the QSFP #0 from their power supply: mV */ #define MC_CMD_SENSOR_PHY0_VCC … /* enum: Voltage supplied to the QSFP #1 from their power supply: mV */ #define MC_CMD_SENSOR_PHY1_VCC … /* enum: Controller die temperature (TDIODE): degC */ #define MC_CMD_SENSOR_CONTROLLER_TDIODE_TEMP … /* enum: Board temperature (front): degC */ #define MC_CMD_SENSOR_BOARD_FRONT_TEMP … /* enum: Board temperature (back): degC */ #define MC_CMD_SENSOR_BOARD_BACK_TEMP … /* enum: 1.8v power current: mA */ #define MC_CMD_SENSOR_IN_I1V8 … /* enum: 2.5v power current: mA */ #define MC_CMD_SENSOR_IN_I2V5 … /* enum: 3.3v power current: mA */ #define MC_CMD_SENSOR_IN_I3V3 … /* enum: 12v power current: mA */ #define MC_CMD_SENSOR_IN_I12V0 … /* enum: 1.3v power: mV */ #define MC_CMD_SENSOR_IN_1V3 … /* enum: 1.3v power current: mA */ #define MC_CMD_SENSOR_IN_I1V3 … /* enum: Engineering sensor 1 */ #define MC_CMD_SENSOR_ENGINEERING_1 … /* enum: Engineering sensor 2 */ #define MC_CMD_SENSOR_ENGINEERING_2 … /* enum: Engineering sensor 3 */ #define MC_CMD_SENSOR_ENGINEERING_3 … /* enum: Engineering sensor 4 */ #define MC_CMD_SENSOR_ENGINEERING_4 … /* enum: Engineering sensor 5 */ #define MC_CMD_SENSOR_ENGINEERING_5 … /* enum: Engineering sensor 6 */ #define MC_CMD_SENSOR_ENGINEERING_6 … /* enum: Engineering sensor 7 */ #define MC_CMD_SENSOR_ENGINEERING_7 … /* enum: Engineering sensor 8 */ #define MC_CMD_SENSOR_ENGINEERING_8 … /* enum: Not a sensor: reserved for the next page flag */ #define MC_CMD_SENSOR_PAGE2_NEXT … /* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF */ #define MC_CMD_SENSOR_ENTRY_OFST … #define MC_CMD_SENSOR_ENTRY_LEN … #define MC_CMD_SENSOR_ENTRY_LO_OFST … #define MC_CMD_SENSOR_ENTRY_HI_OFST … #define MC_CMD_SENSOR_ENTRY_MINNUM … #define MC_CMD_SENSOR_ENTRY_MAXNUM … #define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 … /* MC_CMD_SENSOR_INFO_EXT_OUT msgresponse */ #define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN … #define MC_CMD_SENSOR_INFO_EXT_OUT_LENMAX … #define MC_CMD_SENSOR_INFO_EXT_OUT_LENMAX_MCDI2 … #define MC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) … #define MC_CMD_SENSOR_INFO_EXT_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) … #define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_OFST … #define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_LEN … /* Enum values, see field(s): */ /* MC_CMD_SENSOR_INFO_OUT */ #define MC_CMD_SENSOR_INFO_EXT_OUT_NEXT_PAGE_OFST … #define MC_CMD_SENSOR_INFO_EXT_OUT_NEXT_PAGE_LBN … #define MC_CMD_SENSOR_INFO_EXT_OUT_NEXT_PAGE_WIDTH … /* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF */ /* MC_CMD_SENSOR_ENTRY_OFST 4 */ /* MC_CMD_SENSOR_ENTRY_LEN 8 */ /* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */ /* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */ /* MC_CMD_SENSOR_ENTRY_MINNUM 0 */ /* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */ /* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */ /* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF structuredef */ #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_LEN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN1_OFST … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN1_LEN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN1_LBN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN1_WIDTH … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX1_OFST … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX1_LEN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX1_LBN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX1_WIDTH … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2_OFST … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2_LEN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2_LBN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2_WIDTH … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX2_OFST … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX2_LEN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX2_LBN … #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX2_WIDTH … /***********************************/ /* MC_CMD_READ_SENSORS * Returns the current reading from each sensor. DMAs an array of sensor * readings, in order of sensor type (but without gaps for unimplemented * sensors), into host memory. Each array element is a * MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF dword. * * If the request does not contain the LENGTH field then only sensors 0 to 30 * are reported, to avoid DMA buffer overflow in older host software. If the * sensor reading require more space than the LENGTH allows, then return * EINVAL. * * The MC will send a SENSOREVT event every time any sensor changes state. The * driver is responsible for ensuring that it doesn't miss any events. The * board will function normally if all sensors are in STATE_OK or * STATE_WARNING. Otherwise the board should not be expected to function. */ #define MC_CMD_READ_SENSORS … #undef MC_CMD_0x42_PRIVILEGE_CTG #define MC_CMD_0x42_PRIVILEGE_CTG … /* MC_CMD_READ_SENSORS_IN msgrequest */ #define MC_CMD_READ_SENSORS_IN_LEN … /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned). * * If the address is 0xffffffffffffffff send the readings in the response (used * by cmdclient). */ #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST … #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN … #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST … #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST … /* MC_CMD_READ_SENSORS_EXT_IN msgrequest */ #define MC_CMD_READ_SENSORS_EXT_IN_LEN … /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned). * * If the address is 0xffffffffffffffff send the readings in the response (used * by cmdclient). */ #define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN … #define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST … /* Size in bytes of host buffer. */ #define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN … /* MC_CMD_READ_SENSORS_EXT_IN_V2 msgrequest */ #define MC_CMD_READ_SENSORS_EXT_IN_V2_LEN … /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned). * * If the address is 0xffffffffffffffff send the readings in the response (used * by cmdclient). */ #define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN … #define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST … /* Size in bytes of host buffer. */ #define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN … /* Flags controlling information retrieved */ #define MC_CMD_READ_SENSORS_EXT_IN_V2_FLAGS_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_V2_FLAGS_LEN … #define MC_CMD_READ_SENSORS_EXT_IN_V2_ENGINEERING_OFST … #define MC_CMD_READ_SENSORS_EXT_IN_V2_ENGINEERING_LBN … #define MC_CMD_READ_SENSORS_EXT_IN_V2_ENGINEERING_WIDTH … /* MC_CMD_READ_SENSORS_OUT msgresponse */ #define MC_CMD_READ_SENSORS_OUT_LEN … /* MC_CMD_READ_SENSORS_EXT_OUT msgresponse */ #define MC_CMD_READ_SENSORS_EXT_OUT_LEN … /* MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF structuredef */ #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_LEN … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_OFST … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_LEN … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_LBN … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_WIDTH … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_OFST … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_LEN … /* enum: Ok. */ #define MC_CMD_SENSOR_STATE_OK … /* enum: Breached warning threshold. */ #define MC_CMD_SENSOR_STATE_WARNING … /* enum: Breached fatal threshold. */ #define MC_CMD_SENSOR_STATE_FATAL … /* enum: Fault with sensor. */ #define MC_CMD_SENSOR_STATE_BROKEN … /* enum: Sensor is working but does not currently have a reading. */ #define MC_CMD_SENSOR_STATE_NO_READING … /* enum: Sensor initialisation failed. */ #define MC_CMD_SENSOR_STATE_INIT_FAILED … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_LBN … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_WIDTH … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_OFST … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_LBN … #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_WIDTH … /***********************************/ /* MC_CMD_GET_PHY_STATE * Report current state of PHY. A 'zombie' PHY is a PHY that has failed to boot * (e.g. due to missing or corrupted firmware). Locks required: None. Return * code: 0 */ #define MC_CMD_GET_PHY_STATE … #undef MC_CMD_0x43_PRIVILEGE_CTG #define MC_CMD_0x43_PRIVILEGE_CTG … /* MC_CMD_GET_PHY_STATE_IN msgrequest */ #define MC_CMD_GET_PHY_STATE_IN_LEN … /* MC_CMD_GET_PHY_STATE_OUT msgresponse */ #define MC_CMD_GET_PHY_STATE_OUT_LEN … #define MC_CMD_GET_PHY_STATE_OUT_STATE_OFST … #define MC_CMD_GET_PHY_STATE_OUT_STATE_LEN … /* enum: Ok. */ #define MC_CMD_PHY_STATE_OK … /* enum: Faulty. */ #define MC_CMD_PHY_STATE_ZOMBIE … /***********************************/ /* MC_CMD_SETUP_8021QBB * 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to * disable 802.Qbb for a given priority. */ #define MC_CMD_SETUP_8021QBB … /* MC_CMD_SETUP_8021QBB_IN msgrequest */ #define MC_CMD_SETUP_8021QBB_IN_LEN … #define MC_CMD_SETUP_8021QBB_IN_TXQS_OFST … #define MC_CMD_SETUP_8021QBB_IN_TXQS_LEN … /* MC_CMD_SETUP_8021QBB_OUT msgresponse */ #define MC_CMD_SETUP_8021QBB_OUT_LEN … /***********************************/ /* MC_CMD_WOL_FILTER_GET * Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS */ #define MC_CMD_WOL_FILTER_GET … #undef MC_CMD_0x45_PRIVILEGE_CTG #define MC_CMD_0x45_PRIVILEGE_CTG … /* MC_CMD_WOL_FILTER_GET_IN msgrequest */ #define MC_CMD_WOL_FILTER_GET_IN_LEN … /* MC_CMD_WOL_FILTER_GET_OUT msgresponse */ #define MC_CMD_WOL_FILTER_GET_OUT_LEN … #define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_OFST … #define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_LEN … /***********************************/ /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD * Add a protocol offload to NIC for lights-out state. Locks required: None. * Returns: 0, ENOSYS */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD … #undef MC_CMD_0x46_PRIVILEGE_CTG #define MC_CMD_0x46_PRIVILEGE_CTG … /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN msgrequest */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMIN … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX_MCDI2 … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN … #define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP … #define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MINNUM … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM_MCDI2 … /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP msgrequest */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_LEN … /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */ /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_LEN … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_LEN … /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS msgrequest */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_LEN … /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */ /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_LEN … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_LEN … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_LEN … /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT msgresponse */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_OFST … #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_LEN … /***********************************/ /* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD * Remove a protocol offload from NIC for lights-out state. Locks required: * None. Returns: 0, ENOSYS */ #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD … #undef MC_CMD_0x47_PRIVILEGE_CTG #define MC_CMD_0x47_PRIVILEGE_CTG … /* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN msgrequest */ #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN … #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST … #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN … #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST … #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_LEN … /* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT msgresponse */ #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN … /***********************************/ /* MC_CMD_MAC_RESET_RESTORE * Restore MAC after block reset. Locks required: None. Returns: 0. */ #define MC_CMD_MAC_RESET_RESTORE … /* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */ #define MC_CMD_MAC_RESET_RESTORE_IN_LEN … /* MC_CMD_MAC_RESET_RESTORE_OUT msgresponse */ #define MC_CMD_MAC_RESET_RESTORE_OUT_LEN … /***********************************/ /* MC_CMD_TESTASSERT * Deliberately trigger an assert-detonation in the firmware for testing * purposes (i.e. to allow tests that the driver copes gracefully). Locks * required: None Returns: 0 */ #define MC_CMD_TESTASSERT … #undef MC_CMD_0x49_PRIVILEGE_CTG #define MC_CMD_0x49_PRIVILEGE_CTG … /* MC_CMD_TESTASSERT_IN msgrequest */ #define MC_CMD_TESTASSERT_IN_LEN … /* MC_CMD_TESTASSERT_OUT msgresponse */ #define MC_CMD_TESTASSERT_OUT_LEN … /* MC_CMD_TESTASSERT_V2_IN msgrequest */ #define MC_CMD_TESTASSERT_V2_IN_LEN … /* How to provoke the assertion */ #define MC_CMD_TESTASSERT_V2_IN_TYPE_OFST … #define MC_CMD_TESTASSERT_V2_IN_TYPE_LEN … /* enum: Assert using the FAIL_ASSERTION_WITH_USEFUL_VALUES macro. Unless * you're testing firmware, this is what you want. */ #define MC_CMD_TESTASSERT_V2_IN_FAIL_ASSERTION_WITH_USEFUL_VALUES … /* enum: Assert using assert(0); */ #define MC_CMD_TESTASSERT_V2_IN_ASSERT_FALSE … /* enum: Deliberately trigger a watchdog */ #define MC_CMD_TESTASSERT_V2_IN_WATCHDOG … /* enum: Deliberately trigger a trap by loading from an invalid address */ #define MC_CMD_TESTASSERT_V2_IN_LOAD_TRAP … /* enum: Deliberately trigger a trap by storing to an invalid address */ #define MC_CMD_TESTASSERT_V2_IN_STORE_TRAP … /* enum: Jump to an invalid address */ #define MC_CMD_TESTASSERT_V2_IN_JUMP_TRAP … /* MC_CMD_TESTASSERT_V2_OUT msgresponse */ #define MC_CMD_TESTASSERT_V2_OUT_LEN … /***********************************/ /* MC_CMD_WORKAROUND * Enable/Disable a given workaround. The mcfw will return EINVAL if it doesn't * understand the given workaround number - which should not be treated as a * hard error by client code. This op does not imply any semantics about each * workaround, that's between the driver and the mcfw on a per-workaround * basis. Locks required: None. Returns: 0, EINVAL . */ #define MC_CMD_WORKAROUND … #undef MC_CMD_0x4a_PRIVILEGE_CTG #define MC_CMD_0x4a_PRIVILEGE_CTG … /* MC_CMD_WORKAROUND_IN msgrequest */ #define MC_CMD_WORKAROUND_IN_LEN … /* The enums here must correspond with those in MC_CMD_GET_WORKAROUND. */ #define MC_CMD_WORKAROUND_IN_TYPE_OFST … #define MC_CMD_WORKAROUND_IN_TYPE_LEN … /* enum: Bug 17230 work around. */ #define MC_CMD_WORKAROUND_BUG17230 … /* enum: Bug 35388 work around (unsafe EVQ writes). */ #define MC_CMD_WORKAROUND_BUG35388 … /* enum: Bug35017 workaround (A64 tables must be identity map) */ #define MC_CMD_WORKAROUND_BUG35017 … /* enum: Bug 41750 present (MC_CMD_TRIGGER_INTERRUPT won't work) */ #define MC_CMD_WORKAROUND_BUG41750 … /* enum: Bug 42008 present (Interrupts can overtake associated events). Caution * - before adding code that queries this workaround, remember that there's * released Monza firmware that doesn't understand MC_CMD_WORKAROUND_BUG42008, * and will hence (incorrectly) report that the bug doesn't exist. */ #define MC_CMD_WORKAROUND_BUG42008 … /* enum: Bug 26807 features present in firmware (multicast filter chaining) * This feature cannot be turned on/off while there are any filters already * present. The behaviour in such case depends on the acting client's privilege * level. If the client has the admin privilege, then all functions that have * filters installed will be FLRed and the FLR_DONE flag will be set. Otherwise * the command will fail with MC_CMD_ERR_FILTERS_PRESENT. */ #define MC_CMD_WORKAROUND_BUG26807 … /* enum: Bug 61265 work around (broken EVQ TMR writes). */ #define MC_CMD_WORKAROUND_BUG61265 … /* 0 = disable the workaround indicated by TYPE; any non-zero value = enable * the workaround */ #define MC_CMD_WORKAROUND_IN_ENABLED_OFST … #define MC_CMD_WORKAROUND_IN_ENABLED_LEN … /* MC_CMD_WORKAROUND_OUT msgresponse */ #define MC_CMD_WORKAROUND_OUT_LEN … /* MC_CMD_WORKAROUND_EXT_OUT msgresponse: This response format will be used * when (TYPE == MC_CMD_WORKAROUND_BUG26807) */ #define MC_CMD_WORKAROUND_EXT_OUT_LEN … #define MC_CMD_WORKAROUND_EXT_OUT_FLAGS_OFST … #define MC_CMD_WORKAROUND_EXT_OUT_FLAGS_LEN … #define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_OFST … #define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN … #define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_WIDTH … /***********************************/ /* MC_CMD_GET_PHY_MEDIA_INFO * Read media-specific data from PHY (e.g. SFP/SFP+ module ID information for * SFP+ PHYs). The 'media type' can be found via GET_PHY_CFG * (GET_PHY_CFG_OUT_MEDIA_TYPE); the valid 'page number' input values, and the * output data, are interpreted on a per-type basis. For SFP+: PAGE=0 or 1 * returns a 128-byte block read from module I2C address 0xA0 offset 0 or 0x80. * Anything else: currently undefined. Locks required: None. Return code: 0. */ #define MC_CMD_GET_PHY_MEDIA_INFO … #undef MC_CMD_0x4b_PRIVILEGE_CTG #define MC_CMD_0x4b_PRIVILEGE_CTG … /* MC_CMD_GET_PHY_MEDIA_INFO_IN msgrequest */ #define MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN … #define MC_CMD_GET_PHY_MEDIA_INFO_IN_PAGE_OFST … #define MC_CMD_GET_PHY_MEDIA_INFO_IN_PAGE_LEN … /* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */ #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX_MCDI2 … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(num) … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_NUM(len) … /* in bytes */ #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_OFST … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_LEN … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_LEN … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MINNUM … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MAXNUM … #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_NVRAM_TEST * Test a particular NVRAM partition for valid contents (where "valid" depends * on the type of partition). */ #define MC_CMD_NVRAM_TEST … #undef MC_CMD_0x4c_PRIVILEGE_CTG #define MC_CMD_0x4c_PRIVILEGE_CTG … /* MC_CMD_NVRAM_TEST_IN msgrequest */ #define MC_CMD_NVRAM_TEST_IN_LEN … #define MC_CMD_NVRAM_TEST_IN_TYPE_OFST … #define MC_CMD_NVRAM_TEST_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ /* MC_CMD_NVRAM_TEST_OUT msgresponse */ #define MC_CMD_NVRAM_TEST_OUT_LEN … #define MC_CMD_NVRAM_TEST_OUT_RESULT_OFST … #define MC_CMD_NVRAM_TEST_OUT_RESULT_LEN … /* enum: Passed. */ #define MC_CMD_NVRAM_TEST_PASS … /* enum: Failed. */ #define MC_CMD_NVRAM_TEST_FAIL … /* enum: Not supported. */ #define MC_CMD_NVRAM_TEST_NOTSUPP … /***********************************/ /* MC_CMD_MRSFP_TWEAK * Read status and/or set parameters for the 'mrsfp' driver in mr_rusty builds. * I2C I/O expander bits are always read; if equaliser parameters are supplied, * they are configured first. Locks required: None. Return code: 0, EINVAL. */ #define MC_CMD_MRSFP_TWEAK … /* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN … /* 0-6 low->high de-emph. */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_OFST … #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_LEN … /* 0-8 low->high ref.V */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST … #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_LEN … /* 0-8 0-8 low->high boost */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_OFST … #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_LEN … /* 0-8 low->high ref.V */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_OFST … #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_LEN … /* MC_CMD_MRSFP_TWEAK_IN_READ_ONLY msgrequest */ #define MC_CMD_MRSFP_TWEAK_IN_READ_ONLY_LEN … /* MC_CMD_MRSFP_TWEAK_OUT msgresponse */ #define MC_CMD_MRSFP_TWEAK_OUT_LEN … /* input bits */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_OFST … #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_LEN … /* output bits */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST … #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_LEN … /* direction */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OFST … #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_LEN … /* enum: Out. */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OUT … /* enum: In. */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_IN … /***********************************/ /* MC_CMD_SENSOR_SET_LIMS * Adjusts the sensor limits. This is a warranty-voiding operation. Returns: * ENOENT if the sensor specified does not exist, EINVAL if the limits are out * of range. */ #define MC_CMD_SENSOR_SET_LIMS … #undef MC_CMD_0x4e_PRIVILEGE_CTG #define MC_CMD_0x4e_PRIVILEGE_CTG … /* MC_CMD_SENSOR_SET_LIMS_IN msgrequest */ #define MC_CMD_SENSOR_SET_LIMS_IN_LEN … #define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_OFST … #define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN … /* Enum values, see field(s): */ /* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ /* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST … #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN … /* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST … #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN … /* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST … #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN … /* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST … #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN … /* MC_CMD_SENSOR_SET_LIMS_OUT msgresponse */ #define MC_CMD_SENSOR_SET_LIMS_OUT_LEN … /***********************************/ /* MC_CMD_GET_RESOURCE_LIMITS */ #define MC_CMD_GET_RESOURCE_LIMITS … /* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */ #define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN … /* MC_CMD_GET_RESOURCE_LIMITS_OUT msgresponse */ #define MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_OFST … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_LEN … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_OFST … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_LEN … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_OFST … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_LEN … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_OFST … #define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_LEN … /***********************************/ /* MC_CMD_NVRAM_PARTITIONS * Reads the list of available virtual NVRAM partition types. Locks required: * none. Returns: 0, EINVAL (bad type). */ #define MC_CMD_NVRAM_PARTITIONS … #undef MC_CMD_0x51_PRIVILEGE_CTG #define MC_CMD_0x51_PRIVILEGE_CTG … /* MC_CMD_NVRAM_PARTITIONS_IN msgrequest */ #define MC_CMD_NVRAM_PARTITIONS_IN_LEN … /* MC_CMD_NVRAM_PARTITIONS_OUT msgresponse */ #define MC_CMD_NVRAM_PARTITIONS_OUT_LENMIN … #define MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX … #define MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2 … #define MC_CMD_NVRAM_PARTITIONS_OUT_LEN(num) … #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_NUM(len) … /* total number of partitions */ #define MC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_OFST … #define MC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_LEN … /* type ID code for each of NUM_PARTITIONS partitions */ #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_OFST … #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_LEN … #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MINNUM … #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM … #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_NVRAM_METADATA * Reads soft metadata for a virtual NVRAM partition type. Locks required: * none. Returns: 0, EINVAL (bad type). */ #define MC_CMD_NVRAM_METADATA … #undef MC_CMD_0x52_PRIVILEGE_CTG #define MC_CMD_0x52_PRIVILEGE_CTG … /* MC_CMD_NVRAM_METADATA_IN msgrequest */ #define MC_CMD_NVRAM_METADATA_IN_LEN … /* Partition type ID code */ #define MC_CMD_NVRAM_METADATA_IN_TYPE_OFST … #define MC_CMD_NVRAM_METADATA_IN_TYPE_LEN … /* MC_CMD_NVRAM_METADATA_OUT msgresponse */ #define MC_CMD_NVRAM_METADATA_OUT_LENMIN … #define MC_CMD_NVRAM_METADATA_OUT_LENMAX … #define MC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2 … #define MC_CMD_NVRAM_METADATA_OUT_LEN(num) … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(len) … /* Partition type ID code */ #define MC_CMD_NVRAM_METADATA_OUT_TYPE_OFST … #define MC_CMD_NVRAM_METADATA_OUT_TYPE_LEN … #define MC_CMD_NVRAM_METADATA_OUT_FLAGS_OFST … #define MC_CMD_NVRAM_METADATA_OUT_FLAGS_LEN … #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_OFST … #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_LBN … #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_WIDTH … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_OFST … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_LBN … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_WIDTH … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_OFST … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_LBN … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_WIDTH … /* Subtype ID code for content of this partition */ #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_OFST … #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_LEN … /* 1st component of W.X.Y.Z version number for content of this partition */ #define MC_CMD_NVRAM_METADATA_OUT_VERSION_W_OFST … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_W_LEN … /* 2nd component of W.X.Y.Z version number for content of this partition */ #define MC_CMD_NVRAM_METADATA_OUT_VERSION_X_OFST … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_X_LEN … /* 3rd component of W.X.Y.Z version number for content of this partition */ #define MC_CMD_NVRAM_METADATA_OUT_VERSION_Y_OFST … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_Y_LEN … /* 4th component of W.X.Y.Z version number for content of this partition */ #define MC_CMD_NVRAM_METADATA_OUT_VERSION_Z_OFST … #define MC_CMD_NVRAM_METADATA_OUT_VERSION_Z_LEN … /* Zero-terminated string describing the content of this partition */ #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_OFST … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_LEN … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MINNUM … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM … #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_GET_MAC_ADDRESSES * Returns the base MAC, count and stride for the requesting function */ #define MC_CMD_GET_MAC_ADDRESSES … #undef MC_CMD_0x55_PRIVILEGE_CTG #define MC_CMD_0x55_PRIVILEGE_CTG … /* MC_CMD_GET_MAC_ADDRESSES_IN msgrequest */ #define MC_CMD_GET_MAC_ADDRESSES_IN_LEN … /* MC_CMD_GET_MAC_ADDRESSES_OUT msgresponse */ #define MC_CMD_GET_MAC_ADDRESSES_OUT_LEN … /* Base MAC address */ #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE_OFST … #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE_LEN … /* Padding */ #define MC_CMD_GET_MAC_ADDRESSES_OUT_RESERVED_OFST … #define MC_CMD_GET_MAC_ADDRESSES_OUT_RESERVED_LEN … /* Number of allocated MAC addresses */ #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_COUNT_OFST … #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_COUNT_LEN … /* Spacing of allocated MAC addresses */ #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_OFST … #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_LEN … /***********************************/ /* MC_CMD_CLP * Perform a CLP related operation, see SF-110495-PS for details of CLP * processing. This command has been extended to accomodate the requirements of * different manufacturers which are to be found in SF-119187-TC, SF-119186-TC, * SF-120509-TC and SF-117282-PS. */ #define MC_CMD_CLP … #undef MC_CMD_0x56_PRIVILEGE_CTG #define MC_CMD_0x56_PRIVILEGE_CTG … /* MC_CMD_CLP_IN msgrequest */ #define MC_CMD_CLP_IN_LEN … /* Sub operation */ #define MC_CMD_CLP_IN_OP_OFST … #define MC_CMD_CLP_IN_OP_LEN … /* enum: Return to factory default settings */ #define MC_CMD_CLP_OP_DEFAULT … /* enum: Set MAC address */ #define MC_CMD_CLP_OP_SET_MAC … /* enum: Get MAC address */ #define MC_CMD_CLP_OP_GET_MAC … /* enum: Set UEFI/GPXE boot mode */ #define MC_CMD_CLP_OP_SET_BOOT … /* enum: Get UEFI/GPXE boot mode */ #define MC_CMD_CLP_OP_GET_BOOT … /* MC_CMD_CLP_OUT msgresponse */ #define MC_CMD_CLP_OUT_LEN … /* MC_CMD_CLP_IN_DEFAULT msgrequest */ #define MC_CMD_CLP_IN_DEFAULT_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ /* MC_CMD_CLP_OUT_DEFAULT msgresponse */ #define MC_CMD_CLP_OUT_DEFAULT_LEN … /* MC_CMD_CLP_IN_SET_MAC msgrequest */ #define MC_CMD_CLP_IN_SET_MAC_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ /* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00 * restores the permanent (factory-programmed) MAC address associated with the * port. A non-zero MAC address persists until a PCIe reset or a power cycle. */ #define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST … #define MC_CMD_CLP_IN_SET_MAC_ADDR_LEN … /* Padding */ #define MC_CMD_CLP_IN_SET_MAC_RESERVED_OFST … #define MC_CMD_CLP_IN_SET_MAC_RESERVED_LEN … /* MC_CMD_CLP_OUT_SET_MAC msgresponse */ #define MC_CMD_CLP_OUT_SET_MAC_LEN … /* MC_CMD_CLP_IN_SET_MAC_V2 msgrequest */ #define MC_CMD_CLP_IN_SET_MAC_V2_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ /* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00 * restores the permanent (factory-programmed) MAC address associated with the * port. A non-zero MAC address persists until a PCIe reset or a power cycle. */ #define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST … #define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_LEN … /* Padding */ #define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_OFST … #define MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_LEN … #define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_OFST … #define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN … #define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_OFST … #define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_LBN … #define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_WIDTH … /* MC_CMD_CLP_IN_GET_MAC msgrequest */ #define MC_CMD_CLP_IN_GET_MAC_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ /* MC_CMD_CLP_IN_GET_MAC_V2 msgrequest */ #define MC_CMD_CLP_IN_GET_MAC_V2_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ #define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST … #define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN … #define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_OFST … #define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_LBN … #define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_WIDTH … /* MC_CMD_CLP_OUT_GET_MAC msgresponse */ #define MC_CMD_CLP_OUT_GET_MAC_LEN … /* MAC address assigned to port */ #define MC_CMD_CLP_OUT_GET_MAC_ADDR_OFST … #define MC_CMD_CLP_OUT_GET_MAC_ADDR_LEN … /* Padding */ #define MC_CMD_CLP_OUT_GET_MAC_RESERVED_OFST … #define MC_CMD_CLP_OUT_GET_MAC_RESERVED_LEN … /* MC_CMD_CLP_IN_SET_BOOT msgrequest */ #define MC_CMD_CLP_IN_SET_BOOT_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ /* Boot flag */ #define MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST … #define MC_CMD_CLP_IN_SET_BOOT_FLAG_LEN … /* MC_CMD_CLP_OUT_SET_BOOT msgresponse */ #define MC_CMD_CLP_OUT_SET_BOOT_LEN … /* MC_CMD_CLP_IN_GET_BOOT msgrequest */ #define MC_CMD_CLP_IN_GET_BOOT_LEN … /* MC_CMD_CLP_IN_OP_OFST 0 */ /* MC_CMD_CLP_IN_OP_LEN 4 */ /* MC_CMD_CLP_OUT_GET_BOOT msgresponse */ #define MC_CMD_CLP_OUT_GET_BOOT_LEN … /* Boot flag */ #define MC_CMD_CLP_OUT_GET_BOOT_FLAG_OFST … #define MC_CMD_CLP_OUT_GET_BOOT_FLAG_LEN … /* Padding */ #define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_OFST … #define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_LEN … /***********************************/ /* MC_CMD_MUM * Perform a MUM operation */ #define MC_CMD_MUM … #undef MC_CMD_0x57_PRIVILEGE_CTG #define MC_CMD_0x57_PRIVILEGE_CTG … /* MC_CMD_MUM_IN msgrequest */ #define MC_CMD_MUM_IN_LEN … #define MC_CMD_MUM_IN_OP_HDR_OFST … #define MC_CMD_MUM_IN_OP_HDR_LEN … #define MC_CMD_MUM_IN_OP_OFST … #define MC_CMD_MUM_IN_OP_LBN … #define MC_CMD_MUM_IN_OP_WIDTH … /* enum: NULL MCDI command to MUM */ #define MC_CMD_MUM_OP_NULL … /* enum: Get MUM version */ #define MC_CMD_MUM_OP_GET_VERSION … /* enum: Issue raw I2C command to MUM */ #define MC_CMD_MUM_OP_RAW_CMD … /* enum: Read from registers on devices connected to MUM. */ #define MC_CMD_MUM_OP_READ … /* enum: Write to registers on devices connected to MUM. */ #define MC_CMD_MUM_OP_WRITE … /* enum: Control UART logging. */ #define MC_CMD_MUM_OP_LOG … /* enum: Operations on MUM GPIO lines */ #define MC_CMD_MUM_OP_GPIO … /* enum: Get sensor readings from MUM */ #define MC_CMD_MUM_OP_READ_SENSORS … /* enum: Initiate clock programming on the MUM */ #define MC_CMD_MUM_OP_PROGRAM_CLOCKS … /* enum: Initiate FPGA load from flash on the MUM */ #define MC_CMD_MUM_OP_FPGA_LOAD … /* enum: Request sensor reading from MUM ADC resulting from earlier request via * MUM ATB */ #define MC_CMD_MUM_OP_READ_ATB_SENSOR … /* enum: Send commands relating to the QSFP ports via the MUM for PHY * operations */ #define MC_CMD_MUM_OP_QSFP … /* enum: Request discrete and SODIMM DDR info (type, size, speed grade, voltage * level) from MUM */ #define MC_CMD_MUM_OP_READ_DDR_INFO … /* MC_CMD_MUM_IN_NULL msgrequest */ #define MC_CMD_MUM_IN_NULL_LEN … /* MUM cmd header */ #define MC_CMD_MUM_IN_CMD_OFST … #define MC_CMD_MUM_IN_CMD_LEN … /* MC_CMD_MUM_IN_GET_VERSION msgrequest */ #define MC_CMD_MUM_IN_GET_VERSION_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* MC_CMD_MUM_IN_READ msgrequest */ #define MC_CMD_MUM_IN_READ_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* ID of (device connected to MUM) to read from registers of */ #define MC_CMD_MUM_IN_READ_DEVICE_OFST … #define MC_CMD_MUM_IN_READ_DEVICE_LEN … /* enum: Hittite HMC1035 clock generator on Sorrento board */ #define MC_CMD_MUM_DEV_HITTITE … /* enum: Hittite HMC1035 clock generator for NIC-side on Sorrento board */ #define MC_CMD_MUM_DEV_HITTITE_NIC … /* 32-bit address to read from */ #define MC_CMD_MUM_IN_READ_ADDR_OFST … #define MC_CMD_MUM_IN_READ_ADDR_LEN … /* Number of words to read. */ #define MC_CMD_MUM_IN_READ_NUMWORDS_OFST … #define MC_CMD_MUM_IN_READ_NUMWORDS_LEN … /* MC_CMD_MUM_IN_WRITE msgrequest */ #define MC_CMD_MUM_IN_WRITE_LENMIN … #define MC_CMD_MUM_IN_WRITE_LENMAX … #define MC_CMD_MUM_IN_WRITE_LENMAX_MCDI2 … #define MC_CMD_MUM_IN_WRITE_LEN(num) … #define MC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* ID of (device connected to MUM) to write to registers of */ #define MC_CMD_MUM_IN_WRITE_DEVICE_OFST … #define MC_CMD_MUM_IN_WRITE_DEVICE_LEN … /* enum: Hittite HMC1035 clock generator on Sorrento board */ /* MC_CMD_MUM_DEV_HITTITE 0x1 */ /* 32-bit address to write to */ #define MC_CMD_MUM_IN_WRITE_ADDR_OFST … #define MC_CMD_MUM_IN_WRITE_ADDR_LEN … /* Words to write */ #define MC_CMD_MUM_IN_WRITE_BUFFER_OFST … #define MC_CMD_MUM_IN_WRITE_BUFFER_LEN … #define MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM … #define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM … #define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_MUM_IN_RAW_CMD msgrequest */ #define MC_CMD_MUM_IN_RAW_CMD_LENMIN … #define MC_CMD_MUM_IN_RAW_CMD_LENMAX … #define MC_CMD_MUM_IN_RAW_CMD_LENMAX_MCDI2 … #define MC_CMD_MUM_IN_RAW_CMD_LEN(num) … #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_NUM(len) … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* MUM I2C cmd code */ #define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST … #define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_LEN … /* Number of bytes to write */ #define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_OFST … #define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_LEN … /* Number of bytes to read */ #define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_OFST … #define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_LEN … /* Bytes to write */ #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_OFST … #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN … #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM … #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM … #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM_MCDI2 … /* MC_CMD_MUM_IN_LOG msgrequest */ #define MC_CMD_MUM_IN_LOG_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_LOG_OP_OFST … #define MC_CMD_MUM_IN_LOG_OP_LEN … #define MC_CMD_MUM_IN_LOG_OP_UART … /* MC_CMD_MUM_IN_LOG_OP_UART msgrequest */ #define MC_CMD_MUM_IN_LOG_OP_UART_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* MC_CMD_MUM_IN_LOG_OP_OFST 4 */ /* MC_CMD_MUM_IN_LOG_OP_LEN 4 */ /* Enable/disable debug output to UART */ #define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_OFST … #define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_LEN … /* MC_CMD_MUM_IN_GPIO msgrequest */ #define MC_CMD_MUM_IN_GPIO_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_HDR_LEN … #define MC_CMD_MUM_IN_GPIO_OPCODE_OFST … #define MC_CMD_MUM_IN_GPIO_OPCODE_LBN … #define MC_CMD_MUM_IN_GPIO_OPCODE_WIDTH … #define MC_CMD_MUM_IN_GPIO_IN_READ … #define MC_CMD_MUM_IN_GPIO_OUT_WRITE … #define MC_CMD_MUM_IN_GPIO_OUT_READ … #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE … #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ … #define MC_CMD_MUM_IN_GPIO_OP … /* MC_CMD_MUM_IN_GPIO_IN_READ msgrequest */ #define MC_CMD_MUM_IN_GPIO_IN_READ_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_LEN … /* MC_CMD_MUM_IN_GPIO_OUT_WRITE msgrequest */ #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_LEN … /* The first 32-bit word to be written to the GPIO OUT register. */ #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_LEN … /* The second 32-bit word to be written to the GPIO OUT register. */ #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_LEN … /* MC_CMD_MUM_IN_GPIO_OUT_READ msgrequest */ #define MC_CMD_MUM_IN_GPIO_OUT_READ_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_LEN … /* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE msgrequest */ #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_LEN … /* The first 32-bit word to be written to the GPIO OUT ENABLE register. */ #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_LEN … /* The second 32-bit word to be written to the GPIO OUT ENABLE register. */ #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_LEN … /* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ msgrequest */ #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_LEN … /* MC_CMD_MUM_IN_GPIO_OP msgrequest */ #define MC_CMD_MUM_IN_GPIO_OP_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OP_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OP_HDR_LEN … #define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_OFST … #define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_LBN … #define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_WIDTH … #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ … #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE … #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG … #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE … #define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_OFST … #define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_LBN … #define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_WIDTH … /* MC_CMD_MUM_IN_GPIO_OP_OUT_READ msgrequest */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_LEN … /* MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE msgrequest */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_LEN … #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_LBN … #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_WIDTH … /* MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG msgrequest */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_LEN … #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_LBN … #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_WIDTH … /* MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE msgrequest */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_LEN … #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_OFST … #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_LBN … #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_WIDTH … /* MC_CMD_MUM_IN_READ_SENSORS msgrequest */ #define MC_CMD_MUM_IN_READ_SENSORS_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST … #define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_LEN … #define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_OFST … #define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_LBN … #define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_WIDTH … #define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_OFST … #define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_LBN … #define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_WIDTH … /* MC_CMD_MUM_IN_PROGRAM_CLOCKS msgrequest */ #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* Bit-mask of clocks to be programmed */ #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_LEN … #define MC_CMD_MUM_CLOCK_ID_FPGA … #define MC_CMD_MUM_CLOCK_ID_DDR … #define MC_CMD_MUM_CLOCK_ID_NIC … /* Control flags for clock programming */ #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_OFST … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_LEN … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_OFST … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_LBN … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_WIDTH … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_OFST … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_LBN … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_WIDTH … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_OFST … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_LBN … #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_WIDTH … /* MC_CMD_MUM_IN_FPGA_LOAD msgrequest */ #define MC_CMD_MUM_IN_FPGA_LOAD_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* Enable/Disable FPGA config from flash */ #define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST … #define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_LEN … /* MC_CMD_MUM_IN_READ_ATB_SENSOR msgrequest */ #define MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* MC_CMD_MUM_IN_QSFP msgrequest */ #define MC_CMD_MUM_IN_QSFP_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_OPCODE_OFST … #define MC_CMD_MUM_IN_QSFP_OPCODE_LBN … #define MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH … #define MC_CMD_MUM_IN_QSFP_INIT … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE … #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP … #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO … #define MC_CMD_MUM_IN_QSFP_FILL_STATS … #define MC_CMD_MUM_IN_QSFP_POLL_BIST … #define MC_CMD_MUM_IN_QSFP_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_IDX_LEN … /* MC_CMD_MUM_IN_QSFP_INIT msgrequest */ #define MC_CMD_MUM_IN_QSFP_INIT_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_INIT_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_INIT_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_INIT_IDX_LEN … #define MC_CMD_MUM_IN_QSFP_INIT_CAGE_OFST … #define MC_CMD_MUM_IN_QSFP_INIT_CAGE_LEN … /* MC_CMD_MUM_IN_QSFP_RECONFIGURE msgrequest */ #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_LEN … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_OFST … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_LEN … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_OFST … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_LEN … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_OFST … #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_LEN … /* MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP msgrequest */ #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_LEN … /* MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO msgrequest */ #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_LEN … #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_OFST … #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_LEN … /* MC_CMD_MUM_IN_QSFP_FILL_STATS msgrequest */ #define MC_CMD_MUM_IN_QSFP_FILL_STATS_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_LEN … /* MC_CMD_MUM_IN_QSFP_POLL_BIST msgrequest */ #define MC_CMD_MUM_IN_QSFP_POLL_BIST_LEN … /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ #define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST … #define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_LEN … #define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_OFST … #define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_LEN … /* MC_CMD_MUM_IN_READ_DDR_INFO msgrequest */ #define MC_CMD_MUM_IN_READ_DDR_INFO_LEN … /* MUM cmd header */ /* MC_CMD_MUM_IN_CMD_OFST 0 */ /* MC_CMD_MUM_IN_CMD_LEN 4 */ /* MC_CMD_MUM_OUT msgresponse */ #define MC_CMD_MUM_OUT_LEN … /* MC_CMD_MUM_OUT_NULL msgresponse */ #define MC_CMD_MUM_OUT_NULL_LEN … /* MC_CMD_MUM_OUT_GET_VERSION msgresponse */ #define MC_CMD_MUM_OUT_GET_VERSION_LEN … #define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_OFST … #define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_LEN … #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST … #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN … #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST … #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST … /* MC_CMD_MUM_OUT_RAW_CMD msgresponse */ #define MC_CMD_MUM_OUT_RAW_CMD_LENMIN … #define MC_CMD_MUM_OUT_RAW_CMD_LENMAX … #define MC_CMD_MUM_OUT_RAW_CMD_LENMAX_MCDI2 … #define MC_CMD_MUM_OUT_RAW_CMD_LEN(num) … #define MC_CMD_MUM_OUT_RAW_CMD_DATA_NUM(len) … /* returned data */ #define MC_CMD_MUM_OUT_RAW_CMD_DATA_OFST … #define MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN … #define MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM … #define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM … #define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM_MCDI2 … /* MC_CMD_MUM_OUT_READ msgresponse */ #define MC_CMD_MUM_OUT_READ_LENMIN … #define MC_CMD_MUM_OUT_READ_LENMAX … #define MC_CMD_MUM_OUT_READ_LENMAX_MCDI2 … #define MC_CMD_MUM_OUT_READ_LEN(num) … #define MC_CMD_MUM_OUT_READ_BUFFER_NUM(len) … #define MC_CMD_MUM_OUT_READ_BUFFER_OFST … #define MC_CMD_MUM_OUT_READ_BUFFER_LEN … #define MC_CMD_MUM_OUT_READ_BUFFER_MINNUM … #define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM … #define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM_MCDI2 … /* MC_CMD_MUM_OUT_WRITE msgresponse */ #define MC_CMD_MUM_OUT_WRITE_LEN … /* MC_CMD_MUM_OUT_LOG msgresponse */ #define MC_CMD_MUM_OUT_LOG_LEN … /* MC_CMD_MUM_OUT_LOG_OP_UART msgresponse */ #define MC_CMD_MUM_OUT_LOG_OP_UART_LEN … /* MC_CMD_MUM_OUT_GPIO_IN_READ msgresponse */ #define MC_CMD_MUM_OUT_GPIO_IN_READ_LEN … /* The first 32-bit word read from the GPIO IN register. */ #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_OFST … #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_LEN … /* The second 32-bit word read from the GPIO IN register. */ #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST … #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_LEN … /* MC_CMD_MUM_OUT_GPIO_OUT_WRITE msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OUT_WRITE_LEN … /* MC_CMD_MUM_OUT_GPIO_OUT_READ msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OUT_READ_LEN … /* The first 32-bit word read from the GPIO OUT register. */ #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_OFST … #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_LEN … /* The second 32-bit word read from the GPIO OUT register. */ #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST … #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_LEN … /* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE_LEN … /* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_LEN … #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_OFST … #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_LEN … #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST … #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_LEN … /* MC_CMD_MUM_OUT_GPIO_OP_OUT_READ msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN … #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_OFST … #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_LEN … /* MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE_LEN … /* MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG_LEN … /* MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE msgresponse */ #define MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE_LEN … /* MC_CMD_MUM_OUT_READ_SENSORS msgresponse */ #define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN … #define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX … #define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX_MCDI2 … #define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) … #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) … #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST … #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN … #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM … #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM … #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM_MCDI2 … #define MC_CMD_MUM_OUT_READ_SENSORS_READING_OFST … #define MC_CMD_MUM_OUT_READ_SENSORS_READING_LBN … #define MC_CMD_MUM_OUT_READ_SENSORS_READING_WIDTH … #define MC_CMD_MUM_OUT_READ_SENSORS_STATE_OFST … #define MC_CMD_MUM_OUT_READ_SENSORS_STATE_LBN … #define MC_CMD_MUM_OUT_READ_SENSORS_STATE_WIDTH … #define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_OFST … #define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_LBN … #define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_WIDTH … /* MC_CMD_MUM_OUT_PROGRAM_CLOCKS msgresponse */ #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN … #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_OFST … #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_LEN … /* MC_CMD_MUM_OUT_FPGA_LOAD msgresponse */ #define MC_CMD_MUM_OUT_FPGA_LOAD_LEN … /* MC_CMD_MUM_OUT_READ_ATB_SENSOR msgresponse */ #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN … #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_OFST … #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_LEN … /* MC_CMD_MUM_OUT_QSFP_INIT msgresponse */ #define MC_CMD_MUM_OUT_QSFP_INIT_LEN … /* MC_CMD_MUM_OUT_QSFP_RECONFIGURE msgresponse */ #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_LEN … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_OFST … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_LEN … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_LEN … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_OFST … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_LBN … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_WIDTH … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_OFST … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_LBN … #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_WIDTH … /* MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP msgresponse */ #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN … #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_OFST … #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_LEN … /* MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO msgresponse */ #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMIN … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX_MCDI2 … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) … /* in bytes */ #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM … #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM_MCDI2 … /* MC_CMD_MUM_OUT_QSFP_FILL_STATS msgresponse */ #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_LEN … #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_OFST … #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_LEN … #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST … #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_LEN … /* MC_CMD_MUM_OUT_QSFP_POLL_BIST msgresponse */ #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN … #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_OFST … #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_LEN … /* MC_CMD_MUM_OUT_READ_DDR_INFO msgresponse */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMIN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX … #define MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX_MCDI2 … #define MC_CMD_MUM_OUT_READ_DDR_INFO_LEN(num) … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_NUM(len) … /* Discrete (soldered) DDR resistor strap info */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_WIDTH … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_WIDTH … /* Number of SODIMM info records */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_LEN … /* Array of SODIMM info records */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 … #define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_WIDTH … /* enum: SODIMM bank 1 (Top SODIMM for Sorrento) */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK1 … /* enum: SODIMM bank 2 (Bottom SODDIMM for Sorrento) */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_BANK2 … /* enum: Total number of SODIMM banks */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_BANKS … #define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_WIDTH … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_WIDTH … #define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_WIDTH … #define MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_POWERED … #define MC_CMD_MUM_OUT_READ_DDR_INFO_1V25 … #define MC_CMD_MUM_OUT_READ_DDR_INFO_1V35 … #define MC_CMD_MUM_OUT_READ_DDR_INFO_1V5 … /* enum: Values 5-15 are reserved for future usage */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_1V8 … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_WIDTH … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_WIDTH … #define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_WIDTH … /* enum: No module present */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_ABSENT … /* enum: Module present supported and powered on */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_POWERED … /* enum: Module present but bad type */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_TYPE … /* enum: Module present but incompatible voltage */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_VOLTAGE … /* enum: Module present but unknown SPD */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SPD … /* enum: Module present but slot cannot support it */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SLOT … /* enum: Modules may or may not be present, but cannot establish contact by I2C */ #define MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_REACHABLE … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_OFST … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_LBN … #define MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_WIDTH … /* MC_CMD_DYNAMIC_SENSORS_LIMITS structuredef: Set of sensor limits. This * should match the equivalent structure in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LEN … /* A value below this will trigger a warning event. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_LBN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_WIDTH … /* A value below this will trigger a critical event. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_LBN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_WIDTH … /* A value below this will shut down the card. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_LBN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_WIDTH … /* A value above this will trigger a warning event. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_LBN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_WIDTH … /* A value above this will trigger a critical event. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_LBN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_WIDTH … /* A value above this will shut down the card. */ #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_LBN … #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_WIDTH … /* MC_CMD_DYNAMIC_SENSORS_DESCRIPTION structuredef: Description of a sensor. * This should match the equivalent structure in the sensor_query SPHINX * service. */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LEN … /* The handle used to identify the sensor in calls to * MC_CMD_DYNAMIC_SENSORS_GET_VALUES */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_OFST … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_LEN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_LBN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_WIDTH … /* A human-readable name for the sensor (zero terminated string, max 32 bytes) */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_OFST … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_LEN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_LBN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_WIDTH … /* The type of the sensor device, and by implication the unit of that the * values will be reported in */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_OFST … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_LEN … /* enum: A voltage sensor. Unit is mV */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_VOLTAGE … /* enum: A current sensor. Unit is mA */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_CURRENT … /* enum: A power sensor. Unit is mW */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_POWER … /* enum: A temperature sensor. Unit is Celsius */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TEMPERATURE … /* enum: A cooling fan sensor. Unit is RPM */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_FAN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_LBN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_WIDTH … /* A single MC_CMD_DYNAMIC_SENSORS_LIMITS structure */ #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_OFST … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_LEN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_LBN … #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_WIDTH … /* MC_CMD_DYNAMIC_SENSORS_READING structuredef: State and value of a sensor. * This should match the equivalent structure in the sensor_query SPHINX * service. */ #define MC_CMD_DYNAMIC_SENSORS_READING_LEN … /* The handle used to identify the sensor */ #define MC_CMD_DYNAMIC_SENSORS_READING_HANDLE_OFST … #define MC_CMD_DYNAMIC_SENSORS_READING_HANDLE_LEN … #define MC_CMD_DYNAMIC_SENSORS_READING_HANDLE_LBN … #define MC_CMD_DYNAMIC_SENSORS_READING_HANDLE_WIDTH … /* The current value of the sensor */ #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_OFST … #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_LEN … #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_LBN … #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_WIDTH … /* The sensor's condition, e.g. good, broken or removed */ #define MC_CMD_DYNAMIC_SENSORS_READING_STATE_OFST … #define MC_CMD_DYNAMIC_SENSORS_READING_STATE_LEN … /* enum: Sensor working normally within limits */ #define MC_CMD_DYNAMIC_SENSORS_READING_OK … /* enum: Warning threshold breached */ #define MC_CMD_DYNAMIC_SENSORS_READING_WARNING … /* enum: Critical threshold breached */ #define MC_CMD_DYNAMIC_SENSORS_READING_CRITICAL … /* enum: Fatal threshold breached */ #define MC_CMD_DYNAMIC_SENSORS_READING_FATAL … /* enum: Sensor not working */ #define MC_CMD_DYNAMIC_SENSORS_READING_BROKEN … /* enum: Sensor working but no reading available */ #define MC_CMD_DYNAMIC_SENSORS_READING_NO_READING … /* enum: Sensor initialization failed */ #define MC_CMD_DYNAMIC_SENSORS_READING_INIT_FAILED … #define MC_CMD_DYNAMIC_SENSORS_READING_STATE_LBN … #define MC_CMD_DYNAMIC_SENSORS_READING_STATE_WIDTH … /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_LIST * Return a complete list of handles for sensors currently managed by the MC, * and a generation count for this version of the sensor table. On systems * advertising the DYNAMIC_SENSORS capability bit, this replaces the * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors * added by the NMC. * * Sensor handles are persistent for the lifetime of the sensor and are used to * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. * * The generation count is maintained by the MC, is persistent across reboots * and will be incremented each time the sensor table is modified. When the * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated * containing the new generation count. The driver should compare this against * the current generation count, and if it is different, call * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table. * * The sensor count is provided to allow a future path to supporting more than * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e. * the maximum number that will fit in a single response. As this is a fairly * large number (253) it is not anticipated that this will be needed in the * near future, so can currently be ignored. * * On Riverhead this command is implemented as a wrapper for `list` in the * sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_LIST … #undef MC_CMD_0x66_PRIVILEGE_CTG #define MC_CMD_0x66_PRIVILEGE_CTG … /* MC_CMD_DYNAMIC_SENSORS_LIST_IN msgrequest */ #define MC_CMD_DYNAMIC_SENSORS_LIST_IN_LEN … /* MC_CMD_DYNAMIC_SENSORS_LIST_OUT msgresponse */ #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_LENMIN … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_LENMAX … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_LENMAX_MCDI2 … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_LEN(num) … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_NUM(len) … /* Generation count, which will be updated each time a sensor is added to or * removed from the MC sensor table. */ #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_GENERATION_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_GENERATION_LEN … /* Number of sensors managed by the MC. Note that in principle, this can be * larger than the size of the HANDLES array. */ #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_LEN … /* Array of sensor handles */ #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_OFST … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_LEN … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_MINNUM … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_MAXNUM … #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS * Get descriptions for a set of sensors, specified as an array of sensor * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST * * Any handles which do not correspond to a sensor currently managed by the MC * will be dropped from from the response. This may happen when a sensor table * update is in progress, and effectively means the set of usable sensors is * the intersection between the sets of sensors known to the driver and the MC. * * On Riverhead this command is implemented as a wrapper for * `get_descriptions` in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS … #undef MC_CMD_0x67_PRIVILEGE_CTG #define MC_CMD_0x67_PRIVILEGE_CTG … /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN msgrequest */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LENMIN … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LENMAX … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LENMAX_MCDI2 … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LEN(num) … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_NUM(len) … /* Array of sensor handles */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_OFST … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_LEN … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_MINNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_MAXNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_MAXNUM_MCDI2 … /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT msgresponse */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LENMIN … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LENMAX … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LENMAX_MCDI2 … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LEN(num) … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_NUM(len) … /* Array of MC_CMD_DYNAMIC_SENSORS_DESCRIPTION structures */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_OFST … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_LEN … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_MINNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_MAXNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS * Read the state and value for a set of sensors, specified as an array of * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. * * In the case of a broken sensor, then the state of the response's * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value * provided should be treated as erroneous. * * Any handles which do not correspond to a sensor currently managed by the MC * will be dropped from from the response. This may happen when a sensor table * update is in progress, and effectively means the set of usable sensors is * the intersection between the sets of sensors known to the driver and the MC. * * On Riverhead this command is implemented as a wrapper for `get_readings` * in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS … #undef MC_CMD_0x68_PRIVILEGE_CTG #define MC_CMD_0x68_PRIVILEGE_CTG … /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN msgrequest */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LENMIN … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LENMAX … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LENMAX_MCDI2 … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LEN(num) … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_NUM(len) … /* Array of sensor handles */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_OFST … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_LEN … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MINNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 … /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT msgresponse */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LENMIN … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LENMAX … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LENMAX_MCDI2 … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LEN(num) … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_NUM(len) … /* Array of MC_CMD_DYNAMIC_SENSORS_READING structures */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_OFST … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_LEN … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MINNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM … #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_EVENT_CTRL * Configure which categories of unsolicited events the driver expects to * receive (Riverhead). */ #define MC_CMD_EVENT_CTRL … #undef MC_CMD_0x69_PRIVILEGE_CTG #define MC_CMD_0x69_PRIVILEGE_CTG … /* MC_CMD_EVENT_CTRL_IN msgrequest */ #define MC_CMD_EVENT_CTRL_IN_LENMIN … #define MC_CMD_EVENT_CTRL_IN_LENMAX … #define MC_CMD_EVENT_CTRL_IN_LENMAX_MCDI2 … #define MC_CMD_EVENT_CTRL_IN_LEN(num) … #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) … /* Array of event categories for which the driver wishes to receive events. */ #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_OFST … #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN … #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MINNUM … #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM … #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM_MCDI2 … /* enum: Driver wishes to receive LINKCHANGE events. */ #define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_LINKCHANGE … /* enum: Driver wishes to receive SENSOR_CHANGE and SENSOR_STATE_CHANGE events. */ #define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_SENSOREVT … /* enum: Driver wishes to receive receive errors. */ #define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_RX_ERR … /* enum: Driver wishes to receive transmit errors. */ #define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_TX_ERR … /* enum: Driver wishes to receive firmware alerts. */ #define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_FWALERT … /* enum: Driver wishes to receive reboot events. */ #define MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_MC_REBOOT … /* MC_CMD_EVENT_CTRL_OUT msgrequest */ #define MC_CMD_EVENT_CTRL_OUT_LEN … /* EVB_PORT_ID structuredef */ #define EVB_PORT_ID_LEN … #define EVB_PORT_ID_PORT_ID_OFST … #define EVB_PORT_ID_PORT_ID_LEN … /* enum: An invalid port handle. */ #define EVB_PORT_ID_NULL … /* enum: The port assigned to this function.. */ #define EVB_PORT_ID_ASSIGNED … /* enum: External network port 0 */ #define EVB_PORT_ID_MAC0 … /* enum: External network port 1 */ #define EVB_PORT_ID_MAC1 … /* enum: External network port 2 */ #define EVB_PORT_ID_MAC2 … /* enum: External network port 3 */ #define EVB_PORT_ID_MAC3 … #define EVB_PORT_ID_PORT_ID_LBN … #define EVB_PORT_ID_PORT_ID_WIDTH … /* EVB_VLAN_TAG structuredef */ #define EVB_VLAN_TAG_LEN … /* The VLAN tag value */ #define EVB_VLAN_TAG_VLAN_ID_LBN … #define EVB_VLAN_TAG_VLAN_ID_WIDTH … #define EVB_VLAN_TAG_MODE_LBN … #define EVB_VLAN_TAG_MODE_WIDTH … /* enum: Insert the VLAN. */ #define EVB_VLAN_TAG_INSERT … /* enum: Replace the VLAN if already present. */ #define EVB_VLAN_TAG_REPLACE … /* BUFTBL_ENTRY structuredef */ #define BUFTBL_ENTRY_LEN … /* the owner ID */ #define BUFTBL_ENTRY_OID_OFST … #define BUFTBL_ENTRY_OID_LEN … #define BUFTBL_ENTRY_OID_LBN … #define BUFTBL_ENTRY_OID_WIDTH … /* the page parameter as one of ESE_DZ_SMC_PAGE_SIZE_ */ #define BUFTBL_ENTRY_PGSZ_OFST … #define BUFTBL_ENTRY_PGSZ_LEN … #define BUFTBL_ENTRY_PGSZ_LBN … #define BUFTBL_ENTRY_PGSZ_WIDTH … /* the raw 64-bit address field from the SMC, not adjusted for page size */ #define BUFTBL_ENTRY_RAWADDR_OFST … #define BUFTBL_ENTRY_RAWADDR_LEN … #define BUFTBL_ENTRY_RAWADDR_LO_OFST … #define BUFTBL_ENTRY_RAWADDR_HI_OFST … #define BUFTBL_ENTRY_RAWADDR_LBN … #define BUFTBL_ENTRY_RAWADDR_WIDTH … /* NVRAM_PARTITION_TYPE structuredef */ #define NVRAM_PARTITION_TYPE_LEN … #define NVRAM_PARTITION_TYPE_ID_OFST … #define NVRAM_PARTITION_TYPE_ID_LEN … /* enum: Primary MC firmware partition */ #define NVRAM_PARTITION_TYPE_MC_FIRMWARE … /* enum: Secondary MC firmware partition */ #define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP … /* enum: Expansion ROM partition */ #define NVRAM_PARTITION_TYPE_EXPANSION_ROM … /* enum: Static configuration TLV partition */ #define NVRAM_PARTITION_TYPE_STATIC_CONFIG … /* enum: Dynamic configuration TLV partition */ #define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG … /* enum: Expansion ROM configuration data for port 0 */ #define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 … /* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */ #define NVRAM_PARTITION_TYPE_EXPROM_CONFIG … /* enum: Expansion ROM configuration data for port 1 */ #define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT1 … /* enum: Expansion ROM configuration data for port 2 */ #define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT2 … /* enum: Expansion ROM configuration data for port 3 */ #define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 … /* enum: Non-volatile log output partition */ #define NVRAM_PARTITION_TYPE_LOG … /* enum: Non-volatile log output of second core on dual-core device */ #define NVRAM_PARTITION_TYPE_LOG_SLAVE … /* enum: Device state dump output partition */ #define NVRAM_PARTITION_TYPE_DUMP … /* enum: Application license key storage partition */ #define NVRAM_PARTITION_TYPE_LICENSE … /* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */ #define NVRAM_PARTITION_TYPE_PHY_MIN … /* enum: End of range used for PHY partitions (low 8 bits are the PHY ID) */ #define NVRAM_PARTITION_TYPE_PHY_MAX … /* enum: Primary FPGA partition */ #define NVRAM_PARTITION_TYPE_FPGA … /* enum: Secondary FPGA partition */ #define NVRAM_PARTITION_TYPE_FPGA_BACKUP … /* enum: FC firmware partition */ #define NVRAM_PARTITION_TYPE_FC_FIRMWARE … /* enum: FC License partition */ #define NVRAM_PARTITION_TYPE_FC_LICENSE … /* enum: Non-volatile log output partition for FC */ #define NVRAM_PARTITION_TYPE_FC_LOG … /* enum: MUM firmware partition */ #define NVRAM_PARTITION_TYPE_MUM_FIRMWARE … /* enum: SUC firmware partition (this is intentionally an alias of * MUM_FIRMWARE) */ #define NVRAM_PARTITION_TYPE_SUC_FIRMWARE … /* enum: MUM Non-volatile log output partition. */ #define NVRAM_PARTITION_TYPE_MUM_LOG … /* enum: MUM Application table partition. */ #define NVRAM_PARTITION_TYPE_MUM_APPTABLE … /* enum: MUM boot rom partition. */ #define NVRAM_PARTITION_TYPE_MUM_BOOT_ROM … /* enum: MUM production signatures & calibration rom partition. */ #define NVRAM_PARTITION_TYPE_MUM_PROD_ROM … /* enum: MUM user signatures & calibration rom partition. */ #define NVRAM_PARTITION_TYPE_MUM_USER_ROM … /* enum: MUM fuses and lockbits partition. */ #define NVRAM_PARTITION_TYPE_MUM_FUSELOCK … /* enum: UEFI expansion ROM if separate from PXE */ #define NVRAM_PARTITION_TYPE_EXPANSION_UEFI … /* enum: Used by the expansion ROM for logging */ #define NVRAM_PARTITION_TYPE_PXE_LOG … /* enum: Used for XIP code of shmbooted images */ #define NVRAM_PARTITION_TYPE_XIP_SCRATCH … /* enum: Spare partition 2 */ #define NVRAM_PARTITION_TYPE_SPARE_2 … /* enum: Manufacturing partition. Used during manufacture to pass information * between XJTAG and Manftest. */ #define NVRAM_PARTITION_TYPE_MANUFACTURING … /* enum: Spare partition 4 */ #define NVRAM_PARTITION_TYPE_SPARE_4 … /* enum: Spare partition 5 */ #define NVRAM_PARTITION_TYPE_SPARE_5 … /* enum: Partition for reporting MC status. See mc_flash_layout.h * medford_mc_status_hdr_t for layout on Medford. */ #define NVRAM_PARTITION_TYPE_STATUS … /* enum: Spare partition 13 */ #define NVRAM_PARTITION_TYPE_SPARE_13 … /* enum: Spare partition 14 */ #define NVRAM_PARTITION_TYPE_SPARE_14 … /* enum: Spare partition 15 */ #define NVRAM_PARTITION_TYPE_SPARE_15 … /* enum: Spare partition 16 */ #define NVRAM_PARTITION_TYPE_SPARE_16 … /* enum: Factory defaults for dynamic configuration */ #define NVRAM_PARTITION_TYPE_DYNCONFIG_DEFAULTS … /* enum: Factory defaults for expansion ROM configuration */ #define NVRAM_PARTITION_TYPE_ROMCONFIG_DEFAULTS … /* enum: Field Replaceable Unit inventory information for use on IPMI * platforms. See SF-119124-PS. The STATIC_CONFIG partition may contain a * subset of the information stored in this partition. */ #define NVRAM_PARTITION_TYPE_FRU_INFORMATION … /* enum: Bundle image partition */ #define NVRAM_PARTITION_TYPE_BUNDLE … /* enum: Bundle metadata partition that holds additional information related to * a bundle update in TLV format */ #define NVRAM_PARTITION_TYPE_BUNDLE_METADATA … /* enum: Bundle update non-volatile log output partition */ #define NVRAM_PARTITION_TYPE_BUNDLE_LOG … /* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */ #define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL … /* enum: Start of reserved value range (firmware may use for any purpose) */ #define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN … /* enum: End of reserved value range (firmware may use for any purpose) */ #define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX … /* enum: Recovery partition map (provided if real map is missing or corrupt) */ #define NVRAM_PARTITION_TYPE_RECOVERY_MAP … /* enum: Partition map (real map as stored in flash) */ #define NVRAM_PARTITION_TYPE_PARTITION_MAP … #define NVRAM_PARTITION_TYPE_ID_LBN … #define NVRAM_PARTITION_TYPE_ID_WIDTH … /* LICENSED_APP_ID structuredef */ #define LICENSED_APP_ID_LEN … #define LICENSED_APP_ID_ID_OFST … #define LICENSED_APP_ID_ID_LEN … /* enum: OpenOnload */ #define LICENSED_APP_ID_ONLOAD … /* enum: PTP timestamping */ #define LICENSED_APP_ID_PTP … /* enum: SolarCapture Pro */ #define LICENSED_APP_ID_SOLARCAPTURE_PRO … /* enum: SolarSecure filter engine */ #define LICENSED_APP_ID_SOLARSECURE … /* enum: Performance monitor */ #define LICENSED_APP_ID_PERF_MONITOR … /* enum: SolarCapture Live */ #define LICENSED_APP_ID_SOLARCAPTURE_LIVE … /* enum: Capture SolarSystem */ #define LICENSED_APP_ID_CAPTURE_SOLARSYSTEM … /* enum: Network Access Control */ #define LICENSED_APP_ID_NETWORK_ACCESS_CONTROL … /* enum: TCP Direct */ #define LICENSED_APP_ID_TCP_DIRECT … /* enum: Low Latency */ #define LICENSED_APP_ID_LOW_LATENCY … /* enum: SolarCapture Tap */ #define LICENSED_APP_ID_SOLARCAPTURE_TAP … /* enum: Capture SolarSystem 40G */ #define LICENSED_APP_ID_CAPTURE_SOLARSYSTEM_40G … /* enum: Capture SolarSystem 1G */ #define LICENSED_APP_ID_CAPTURE_SOLARSYSTEM_1G … /* enum: ScaleOut Onload */ #define LICENSED_APP_ID_SCALEOUT_ONLOAD … /* enum: SCS Network Analytics Dashboard */ #define LICENSED_APP_ID_DSHBRD … /* enum: SolarCapture Trading Analytics */ #define LICENSED_APP_ID_SCATRD … #define LICENSED_APP_ID_ID_LBN … #define LICENSED_APP_ID_ID_WIDTH … /* LICENSED_FEATURES structuredef */ #define LICENSED_FEATURES_LEN … /* Bitmask of licensed firmware features */ #define LICENSED_FEATURES_MASK_OFST … #define LICENSED_FEATURES_MASK_LEN … #define LICENSED_FEATURES_MASK_LO_OFST … #define LICENSED_FEATURES_MASK_HI_OFST … #define LICENSED_FEATURES_RX_CUT_THROUGH_OFST … #define LICENSED_FEATURES_RX_CUT_THROUGH_LBN … #define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH … #define LICENSED_FEATURES_PIO_OFST … #define LICENSED_FEATURES_PIO_LBN … #define LICENSED_FEATURES_PIO_WIDTH … #define LICENSED_FEATURES_EVQ_TIMER_OFST … #define LICENSED_FEATURES_EVQ_TIMER_LBN … #define LICENSED_FEATURES_EVQ_TIMER_WIDTH … #define LICENSED_FEATURES_CLOCK_OFST … #define LICENSED_FEATURES_CLOCK_LBN … #define LICENSED_FEATURES_CLOCK_WIDTH … #define LICENSED_FEATURES_RX_TIMESTAMPS_OFST … #define LICENSED_FEATURES_RX_TIMESTAMPS_LBN … #define LICENSED_FEATURES_RX_TIMESTAMPS_WIDTH … #define LICENSED_FEATURES_TX_TIMESTAMPS_OFST … #define LICENSED_FEATURES_TX_TIMESTAMPS_LBN … #define LICENSED_FEATURES_TX_TIMESTAMPS_WIDTH … #define LICENSED_FEATURES_RX_SNIFF_OFST … #define LICENSED_FEATURES_RX_SNIFF_LBN … #define LICENSED_FEATURES_RX_SNIFF_WIDTH … #define LICENSED_FEATURES_TX_SNIFF_OFST … #define LICENSED_FEATURES_TX_SNIFF_LBN … #define LICENSED_FEATURES_TX_SNIFF_WIDTH … #define LICENSED_FEATURES_PROXY_FILTER_OPS_OFST … #define LICENSED_FEATURES_PROXY_FILTER_OPS_LBN … #define LICENSED_FEATURES_PROXY_FILTER_OPS_WIDTH … #define LICENSED_FEATURES_EVENT_CUT_THROUGH_OFST … #define LICENSED_FEATURES_EVENT_CUT_THROUGH_LBN … #define LICENSED_FEATURES_EVENT_CUT_THROUGH_WIDTH … #define LICENSED_FEATURES_MASK_LBN … #define LICENSED_FEATURES_MASK_WIDTH … /* LICENSED_V3_APPS structuredef */ #define LICENSED_V3_APPS_LEN … /* Bitmask of licensed applications */ #define LICENSED_V3_APPS_MASK_OFST … #define LICENSED_V3_APPS_MASK_LEN … #define LICENSED_V3_APPS_MASK_LO_OFST … #define LICENSED_V3_APPS_MASK_HI_OFST … #define LICENSED_V3_APPS_ONLOAD_OFST … #define LICENSED_V3_APPS_ONLOAD_LBN … #define LICENSED_V3_APPS_ONLOAD_WIDTH … #define LICENSED_V3_APPS_PTP_OFST … #define LICENSED_V3_APPS_PTP_LBN … #define LICENSED_V3_APPS_PTP_WIDTH … #define LICENSED_V3_APPS_SOLARCAPTURE_PRO_OFST … #define LICENSED_V3_APPS_SOLARCAPTURE_PRO_LBN … #define LICENSED_V3_APPS_SOLARCAPTURE_PRO_WIDTH … #define LICENSED_V3_APPS_SOLARSECURE_OFST … #define LICENSED_V3_APPS_SOLARSECURE_LBN … #define LICENSED_V3_APPS_SOLARSECURE_WIDTH … #define LICENSED_V3_APPS_PERF_MONITOR_OFST … #define LICENSED_V3_APPS_PERF_MONITOR_LBN … #define LICENSED_V3_APPS_PERF_MONITOR_WIDTH … #define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_OFST … #define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_LBN … #define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_WIDTH … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_OFST … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_LBN … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_WIDTH … #define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_OFST … #define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_LBN … #define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_WIDTH … #define LICENSED_V3_APPS_TCP_DIRECT_OFST … #define LICENSED_V3_APPS_TCP_DIRECT_LBN … #define LICENSED_V3_APPS_TCP_DIRECT_WIDTH … #define LICENSED_V3_APPS_LOW_LATENCY_OFST … #define LICENSED_V3_APPS_LOW_LATENCY_LBN … #define LICENSED_V3_APPS_LOW_LATENCY_WIDTH … #define LICENSED_V3_APPS_SOLARCAPTURE_TAP_OFST … #define LICENSED_V3_APPS_SOLARCAPTURE_TAP_LBN … #define LICENSED_V3_APPS_SOLARCAPTURE_TAP_WIDTH … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_OFST … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_LBN … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_WIDTH … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_OFST … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_LBN … #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_WIDTH … #define LICENSED_V3_APPS_SCALEOUT_ONLOAD_OFST … #define LICENSED_V3_APPS_SCALEOUT_ONLOAD_LBN … #define LICENSED_V3_APPS_SCALEOUT_ONLOAD_WIDTH … #define LICENSED_V3_APPS_DSHBRD_OFST … #define LICENSED_V3_APPS_DSHBRD_LBN … #define LICENSED_V3_APPS_DSHBRD_WIDTH … #define LICENSED_V3_APPS_SCATRD_OFST … #define LICENSED_V3_APPS_SCATRD_LBN … #define LICENSED_V3_APPS_SCATRD_WIDTH … #define LICENSED_V3_APPS_MASK_LBN … #define LICENSED_V3_APPS_MASK_WIDTH … /* LICENSED_V3_FEATURES structuredef */ #define LICENSED_V3_FEATURES_LEN … /* Bitmask of licensed firmware features */ #define LICENSED_V3_FEATURES_MASK_OFST … #define LICENSED_V3_FEATURES_MASK_LEN … #define LICENSED_V3_FEATURES_MASK_LO_OFST … #define LICENSED_V3_FEATURES_MASK_HI_OFST … #define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST … #define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN … #define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH … #define LICENSED_V3_FEATURES_PIO_OFST … #define LICENSED_V3_FEATURES_PIO_LBN … #define LICENSED_V3_FEATURES_PIO_WIDTH … #define LICENSED_V3_FEATURES_EVQ_TIMER_OFST … #define LICENSED_V3_FEATURES_EVQ_TIMER_LBN … #define LICENSED_V3_FEATURES_EVQ_TIMER_WIDTH … #define LICENSED_V3_FEATURES_CLOCK_OFST … #define LICENSED_V3_FEATURES_CLOCK_LBN … #define LICENSED_V3_FEATURES_CLOCK_WIDTH … #define LICENSED_V3_FEATURES_RX_TIMESTAMPS_OFST … #define LICENSED_V3_FEATURES_RX_TIMESTAMPS_LBN … #define LICENSED_V3_FEATURES_RX_TIMESTAMPS_WIDTH … #define LICENSED_V3_FEATURES_TX_TIMESTAMPS_OFST … #define LICENSED_V3_FEATURES_TX_TIMESTAMPS_LBN … #define LICENSED_V3_FEATURES_TX_TIMESTAMPS_WIDTH … #define LICENSED_V3_FEATURES_RX_SNIFF_OFST … #define LICENSED_V3_FEATURES_RX_SNIFF_LBN … #define LICENSED_V3_FEATURES_RX_SNIFF_WIDTH … #define LICENSED_V3_FEATURES_TX_SNIFF_OFST … #define LICENSED_V3_FEATURES_TX_SNIFF_LBN … #define LICENSED_V3_FEATURES_TX_SNIFF_WIDTH … #define LICENSED_V3_FEATURES_PROXY_FILTER_OPS_OFST … #define LICENSED_V3_FEATURES_PROXY_FILTER_OPS_LBN … #define LICENSED_V3_FEATURES_PROXY_FILTER_OPS_WIDTH … #define LICENSED_V3_FEATURES_EVENT_CUT_THROUGH_OFST … #define LICENSED_V3_FEATURES_EVENT_CUT_THROUGH_LBN … #define LICENSED_V3_FEATURES_EVENT_CUT_THROUGH_WIDTH … #define LICENSED_V3_FEATURES_MASK_LBN … #define LICENSED_V3_FEATURES_MASK_WIDTH … /* TX_TIMESTAMP_EVENT structuredef */ #define TX_TIMESTAMP_EVENT_LEN … /* lower 16 bits of timestamp data */ #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_OFST … #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_LEN … #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_LBN … #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_WIDTH … /* Type of TX event, ordinary TX completion, low or high part of TX timestamp */ #define TX_TIMESTAMP_EVENT_TX_EV_TYPE_OFST … #define TX_TIMESTAMP_EVENT_TX_EV_TYPE_LEN … /* enum: This is a TX completion event, not a timestamp */ #define TX_TIMESTAMP_EVENT_TX_EV_COMPLETION … /* enum: This is a TX completion event for a CTPIO transmit. The event format * is the same as for TX_EV_COMPLETION. */ #define TX_TIMESTAMP_EVENT_TX_EV_CTPIO_COMPLETION … /* enum: This is the low part of a TX timestamp for a CTPIO transmission. The * event format is the same as for TX_EV_TSTAMP_LO */ #define TX_TIMESTAMP_EVENT_TX_EV_CTPIO_TS_LO … /* enum: This is the high part of a TX timestamp for a CTPIO transmission. The * event format is the same as for TX_EV_TSTAMP_HI */ #define TX_TIMESTAMP_EVENT_TX_EV_CTPIO_TS_HI … /* enum: This is the low part of a TX timestamp event */ #define TX_TIMESTAMP_EVENT_TX_EV_TSTAMP_LO … /* enum: This is the high part of a TX timestamp event */ #define TX_TIMESTAMP_EVENT_TX_EV_TSTAMP_HI … #define TX_TIMESTAMP_EVENT_TX_EV_TYPE_LBN … #define TX_TIMESTAMP_EVENT_TX_EV_TYPE_WIDTH … /* upper 16 bits of timestamp data */ #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_OFST … #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_LEN … #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_LBN … #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_WIDTH … /* RSS_MODE structuredef */ #define RSS_MODE_LEN … /* The RSS mode for a particular packet type is a value from 0 - 15 which can * be considered as 4 bits selecting which fields are included in the hash. (A * value 0 effectively disables RSS spreading for the packet type.) The YAML * generation tools require this structure to be a whole number of bytes wide, * but only 4 bits are relevant. */ #define RSS_MODE_HASH_SELECTOR_OFST … #define RSS_MODE_HASH_SELECTOR_LEN … #define RSS_MODE_HASH_SRC_ADDR_OFST … #define RSS_MODE_HASH_SRC_ADDR_LBN … #define RSS_MODE_HASH_SRC_ADDR_WIDTH … #define RSS_MODE_HASH_DST_ADDR_OFST … #define RSS_MODE_HASH_DST_ADDR_LBN … #define RSS_MODE_HASH_DST_ADDR_WIDTH … #define RSS_MODE_HASH_SRC_PORT_OFST … #define RSS_MODE_HASH_SRC_PORT_LBN … #define RSS_MODE_HASH_SRC_PORT_WIDTH … #define RSS_MODE_HASH_DST_PORT_OFST … #define RSS_MODE_HASH_DST_PORT_LBN … #define RSS_MODE_HASH_DST_PORT_WIDTH … #define RSS_MODE_HASH_SELECTOR_LBN … #define RSS_MODE_HASH_SELECTOR_WIDTH … /* CTPIO_STATS_MAP structuredef */ #define CTPIO_STATS_MAP_LEN … /* The (function relative) VI number */ #define CTPIO_STATS_MAP_VI_OFST … #define CTPIO_STATS_MAP_VI_LEN … #define CTPIO_STATS_MAP_VI_LBN … #define CTPIO_STATS_MAP_VI_WIDTH … /* The target bucket for the VI */ #define CTPIO_STATS_MAP_BUCKET_OFST … #define CTPIO_STATS_MAP_BUCKET_LEN … #define CTPIO_STATS_MAP_BUCKET_LBN … #define CTPIO_STATS_MAP_BUCKET_WIDTH … /***********************************/ /* MC_CMD_READ_REGS * Get a dump of the MCPU registers */ #define MC_CMD_READ_REGS … #undef MC_CMD_0x50_PRIVILEGE_CTG #define MC_CMD_0x50_PRIVILEGE_CTG … /* MC_CMD_READ_REGS_IN msgrequest */ #define MC_CMD_READ_REGS_IN_LEN … /* MC_CMD_READ_REGS_OUT msgresponse */ #define MC_CMD_READ_REGS_OUT_LEN … /* Whether the corresponding register entry contains a valid value */ #define MC_CMD_READ_REGS_OUT_MASK_OFST … #define MC_CMD_READ_REGS_OUT_MASK_LEN … /* Same order as MIPS GDB (r0-r31, sr, lo, hi, bad, cause, 32 x float, fsr, * fir, fp) */ #define MC_CMD_READ_REGS_OUT_REGS_OFST … #define MC_CMD_READ_REGS_OUT_REGS_LEN … #define MC_CMD_READ_REGS_OUT_REGS_NUM … /***********************************/ /* MC_CMD_INIT_EVQ * Set up an event queue according to the supplied parameters. The IN arguments * end with an address for each 4k of host memory required to back the EVQ. */ #define MC_CMD_INIT_EVQ … #undef MC_CMD_0x80_PRIVILEGE_CTG #define MC_CMD_0x80_PRIVILEGE_CTG … /* MC_CMD_INIT_EVQ_IN msgrequest */ #define MC_CMD_INIT_EVQ_IN_LENMIN … #define MC_CMD_INIT_EVQ_IN_LENMAX … #define MC_CMD_INIT_EVQ_IN_LENMAX_MCDI2 … #define MC_CMD_INIT_EVQ_IN_LEN(num) … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_NUM(len) … /* Size, in entries */ #define MC_CMD_INIT_EVQ_IN_SIZE_OFST … #define MC_CMD_INIT_EVQ_IN_SIZE_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST … #define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN … /* The initial timer value. The load value is ignored if the timer mode is DIS. */ #define MC_CMD_INIT_EVQ_IN_TMR_LOAD_OFST … #define MC_CMD_INIT_EVQ_IN_TMR_LOAD_LEN … /* The reload value is ignored in one-shot modes */ #define MC_CMD_INIT_EVQ_IN_TMR_RELOAD_OFST … #define MC_CMD_INIT_EVQ_IN_TMR_RELOAD_LEN … /* tbd */ #define MC_CMD_INIT_EVQ_IN_FLAGS_OFST … #define MC_CMD_INIT_EVQ_IN_FLAGS_LEN … #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_WIDTH … #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_WIDTH … #define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_WIDTH … #define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_WIDTH … #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_WIDTH … #define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_WIDTH … #define MC_CMD_INIT_EVQ_IN_FLAG_USE_TIMER_OFST … #define MC_CMD_INIT_EVQ_IN_FLAG_USE_TIMER_LBN … #define MC_CMD_INIT_EVQ_IN_FLAG_USE_TIMER_WIDTH … #define MC_CMD_INIT_EVQ_IN_TMR_MODE_OFST … #define MC_CMD_INIT_EVQ_IN_TMR_MODE_LEN … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS … /* enum: Immediate */ #define MC_CMD_INIT_EVQ_IN_TMR_IMMED_START … /* enum: Triggered */ #define MC_CMD_INIT_EVQ_IN_TMR_TRIG_START … /* enum: Hold-off */ #define MC_CMD_INIT_EVQ_IN_TMR_INT_HLDOFF … /* Target EVQ for wakeups if in wakeup mode. */ #define MC_CMD_INIT_EVQ_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_EVQ_IN_TARGET_EVQ_LEN … /* Target interrupt if in interrupting mode (note union with target EVQ). Use * MC_CMD_RESOURCE_INSTANCE_ANY unless a specific one required for test * purposes. */ #define MC_CMD_INIT_EVQ_IN_IRQ_NUM_OFST … #define MC_CMD_INIT_EVQ_IN_IRQ_NUM_LEN … /* Event Counter Mode. */ #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_OFST … #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_LEN … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_DIS … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_RX … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_TX … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_RXTX … /* Event queue packet count threshold. */ #define MC_CMD_INIT_EVQ_IN_COUNT_THRSHLD_OFST … #define MC_CMD_INIT_EVQ_IN_COUNT_THRSHLD_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM … #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 … /* MC_CMD_INIT_EVQ_OUT msgresponse */ #define MC_CMD_INIT_EVQ_OUT_LEN … /* Only valid if INTRFLAG was true */ #define MC_CMD_INIT_EVQ_OUT_IRQ_OFST … #define MC_CMD_INIT_EVQ_OUT_IRQ_LEN … /* MC_CMD_INIT_EVQ_V2_IN msgrequest */ #define MC_CMD_INIT_EVQ_V2_IN_LENMIN … #define MC_CMD_INIT_EVQ_V2_IN_LENMAX … #define MC_CMD_INIT_EVQ_V2_IN_LENMAX_MCDI2 … #define MC_CMD_INIT_EVQ_V2_IN_LEN(num) … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_NUM(len) … /* Size, in entries */ #define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN … /* The initial timer value. The load value is ignored if the timer mode is DIS. */ #define MC_CMD_INIT_EVQ_V2_IN_TMR_LOAD_OFST … #define MC_CMD_INIT_EVQ_V2_IN_TMR_LOAD_LEN … /* The reload value is ignored in one-shot modes */ #define MC_CMD_INIT_EVQ_V2_IN_TMR_RELOAD_OFST … #define MC_CMD_INIT_EVQ_V2_IN_TMR_RELOAD_LEN … /* tbd */ #define MC_CMD_INIT_EVQ_V2_IN_FLAGS_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAGS_LEN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INTERRUPTING_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INTERRUPTING_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INTERRUPTING_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INT_ARMD_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INT_ARMD_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INT_ARMD_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_CUT_THRU_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_CUT_THRU_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_CUT_THRU_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TX_MERGE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TX_MERGE_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TX_MERGE_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_USE_TIMER_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_USE_TIMER_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_USE_TIMER_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_WIDTH … /* enum: All initialisation flags specified by host. */ #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_MANUAL … /* enum: MEDFORD only. Certain initialisation flags specified by host may be * over-ridden by firmware based on licenses and firmware variant in order to * provide the lowest latency achievable. See * MC_CMD_INIT_EVQ_V2/MC_CMD_INIT_EVQ_V2_OUT/FLAGS for list of affected flags. */ #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_LOW_LATENCY … /* enum: MEDFORD only. Certain initialisation flags specified by host may be * over-ridden by firmware based on licenses and firmware variant in order to * provide the best throughput achievable. See * MC_CMD_INIT_EVQ_V2/MC_CMD_INIT_EVQ_V2_OUT/FLAGS for list of affected flags. */ #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_THROUGHPUT … /* enum: MEDFORD only. Certain initialisation flags may be over-ridden by * firmware based on licenses and firmware variant. See * MC_CMD_INIT_EVQ_V2/MC_CMD_INIT_EVQ_V2_OUT/FLAGS for list of affected flags. */ #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_AUTO … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_EXT_WIDTH_OFST … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_EXT_WIDTH_LBN … #define MC_CMD_INIT_EVQ_V2_IN_FLAG_EXT_WIDTH_WIDTH … #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_LEN … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_DIS … /* enum: Immediate */ #define MC_CMD_INIT_EVQ_V2_IN_TMR_IMMED_START … /* enum: Triggered */ #define MC_CMD_INIT_EVQ_V2_IN_TMR_TRIG_START … /* enum: Hold-off */ #define MC_CMD_INIT_EVQ_V2_IN_TMR_INT_HLDOFF … /* Target EVQ for wakeups if in wakeup mode. */ #define MC_CMD_INIT_EVQ_V2_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_EVQ_V2_IN_TARGET_EVQ_LEN … /* Target interrupt if in interrupting mode (note union with target EVQ). Use * MC_CMD_RESOURCE_INSTANCE_ANY unless a specific one required for test * purposes. */ #define MC_CMD_INIT_EVQ_V2_IN_IRQ_NUM_OFST … #define MC_CMD_INIT_EVQ_V2_IN_IRQ_NUM_LEN … /* Event Counter Mode. */ #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_OFST … #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_LEN … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_DIS … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_RX … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_TX … /* enum: Disabled */ #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_RXTX … /* Event queue packet count threshold. */ #define MC_CMD_INIT_EVQ_V2_IN_COUNT_THRSHLD_OFST … #define MC_CMD_INIT_EVQ_V2_IN_COUNT_THRSHLD_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM … #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 … /* MC_CMD_INIT_EVQ_V2_OUT msgresponse */ #define MC_CMD_INIT_EVQ_V2_OUT_LEN … /* Only valid if INTRFLAG was true */ #define MC_CMD_INIT_EVQ_V2_OUT_IRQ_OFST … #define MC_CMD_INIT_EVQ_V2_OUT_IRQ_LEN … /* Actual configuration applied on the card */ #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_OFST … #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_LEN … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_OFST … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_LBN … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_WIDTH … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_OFST … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_LBN … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_WIDTH … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_OFST … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_LBN … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_WIDTH … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_OFST … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_LBN … #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_WIDTH … /* QUEUE_CRC_MODE structuredef */ #define QUEUE_CRC_MODE_LEN … #define QUEUE_CRC_MODE_MODE_LBN … #define QUEUE_CRC_MODE_MODE_WIDTH … /* enum: No CRC. */ #define QUEUE_CRC_MODE_NONE … /* enum: CRC Fiber channel over ethernet. */ #define QUEUE_CRC_MODE_FCOE … /* enum: CRC (digest) iSCSI header only. */ #define QUEUE_CRC_MODE_ISCSI_HDR … /* enum: CRC (digest) iSCSI header and payload. */ #define QUEUE_CRC_MODE_ISCSI … /* enum: CRC Fiber channel over IP over ethernet. */ #define QUEUE_CRC_MODE_FCOIPOE … /* enum: CRC MPA. */ #define QUEUE_CRC_MODE_MPA … #define QUEUE_CRC_MODE_SPARE_LBN … #define QUEUE_CRC_MODE_SPARE_WIDTH … /***********************************/ /* MC_CMD_INIT_RXQ * set up a receive queue according to the supplied parameters. The IN * arguments end with an address for each 4k of host memory required to back * the RXQ. */ #define MC_CMD_INIT_RXQ … #undef MC_CMD_0x81_PRIVILEGE_CTG #define MC_CMD_0x81_PRIVILEGE_CTG … /* MC_CMD_INIT_RXQ_IN msgrequest: Legacy RXQ_INIT request. Use extended version * in new code. */ #define MC_CMD_INIT_RXQ_IN_LENMIN … #define MC_CMD_INIT_RXQ_IN_LENMAX … #define MC_CMD_INIT_RXQ_IN_LENMAX_MCDI2 … #define MC_CMD_INIT_RXQ_IN_LEN(num) … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_NUM(len) … /* Size, in entries */ #define MC_CMD_INIT_RXQ_IN_SIZE_OFST … #define MC_CMD_INIT_RXQ_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to INIT_EVQ */ #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. */ #define MC_CMD_INIT_RXQ_IN_LABEL_OFST … #define MC_CMD_INIT_RXQ_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST … #define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_RXQ_IN_FLAGS_OFST … #define MC_CMD_INIT_RXQ_IN_FLAGS_LEN … #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_OFST … #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_LBN … #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_WIDTH … #define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_RXQ_IN_CRC_MODE_OFST … #define MC_CMD_INIT_RXQ_IN_CRC_MODE_LBN … #define MC_CMD_INIT_RXQ_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_OFST … #define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_LBN … #define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_WIDTH … #define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_OFST … #define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_LBN … #define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_WIDTH … #define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_OFST … #define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_LBN … #define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_WIDTH … #define MC_CMD_INIT_RXQ_IN_UNUSED_OFST … #define MC_CMD_INIT_RXQ_IN_UNUSED_LBN … #define MC_CMD_INIT_RXQ_IN_UNUSED_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_IN_OWNER_ID_OFST … #define MC_CMD_INIT_RXQ_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_RXQ_IN_PORT_ID_OFST … #define MC_CMD_INIT_RXQ_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM … #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 … /* MC_CMD_INIT_RXQ_EXT_IN msgrequest: Extended RXQ_INIT with additional mode * flags */ #define MC_CMD_INIT_RXQ_EXT_IN_LEN … /* Size, in entries */ #define MC_CMD_INIT_RXQ_EXT_IN_SIZE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to * INIT_EVQ. If DMA_MODE == PACKED_STREAM this must be equal to INSTANCE. */ #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. * This field is ignored if DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER or DMA_MODE * == PACKED_STREAM. */ #define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_RXQ_EXT_IN_FLAGS_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAGS_LEN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_WIDTH … /* enum: One packet per descriptor (for normal networking) */ #define MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET … /* enum: Pack multiple packets into large descriptors (for SolarCapture) */ #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM … /* enum: Pack multiple packets into large descriptors using the format designed * to maximise packet rate. This mode uses 1 "bucket" per descriptor with * multiple fixed-size packet buffers within each bucket. For a full * description see SF-119419-TC. This mode is only supported by "dpdk" datapath * firmware. */ #define MC_CMD_INIT_RXQ_EXT_IN_EQUAL_STRIDE_SUPER_BUFFER … /* enum: Deprecated name for EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_EXT_IN_EQUAL_STRIDE_PACKED_STREAM … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M … #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K … #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K … #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K … #define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_WIDTH … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_LBN … #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_RXQ_EXT_IN_PORT_ID_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM … /* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */ #define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST … #define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_LEN … /* MC_CMD_INIT_RXQ_V3_IN msgrequest */ #define MC_CMD_INIT_RXQ_V3_IN_LEN … /* Size, in entries */ #define MC_CMD_INIT_RXQ_V3_IN_SIZE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to * INIT_EVQ. If DMA_MODE == PACKED_STREAM this must be equal to INSTANCE. */ #define MC_CMD_INIT_RXQ_V3_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_RXQ_V3_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. * This field is ignored if DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER or DMA_MODE * == PACKED_STREAM. */ #define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST … #define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_RXQ_V3_IN_FLAGS_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAGS_LEN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_HDR_SPLIT_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_HDR_SPLIT_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_HDR_SPLIT_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_CRC_MODE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_CRC_MODE_LBN … #define MC_CMD_INIT_RXQ_V3_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_CHAIN_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_CHAIN_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_CHAIN_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_PREFIX_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_PREFIX_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_PREFIX_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_DISABLE_SCATTER_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_DISABLE_SCATTER_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_DISABLE_SCATTER_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_DMA_MODE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_DMA_MODE_LBN … #define MC_CMD_INIT_RXQ_V3_IN_DMA_MODE_WIDTH … /* enum: One packet per descriptor (for normal networking) */ #define MC_CMD_INIT_RXQ_V3_IN_SINGLE_PACKET … /* enum: Pack multiple packets into large descriptors (for SolarCapture) */ #define MC_CMD_INIT_RXQ_V3_IN_PACKED_STREAM … /* enum: Pack multiple packets into large descriptors using the format designed * to maximise packet rate. This mode uses 1 "bucket" per descriptor with * multiple fixed-size packet buffers within each bucket. For a full * description see SF-119419-TC. This mode is only supported by "dpdk" datapath * firmware. */ #define MC_CMD_INIT_RXQ_V3_IN_EQUAL_STRIDE_SUPER_BUFFER … /* enum: Deprecated name for EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V3_IN_EQUAL_STRIDE_PACKED_STREAM … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_SNAPSHOT_MODE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_SNAPSHOT_MODE_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_SNAPSHOT_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_PACKED_STREAM_BUFF_SIZE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_PACKED_STREAM_BUFF_SIZE_LBN … #define MC_CMD_INIT_RXQ_V3_IN_PACKED_STREAM_BUFF_SIZE_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_PS_BUFF_1M … #define MC_CMD_INIT_RXQ_V3_IN_PS_BUFF_512K … #define MC_CMD_INIT_RXQ_V3_IN_PS_BUFF_256K … #define MC_CMD_INIT_RXQ_V3_IN_PS_BUFF_128K … #define MC_CMD_INIT_RXQ_V3_IN_PS_BUFF_64K … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_WANT_OUTER_CLASSES_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_WANT_OUTER_CLASSES_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_WANT_OUTER_CLASSES_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_FORCE_EV_MERGING_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_FORCE_EV_MERGING_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_FORCE_EV_MERGING_WIDTH … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_OFST … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_LBN … #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_OFST … #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_RXQ_V3_IN_PORT_ID_OFST … #define MC_CMD_INIT_RXQ_V3_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM … /* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */ #define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST … #define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_LEN … /* The number of packet buffers that will be contained within each * EQUAL_STRIDE_SUPER_BUFFER format bucket supplied by the driver. This field * is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET_OFST … #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN … /* The length in bytes of the area in each packet buffer that can be written to * by the adapter. This is used to store the packet prefix and the packet * payload. This length does not include any end padding added by the driver. * This field is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V3_IN_ES_MAX_DMA_LEN_OFST … #define MC_CMD_INIT_RXQ_V3_IN_ES_MAX_DMA_LEN_LEN … /* The length in bytes of a single packet buffer within a * EQUAL_STRIDE_SUPER_BUFFER format bucket. This field is ignored unless * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_STRIDE_OFST … #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_STRIDE_LEN … /* The maximum time in nanoseconds that the datapath will be backpressured if * there are no RX descriptors available. If the timeout is reached and there * are still no descriptors then the packet will be dropped. A timeout of 0 * means the datapath will never be blocked. This field is ignored unless * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_OFST … #define MC_CMD_INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN … /* MC_CMD_INIT_RXQ_V4_IN msgrequest: INIT_RXQ request with new field required * for systems with a QDMA (currently, Riverhead) */ #define MC_CMD_INIT_RXQ_V4_IN_LEN … /* Size, in entries */ #define MC_CMD_INIT_RXQ_V4_IN_SIZE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to * INIT_EVQ. If DMA_MODE == PACKED_STREAM this must be equal to INSTANCE. */ #define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. * This field is ignored if DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER or DMA_MODE * == PACKED_STREAM. */ #define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST … #define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_RXQ_V4_IN_FLAGS_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAGS_LEN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_LBN … #define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_CHAIN_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_CHAIN_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_CHAIN_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_PREFIX_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_PREFIX_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_PREFIX_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_DISABLE_SCATTER_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_DISABLE_SCATTER_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_DISABLE_SCATTER_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_LBN … #define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_WIDTH … /* enum: One packet per descriptor (for normal networking) */ #define MC_CMD_INIT_RXQ_V4_IN_SINGLE_PACKET … /* enum: Pack multiple packets into large descriptors (for SolarCapture) */ #define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM … /* enum: Pack multiple packets into large descriptors using the format designed * to maximise packet rate. This mode uses 1 "bucket" per descriptor with * multiple fixed-size packet buffers within each bucket. For a full * description see SF-119419-TC. This mode is only supported by "dpdk" datapath * firmware. */ #define MC_CMD_INIT_RXQ_V4_IN_EQUAL_STRIDE_SUPER_BUFFER … /* enum: Deprecated name for EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V4_IN_EQUAL_STRIDE_PACKED_STREAM … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_SNAPSHOT_MODE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_SNAPSHOT_MODE_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_SNAPSHOT_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM_BUFF_SIZE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM_BUFF_SIZE_LBN … #define MC_CMD_INIT_RXQ_V4_IN_PACKED_STREAM_BUFF_SIZE_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_1M … #define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_512K … #define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_256K … #define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_128K … #define MC_CMD_INIT_RXQ_V4_IN_PS_BUFF_64K … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_WANT_OUTER_CLASSES_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_WANT_OUTER_CLASSES_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_WANT_OUTER_CLASSES_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_FORCE_EV_MERGING_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_FORCE_EV_MERGING_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_FORCE_EV_MERGING_WIDTH … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_OFST … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_LBN … #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_OFST … #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_RXQ_V4_IN_PORT_ID_OFST … #define MC_CMD_INIT_RXQ_V4_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM … /* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */ #define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST … #define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_LEN … /* The number of packet buffers that will be contained within each * EQUAL_STRIDE_SUPER_BUFFER format bucket supplied by the driver. This field * is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_BUFFERS_PER_BUCKET_OFST … #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN … /* The length in bytes of the area in each packet buffer that can be written to * by the adapter. This is used to store the packet prefix and the packet * payload. This length does not include any end padding added by the driver. * This field is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V4_IN_ES_MAX_DMA_LEN_OFST … #define MC_CMD_INIT_RXQ_V4_IN_ES_MAX_DMA_LEN_LEN … /* The length in bytes of a single packet buffer within a * EQUAL_STRIDE_SUPER_BUFFER format bucket. This field is ignored unless * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_STRIDE_OFST … #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_STRIDE_LEN … /* The maximum time in nanoseconds that the datapath will be backpressured if * there are no RX descriptors available. If the timeout is reached and there * are still no descriptors then the packet will be dropped. A timeout of 0 * means the datapath will never be blocked. This field is ignored unless * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V4_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_OFST … #define MC_CMD_INIT_RXQ_V4_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN … /* V4 message data */ #define MC_CMD_INIT_RXQ_V4_IN_V4_DATA_OFST … #define MC_CMD_INIT_RXQ_V4_IN_V4_DATA_LEN … /* Size in bytes of buffers attached to descriptors posted to this queue. Set * to zero if using this message on non-QDMA based platforms. Currently in * Riverhead there is a global limit of eight different buffer sizes across all * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a * request for a different buffer size will fail if there are already eight * other buffer sizes in use. In future Riverhead this limit will go away and * any size will be accepted. */ #define MC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_OFST … #define MC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_LEN … /* MC_CMD_INIT_RXQ_V5_IN msgrequest: INIT_RXQ request with ability to request a * different RX packet prefix */ #define MC_CMD_INIT_RXQ_V5_IN_LEN … /* Size, in entries */ #define MC_CMD_INIT_RXQ_V5_IN_SIZE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to * INIT_EVQ. If DMA_MODE == PACKED_STREAM this must be equal to INSTANCE. */ #define MC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. * This field is ignored if DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER or DMA_MODE * == PACKED_STREAM. */ #define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST … #define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_RXQ_V5_IN_FLAGS_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAGS_LEN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_CRC_MODE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_CRC_MODE_LBN … #define MC_CMD_INIT_RXQ_V5_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_CHAIN_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_CHAIN_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_CHAIN_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_PREFIX_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_PREFIX_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_PREFIX_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_DISABLE_SCATTER_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_DISABLE_SCATTER_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_DISABLE_SCATTER_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_DMA_MODE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_DMA_MODE_LBN … #define MC_CMD_INIT_RXQ_V5_IN_DMA_MODE_WIDTH … /* enum: One packet per descriptor (for normal networking) */ #define MC_CMD_INIT_RXQ_V5_IN_SINGLE_PACKET … /* enum: Pack multiple packets into large descriptors (for SolarCapture) */ #define MC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM … /* enum: Pack multiple packets into large descriptors using the format designed * to maximise packet rate. This mode uses 1 "bucket" per descriptor with * multiple fixed-size packet buffers within each bucket. For a full * description see SF-119419-TC. This mode is only supported by "dpdk" datapath * firmware. */ #define MC_CMD_INIT_RXQ_V5_IN_EQUAL_STRIDE_SUPER_BUFFER … /* enum: Deprecated name for EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V5_IN_EQUAL_STRIDE_PACKED_STREAM … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_SNAPSHOT_MODE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_SNAPSHOT_MODE_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_SNAPSHOT_MODE_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM_BUFF_SIZE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM_BUFF_SIZE_LBN … #define MC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM_BUFF_SIZE_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_PS_BUFF_1M … #define MC_CMD_INIT_RXQ_V5_IN_PS_BUFF_512K … #define MC_CMD_INIT_RXQ_V5_IN_PS_BUFF_256K … #define MC_CMD_INIT_RXQ_V5_IN_PS_BUFF_128K … #define MC_CMD_INIT_RXQ_V5_IN_PS_BUFF_64K … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_WANT_OUTER_CLASSES_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_WANT_OUTER_CLASSES_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_WANT_OUTER_CLASSES_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_FORCE_EV_MERGING_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_FORCE_EV_MERGING_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_FORCE_EV_MERGING_WIDTH … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_OFST … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_LBN … #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_OFST … #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_RXQ_V5_IN_PORT_ID_OFST … #define MC_CMD_INIT_RXQ_V5_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM … /* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */ #define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST … #define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_LEN … /* The number of packet buffers that will be contained within each * EQUAL_STRIDE_SUPER_BUFFER format bucket supplied by the driver. This field * is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_BUFFERS_PER_BUCKET_OFST … #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN … /* The length in bytes of the area in each packet buffer that can be written to * by the adapter. This is used to store the packet prefix and the packet * payload. This length does not include any end padding added by the driver. * This field is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V5_IN_ES_MAX_DMA_LEN_OFST … #define MC_CMD_INIT_RXQ_V5_IN_ES_MAX_DMA_LEN_LEN … /* The length in bytes of a single packet buffer within a * EQUAL_STRIDE_SUPER_BUFFER format bucket. This field is ignored unless * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_STRIDE_OFST … #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_STRIDE_LEN … /* The maximum time in nanoseconds that the datapath will be backpressured if * there are no RX descriptors available. If the timeout is reached and there * are still no descriptors then the packet will be dropped. A timeout of 0 * means the datapath will never be blocked. This field is ignored unless * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER. */ #define MC_CMD_INIT_RXQ_V5_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_OFST … #define MC_CMD_INIT_RXQ_V5_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN … /* V4 message data */ #define MC_CMD_INIT_RXQ_V5_IN_V4_DATA_OFST … #define MC_CMD_INIT_RXQ_V5_IN_V4_DATA_LEN … /* Size in bytes of buffers attached to descriptors posted to this queue. Set * to zero if using this message on non-QDMA based platforms. Currently in * Riverhead there is a global limit of eight different buffer sizes across all * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a * request for a different buffer size will fail if there are already eight * other buffer sizes in use. In future Riverhead this limit will go away and * any size will be accepted. */ #define MC_CMD_INIT_RXQ_V5_IN_BUFFER_SIZE_BYTES_OFST … #define MC_CMD_INIT_RXQ_V5_IN_BUFFER_SIZE_BYTES_LEN … /* Prefix id for the RX prefix format to use on packets delivered this queue. * Zero is always a valid prefix id and means the default prefix format * documented for the platform. Other prefix ids can be obtained by calling * MC_CMD_GET_RX_PREFIX_ID with a requested set of prefix fields. */ #define MC_CMD_INIT_RXQ_V5_IN_RX_PREFIX_ID_OFST … #define MC_CMD_INIT_RXQ_V5_IN_RX_PREFIX_ID_LEN … /* MC_CMD_INIT_RXQ_OUT msgresponse */ #define MC_CMD_INIT_RXQ_OUT_LEN … /* MC_CMD_INIT_RXQ_EXT_OUT msgresponse */ #define MC_CMD_INIT_RXQ_EXT_OUT_LEN … /* MC_CMD_INIT_RXQ_V3_OUT msgresponse */ #define MC_CMD_INIT_RXQ_V3_OUT_LEN … /* MC_CMD_INIT_RXQ_V4_OUT msgresponse */ #define MC_CMD_INIT_RXQ_V4_OUT_LEN … /* MC_CMD_INIT_RXQ_V5_OUT msgresponse */ #define MC_CMD_INIT_RXQ_V5_OUT_LEN … /***********************************/ /* MC_CMD_INIT_TXQ */ #define MC_CMD_INIT_TXQ … #undef MC_CMD_0x82_PRIVILEGE_CTG #define MC_CMD_0x82_PRIVILEGE_CTG … /* MC_CMD_INIT_TXQ_IN msgrequest: Legacy INIT_TXQ request. Use extended version * in new code. */ #define MC_CMD_INIT_TXQ_IN_LENMIN … #define MC_CMD_INIT_TXQ_IN_LENMAX … #define MC_CMD_INIT_TXQ_IN_LENMAX_MCDI2 … #define MC_CMD_INIT_TXQ_IN_LEN(num) … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_NUM(len) … /* Size, in entries */ #define MC_CMD_INIT_TXQ_IN_SIZE_OFST … #define MC_CMD_INIT_TXQ_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to * INIT_EVQ. */ #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. */ #define MC_CMD_INIT_TXQ_IN_LABEL_OFST … #define MC_CMD_INIT_TXQ_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST … #define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_TXQ_IN_FLAGS_OFST … #define MC_CMD_INIT_TXQ_IN_FLAGS_LEN … #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_CSUM_DIS_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_CSUM_DIS_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_CSUM_DIS_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_WIDTH … #define MC_CMD_INIT_TXQ_IN_CRC_MODE_OFST … #define MC_CMD_INIT_TXQ_IN_CRC_MODE_LBN … #define MC_CMD_INIT_TXQ_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_WIDTH … #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_OFST … #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_LBN … #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_TXQ_IN_OWNER_ID_OFST … #define MC_CMD_INIT_TXQ_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_TXQ_IN_PORT_ID_OFST … #define MC_CMD_INIT_TXQ_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM … #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 … /* MC_CMD_INIT_TXQ_EXT_IN msgrequest: Extended INIT_TXQ with additional mode * flags */ #define MC_CMD_INIT_TXQ_EXT_IN_LEN … /* Size, in entries */ #define MC_CMD_INIT_TXQ_EXT_IN_SIZE_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_SIZE_LEN … /* The EVQ to send events to. This is an index originally specified to * INIT_EVQ. */ #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_LEN … /* The value to put in the event data. Check hardware spec. for valid range. */ #define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN … /* Desired instance. Must be set to a specific instance, which is a function * local queue index. */ #define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN … /* There will be more flags here. */ #define MC_CMD_INIT_TXQ_EXT_IN_FLAGS_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAGS_LEN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_UTHRESH_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_UTHRESH_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_UTHRESH_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_M2M_D2C_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_M2M_D2C_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_M2M_D2C_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_DESC_PROXY_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_DESC_PROXY_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_DESC_PROXY_WIDTH … /* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_LEN … /* The port ID associated with the v-adaptor which should contain this DMAQ. */ #define MC_CMD_INIT_TXQ_EXT_IN_PORT_ID_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_PORT_ID_LEN … /* 64-bit address of 4k of 4k-aligned host memory buffer */ #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN … #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM … #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM … #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 … /* Flags related to Qbb flow control mode. */ #define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_LEN … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_WIDTH … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_OFST … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_LBN … #define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_WIDTH … /* MC_CMD_INIT_TXQ_OUT msgresponse */ #define MC_CMD_INIT_TXQ_OUT_LEN … /***********************************/ /* MC_CMD_FINI_EVQ * Teardown an EVQ. * * All DMAQs or EVQs that point to the EVQ to tear down must be torn down first * or the operation will fail with EBUSY */ #define MC_CMD_FINI_EVQ … #undef MC_CMD_0x83_PRIVILEGE_CTG #define MC_CMD_0x83_PRIVILEGE_CTG … /* MC_CMD_FINI_EVQ_IN msgrequest */ #define MC_CMD_FINI_EVQ_IN_LEN … /* Instance of EVQ to destroy. Should be the same instance as that previously * passed to INIT_EVQ */ #define MC_CMD_FINI_EVQ_IN_INSTANCE_OFST … #define MC_CMD_FINI_EVQ_IN_INSTANCE_LEN … /* MC_CMD_FINI_EVQ_OUT msgresponse */ #define MC_CMD_FINI_EVQ_OUT_LEN … /***********************************/ /* MC_CMD_FINI_RXQ * Teardown a RXQ. */ #define MC_CMD_FINI_RXQ … #undef MC_CMD_0x84_PRIVILEGE_CTG #define MC_CMD_0x84_PRIVILEGE_CTG … /* MC_CMD_FINI_RXQ_IN msgrequest */ #define MC_CMD_FINI_RXQ_IN_LEN … /* Instance of RXQ to destroy */ #define MC_CMD_FINI_RXQ_IN_INSTANCE_OFST … #define MC_CMD_FINI_RXQ_IN_INSTANCE_LEN … /* MC_CMD_FINI_RXQ_OUT msgresponse */ #define MC_CMD_FINI_RXQ_OUT_LEN … /***********************************/ /* MC_CMD_FINI_TXQ * Teardown a TXQ. */ #define MC_CMD_FINI_TXQ … #undef MC_CMD_0x85_PRIVILEGE_CTG #define MC_CMD_0x85_PRIVILEGE_CTG … /* MC_CMD_FINI_TXQ_IN msgrequest */ #define MC_CMD_FINI_TXQ_IN_LEN … /* Instance of TXQ to destroy */ #define MC_CMD_FINI_TXQ_IN_INSTANCE_OFST … #define MC_CMD_FINI_TXQ_IN_INSTANCE_LEN … /* MC_CMD_FINI_TXQ_OUT msgresponse */ #define MC_CMD_FINI_TXQ_OUT_LEN … /***********************************/ /* MC_CMD_DRIVER_EVENT * Generate an event on an EVQ belonging to the function issuing the command. */ #define MC_CMD_DRIVER_EVENT … #undef MC_CMD_0x86_PRIVILEGE_CTG #define MC_CMD_0x86_PRIVILEGE_CTG … /* MC_CMD_DRIVER_EVENT_IN msgrequest */ #define MC_CMD_DRIVER_EVENT_IN_LEN … /* Handle of target EVQ */ #define MC_CMD_DRIVER_EVENT_IN_EVQ_OFST … #define MC_CMD_DRIVER_EVENT_IN_EVQ_LEN … /* Bits 0 - 63 of event */ #define MC_CMD_DRIVER_EVENT_IN_DATA_OFST … #define MC_CMD_DRIVER_EVENT_IN_DATA_LEN … #define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST … #define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST … /* MC_CMD_DRIVER_EVENT_OUT msgresponse */ #define MC_CMD_DRIVER_EVENT_OUT_LEN … /***********************************/ /* MC_CMD_ALLOC_BUFTBL_CHUNK * Allocate a set of buffer table entries using the specified owner ID. This * operation allocates the required buffer table entries (and fails if it * cannot do so). The buffer table entries will initially be zeroed. */ #define MC_CMD_ALLOC_BUFTBL_CHUNK … #undef MC_CMD_0x87_PRIVILEGE_CTG #define MC_CMD_0x87_PRIVILEGE_CTG … /* MC_CMD_ALLOC_BUFTBL_CHUNK_IN msgrequest */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_LEN … /* Owner ID to use */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_OFST … #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_LEN … /* Size of buffer table pages to use, in bytes (note that only a few values are * legal on any specific hardware). */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST … #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_LEN … /* MC_CMD_ALLOC_BUFTBL_CHUNK_OUT msgresponse */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_LEN … #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_OFST … #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_LEN … #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST … #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_LEN … /* Buffer table IDs for use in DMA descriptors. */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_OFST … #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_LEN … /***********************************/ /* MC_CMD_PROGRAM_BUFTBL_ENTRIES * Reprogram a set of buffer table entries in the specified chunk. */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES … #undef MC_CMD_0x88_PRIVILEGE_CTG #define MC_CMD_0x88_PRIVILEGE_CTG … /* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX_MCDI2 … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_NUM(len) … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN … /* ID */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_LEN … /* Num entries */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN … /* Buffer table entry address */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM … #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 … /* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN … /***********************************/ /* MC_CMD_FREE_BUFTBL_CHUNK */ #define MC_CMD_FREE_BUFTBL_CHUNK … #undef MC_CMD_0x89_PRIVILEGE_CTG #define MC_CMD_0x89_PRIVILEGE_CTG … /* MC_CMD_FREE_BUFTBL_CHUNK_IN msgrequest */ #define MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN … #define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_OFST … #define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_LEN … /* MC_CMD_FREE_BUFTBL_CHUNK_OUT msgresponse */ #define MC_CMD_FREE_BUFTBL_CHUNK_OUT_LEN … /***********************************/ /* MC_CMD_FILTER_OP * Multiplexed MCDI call for filter operations */ #define MC_CMD_FILTER_OP … #undef MC_CMD_0x8a_PRIVILEGE_CTG #define MC_CMD_0x8a_PRIVILEGE_CTG … /* MC_CMD_FILTER_OP_IN msgrequest */ #define MC_CMD_FILTER_OP_IN_LEN … /* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_IN_OP_OFST … #define MC_CMD_FILTER_OP_IN_OP_LEN … /* enum: single-recipient filter insert */ #define MC_CMD_FILTER_OP_IN_OP_INSERT … /* enum: single-recipient filter remove */ #define MC_CMD_FILTER_OP_IN_OP_REMOVE … /* enum: multi-recipient filter subscribe */ #define MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE … /* enum: multi-recipient filter unsubscribe */ #define MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE … /* enum: replace one recipient with another (warning - the filter handle may * change) */ #define MC_CMD_FILTER_OP_IN_OP_REPLACE … /* filter handle (for remove / unsubscribe operations) */ #define MC_CMD_FILTER_OP_IN_HANDLE_OFST … #define MC_CMD_FILTER_OP_IN_HANDLE_LEN … #define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST … #define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST … /* The port ID associated with the v-adaptor which should contain this filter. */ #define MC_CMD_FILTER_OP_IN_PORT_ID_OFST … #define MC_CMD_FILTER_OP_IN_PORT_ID_LEN … /* fields to include in match criteria */ #define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_LEN … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_DST_PORT_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_DST_PORT_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_DST_PORT_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_OFST … #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_LBN … #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH … /* receive destination */ #define MC_CMD_FILTER_OP_IN_RX_DEST_OFST … #define MC_CMD_FILTER_OP_IN_RX_DEST_LEN … /* enum: drop packets */ #define MC_CMD_FILTER_OP_IN_RX_DEST_DROP … /* enum: receive to host */ #define MC_CMD_FILTER_OP_IN_RX_DEST_HOST … /* enum: receive to MC */ #define MC_CMD_FILTER_OP_IN_RX_DEST_MC … /* enum: loop back to TXDP 0 */ #define MC_CMD_FILTER_OP_IN_RX_DEST_TX0 … /* enum: loop back to TXDP 1 */ #define MC_CMD_FILTER_OP_IN_RX_DEST_TX1 … /* receive queue handle (for multiple queue modes, this is the base queue) */ #define MC_CMD_FILTER_OP_IN_RX_QUEUE_OFST … #define MC_CMD_FILTER_OP_IN_RX_QUEUE_LEN … /* receive mode */ #define MC_CMD_FILTER_OP_IN_RX_MODE_OFST … #define MC_CMD_FILTER_OP_IN_RX_MODE_LEN … /* enum: receive to just the specified queue */ #define MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE … /* enum: receive to multiple queues using RSS context */ #define MC_CMD_FILTER_OP_IN_RX_MODE_RSS … /* enum: receive to multiple queues using .1p mapping */ #define MC_CMD_FILTER_OP_IN_RX_MODE_DOT1P_MAPPING … /* enum: install a filter entry that will never match; for test purposes only */ #define MC_CMD_FILTER_OP_IN_RX_MODE_TEST_NEVER_MATCH … /* RSS context (for RX_MODE_RSS) or .1p mapping handle (for * RX_MODE_DOT1P_MAPPING), as returned by MC_CMD_RSS_CONTEXT_ALLOC or * MC_CMD_DOT1P_MAPPING_ALLOC. */ #define MC_CMD_FILTER_OP_IN_RX_CONTEXT_OFST … #define MC_CMD_FILTER_OP_IN_RX_CONTEXT_LEN … /* transmit domain (reserved; set to 0) */ #define MC_CMD_FILTER_OP_IN_TX_DOMAIN_OFST … #define MC_CMD_FILTER_OP_IN_TX_DOMAIN_LEN … /* transmit destination (either set the MAC and/or PM bits for explicit * control, or set this field to TX_DEST_DEFAULT for sensible default * behaviour) */ #define MC_CMD_FILTER_OP_IN_TX_DEST_OFST … #define MC_CMD_FILTER_OP_IN_TX_DEST_LEN … /* enum: request default behaviour (based on filter type) */ #define MC_CMD_FILTER_OP_IN_TX_DEST_DEFAULT … #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_OFST … #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_LBN … #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_WIDTH … #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_OFST … #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_LBN … #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_WIDTH … /* source MAC address to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_IN_SRC_MAC_LEN … /* source port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_IN_SRC_PORT_LEN … /* destination MAC address to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_DST_MAC_OFST … #define MC_CMD_FILTER_OP_IN_DST_MAC_LEN … /* destination port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_DST_PORT_OFST … #define MC_CMD_FILTER_OP_IN_DST_PORT_LEN … /* Ethernet type to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_IN_ETHER_TYPE_LEN … /* Inner VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_IN_INNER_VLAN_LEN … /* Outer VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_IN_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_IN_OUTER_VLAN_LEN … /* IP protocol to match (in low byte; set high byte to 0) */ #define MC_CMD_FILTER_OP_IN_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_IN_IP_PROTO_LEN … /* Firmware defined register 0 to match (reserved; set to 0) */ #define MC_CMD_FILTER_OP_IN_FWDEF0_OFST … #define MC_CMD_FILTER_OP_IN_FWDEF0_LEN … /* Firmware defined register 1 to match (reserved; set to 0) */ #define MC_CMD_FILTER_OP_IN_FWDEF1_OFST … #define MC_CMD_FILTER_OP_IN_FWDEF1_LEN … /* source IP address to match (as bytes in network order; set last 12 bytes to * 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_IN_SRC_IP_OFST … #define MC_CMD_FILTER_OP_IN_SRC_IP_LEN … /* destination IP address to match (as bytes in network order; set last 12 * bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_IN_DST_IP_OFST … #define MC_CMD_FILTER_OP_IN_DST_IP_LEN … /* MC_CMD_FILTER_OP_EXT_IN msgrequest: Extension to MC_CMD_FILTER_OP_IN to * include handling of VXLAN/NVGRE encapsulated frame filtering (which is * supported on Medford only). */ #define MC_CMD_FILTER_OP_EXT_IN_LEN … /* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_EXT_IN_OP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_FILTER_OP_IN/OP */ /* filter handle (for remove / unsubscribe operations) */ #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN … #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST … #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST … /* The port ID associated with the v-adaptor which should contain this filter. */ #define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST … #define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_LEN … /* fields to include in match criteria */ #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FIELDS_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FIELDS_LEN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_OFST … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_LBN … #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH … /* receive destination */ #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_OFST … #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_LEN … /* enum: drop packets */ #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_DROP … /* enum: receive to host */ #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_HOST … /* enum: receive to MC */ #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_MC … /* enum: loop back to TXDP 0 */ #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_TX0 … /* enum: loop back to TXDP 1 */ #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_TX1 … /* receive queue handle (for multiple queue modes, this is the base queue) */ #define MC_CMD_FILTER_OP_EXT_IN_RX_QUEUE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_RX_QUEUE_LEN … /* receive mode */ #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_LEN … /* enum: receive to just the specified queue */ #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_SIMPLE … /* enum: receive to multiple queues using RSS context */ #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_RSS … /* enum: receive to multiple queues using .1p mapping */ #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_DOT1P_MAPPING … /* enum: install a filter entry that will never match; for test purposes only */ #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_TEST_NEVER_MATCH … /* RSS context (for RX_MODE_RSS) or .1p mapping handle (for * RX_MODE_DOT1P_MAPPING), as returned by MC_CMD_RSS_CONTEXT_ALLOC or * MC_CMD_DOT1P_MAPPING_ALLOC. */ #define MC_CMD_FILTER_OP_EXT_IN_RX_CONTEXT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_RX_CONTEXT_LEN … /* transmit domain (reserved; set to 0) */ #define MC_CMD_FILTER_OP_EXT_IN_TX_DOMAIN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_TX_DOMAIN_LEN … /* transmit destination (either set the MAC and/or PM bits for explicit * control, or set this field to TX_DEST_DEFAULT for sensible default * behaviour) */ #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_OFST … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_LEN … /* enum: request default behaviour (based on filter type) */ #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_DEFAULT … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_LBN … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_OFST … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_LBN … #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_WIDTH … /* source MAC address to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_SRC_MAC_LEN … /* source port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_SRC_PORT_LEN … /* destination MAC address to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_DST_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_DST_MAC_LEN … /* destination port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_DST_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_DST_PORT_LEN … /* Ethernet type to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_ETHER_TYPE_LEN … /* Inner VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_INNER_VLAN_LEN … /* Outer VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_OUTER_VLAN_LEN … /* IP protocol to match (in low byte; set high byte to 0) */ #define MC_CMD_FILTER_OP_EXT_IN_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IP_PROTO_LEN … /* Firmware defined register 0 to match (reserved; set to 0) */ #define MC_CMD_FILTER_OP_EXT_IN_FWDEF0_OFST … #define MC_CMD_FILTER_OP_EXT_IN_FWDEF0_LEN … /* VNI (for VXLAN/Geneve, when IP protocol is UDP) or VSID (for NVGRE, when IP * protocol is GRE) to match (as bytes in network order; set last byte to 0 for * VXLAN/NVGRE, or 1 for Geneve) */ #define MC_CMD_FILTER_OP_EXT_IN_VNI_OR_VSID_OFST … #define MC_CMD_FILTER_OP_EXT_IN_VNI_OR_VSID_LEN … #define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_LBN … #define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_LBN … #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_WIDTH … /* enum: Match VXLAN traffic with this VNI */ #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_VXLAN … /* enum: Match Geneve traffic with this VNI */ #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_GENEVE … /* enum: Reserved for experimental development use */ #define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_EXPERIMENTAL … #define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_LBN … #define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_WIDTH … #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_LBN … #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_WIDTH … /* enum: Match NVGRE traffic with this VSID */ #define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_NVGRE … /* source IP address to match (as bytes in network order; set last 12 bytes to * 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_EXT_IN_SRC_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_SRC_IP_LEN … /* destination IP address to match (as bytes in network order; set last 12 * bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_EXT_IN_DST_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_DST_IP_LEN … /* VXLAN/NVGRE inner frame source MAC address to match (as bytes in network * order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_MAC_LEN … /* VXLAN/NVGRE inner frame source port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_PORT_LEN … /* VXLAN/NVGRE inner frame destination MAC address to match (as bytes in * network order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_MAC_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_MAC_LEN … /* VXLAN/NVGRE inner frame destination port to match (as bytes in network * order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_PORT_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_PORT_LEN … /* VXLAN/NVGRE inner frame Ethernet type to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_ETHER_TYPE_LEN … /* VXLAN/NVGRE inner frame Inner VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_INNER_VLAN_LEN … /* VXLAN/NVGRE inner frame Outer VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_OUTER_VLAN_LEN … /* VXLAN/NVGRE inner frame IP protocol to match (in low byte; set high byte to * 0) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_IP_PROTO_LEN … /* VXLAN/NVGRE inner frame Firmware defined register 0 to match (reserved; set * to 0) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF0_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF0_LEN … /* VXLAN/NVGRE inner frame Firmware defined register 1 to match (reserved; set * to 0) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF1_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF1_LEN … /* VXLAN/NVGRE inner frame source IP address to match (as bytes in network * order; set last 12 bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_IP_LEN … /* VXLAN/NVGRE inner frame destination IP address to match (as bytes in network * order; set last 12 bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_IP_OFST … #define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_IP_LEN … /* MC_CMD_FILTER_OP_V3_IN msgrequest: FILTER_OP extension to support additional * filter actions for Intel's DPDK (Data Plane Development Kit, dpdk.org) via * its rte_flow API. This extension is only useful with the sfc_efx driver * included as part of DPDK, used in conjunction with the dpdk datapath * firmware variant. */ #define MC_CMD_FILTER_OP_V3_IN_LEN … /* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_V3_IN_OP_OFST … #define MC_CMD_FILTER_OP_V3_IN_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_FILTER_OP_IN/OP */ /* filter handle (for remove / unsubscribe operations) */ #define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST … #define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN … #define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST … #define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST … /* The port ID associated with the v-adaptor which should contain this filter. */ #define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST … #define MC_CMD_FILTER_OP_V3_IN_PORT_ID_LEN … /* fields to include in match criteria */ #define MC_CMD_FILTER_OP_V3_IN_MATCH_FIELDS_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_FIELDS_LEN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_IP_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_IP_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_IP_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_IP_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_MAC_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_MAC_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_PORT_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_PORT_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_MAC_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_MAC_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_PORT_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_PORT_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_ETHER_TYPE_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_ETHER_TYPE_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_INNER_VLAN_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_INNER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_OUTER_VLAN_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_OUTER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IP_PROTO_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IP_PROTO_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_FWDEF0_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_FWDEF0_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_FWDEF0_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_VNI_OR_VSID_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_VNI_OR_VSID_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_VNI_OR_VSID_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_IP_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_IP_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_IP_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_IP_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_MAC_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_MAC_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_PORT_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_PORT_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_MAC_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_MAC_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_PORT_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_PORT_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_ETHER_TYPE_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_ETHER_TYPE_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_INNER_VLAN_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_INNER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_OUTER_VLAN_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_OUTER_VLAN_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_IP_PROTO_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_IP_PROTO_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF0_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF0_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF0_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF1_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF1_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF1_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_UCAST_DST_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_UCAST_DST_LBN … #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH … /* receive destination */ #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_OFST … #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_LEN … /* enum: drop packets */ #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_DROP … /* enum: receive to host */ #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_HOST … /* enum: receive to MC */ #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_MC … /* enum: loop back to TXDP 0 */ #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_TX0 … /* enum: loop back to TXDP 1 */ #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_TX1 … /* receive queue handle (for multiple queue modes, this is the base queue) */ #define MC_CMD_FILTER_OP_V3_IN_RX_QUEUE_OFST … #define MC_CMD_FILTER_OP_V3_IN_RX_QUEUE_LEN … /* receive mode */ #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_OFST … #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_LEN … /* enum: receive to just the specified queue */ #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_SIMPLE … /* enum: receive to multiple queues using RSS context */ #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_RSS … /* enum: receive to multiple queues using .1p mapping */ #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_DOT1P_MAPPING … /* enum: install a filter entry that will never match; for test purposes only */ #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_TEST_NEVER_MATCH … /* RSS context (for RX_MODE_RSS) or .1p mapping handle (for * RX_MODE_DOT1P_MAPPING), as returned by MC_CMD_RSS_CONTEXT_ALLOC or * MC_CMD_DOT1P_MAPPING_ALLOC. */ #define MC_CMD_FILTER_OP_V3_IN_RX_CONTEXT_OFST … #define MC_CMD_FILTER_OP_V3_IN_RX_CONTEXT_LEN … /* transmit domain (reserved; set to 0) */ #define MC_CMD_FILTER_OP_V3_IN_TX_DOMAIN_OFST … #define MC_CMD_FILTER_OP_V3_IN_TX_DOMAIN_LEN … /* transmit destination (either set the MAC and/or PM bits for explicit * control, or set this field to TX_DEST_DEFAULT for sensible default * behaviour) */ #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_OFST … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_LEN … /* enum: request default behaviour (based on filter type) */ #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_DEFAULT … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_MAC_LBN … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_MAC_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_PM_OFST … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_PM_LBN … #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_PM_WIDTH … /* source MAC address to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_SRC_MAC_LEN … /* source port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_SRC_PORT_LEN … /* destination MAC address to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_DST_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_DST_MAC_LEN … /* destination port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_DST_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_DST_PORT_LEN … /* Ethernet type to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_V3_IN_ETHER_TYPE_LEN … /* Inner VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_INNER_VLAN_LEN … /* Outer VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_OUTER_VLAN_LEN … /* IP protocol to match (in low byte; set high byte to 0) */ #define MC_CMD_FILTER_OP_V3_IN_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_V3_IN_IP_PROTO_LEN … /* Firmware defined register 0 to match (reserved; set to 0) */ #define MC_CMD_FILTER_OP_V3_IN_FWDEF0_OFST … #define MC_CMD_FILTER_OP_V3_IN_FWDEF0_LEN … /* VNI (for VXLAN/Geneve, when IP protocol is UDP) or VSID (for NVGRE, when IP * protocol is GRE) to match (as bytes in network order; set last byte to 0 for * VXLAN/NVGRE, or 1 for Geneve) */ #define MC_CMD_FILTER_OP_V3_IN_VNI_OR_VSID_OFST … #define MC_CMD_FILTER_OP_V3_IN_VNI_OR_VSID_LEN … #define MC_CMD_FILTER_OP_V3_IN_VNI_VALUE_OFST … #define MC_CMD_FILTER_OP_V3_IN_VNI_VALUE_LBN … #define MC_CMD_FILTER_OP_V3_IN_VNI_VALUE_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_VNI_TYPE_OFST … #define MC_CMD_FILTER_OP_V3_IN_VNI_TYPE_LBN … #define MC_CMD_FILTER_OP_V3_IN_VNI_TYPE_WIDTH … /* enum: Match VXLAN traffic with this VNI */ #define MC_CMD_FILTER_OP_V3_IN_VNI_TYPE_VXLAN … /* enum: Match Geneve traffic with this VNI */ #define MC_CMD_FILTER_OP_V3_IN_VNI_TYPE_GENEVE … /* enum: Reserved for experimental development use */ #define MC_CMD_FILTER_OP_V3_IN_VNI_TYPE_EXPERIMENTAL … #define MC_CMD_FILTER_OP_V3_IN_VSID_VALUE_OFST … #define MC_CMD_FILTER_OP_V3_IN_VSID_VALUE_LBN … #define MC_CMD_FILTER_OP_V3_IN_VSID_VALUE_WIDTH … #define MC_CMD_FILTER_OP_V3_IN_VSID_TYPE_OFST … #define MC_CMD_FILTER_OP_V3_IN_VSID_TYPE_LBN … #define MC_CMD_FILTER_OP_V3_IN_VSID_TYPE_WIDTH … /* enum: Match NVGRE traffic with this VSID */ #define MC_CMD_FILTER_OP_V3_IN_VSID_TYPE_NVGRE … /* source IP address to match (as bytes in network order; set last 12 bytes to * 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_V3_IN_SRC_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_SRC_IP_LEN … /* destination IP address to match (as bytes in network order; set last 12 * bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_V3_IN_DST_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_DST_IP_LEN … /* VXLAN/NVGRE inner frame source MAC address to match (as bytes in network * order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_SRC_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_SRC_MAC_LEN … /* VXLAN/NVGRE inner frame source port to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_SRC_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_SRC_PORT_LEN … /* VXLAN/NVGRE inner frame destination MAC address to match (as bytes in * network order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_MAC_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_MAC_LEN … /* VXLAN/NVGRE inner frame destination port to match (as bytes in network * order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_PORT_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_PORT_LEN … /* VXLAN/NVGRE inner frame Ethernet type to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_ETHER_TYPE_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_ETHER_TYPE_LEN … /* VXLAN/NVGRE inner frame Inner VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_INNER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_INNER_VLAN_LEN … /* VXLAN/NVGRE inner frame Outer VLAN tag to match (as bytes in network order) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_OUTER_VLAN_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_OUTER_VLAN_LEN … /* VXLAN/NVGRE inner frame IP protocol to match (in low byte; set high byte to * 0) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_IP_PROTO_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_IP_PROTO_LEN … /* VXLAN/NVGRE inner frame Firmware defined register 0 to match (reserved; set * to 0) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF0_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF0_LEN … /* VXLAN/NVGRE inner frame Firmware defined register 1 to match (reserved; set * to 0) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF1_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF1_LEN … /* VXLAN/NVGRE inner frame source IP address to match (as bytes in network * order; set last 12 bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_SRC_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_SRC_IP_LEN … /* VXLAN/NVGRE inner frame destination IP address to match (as bytes in network * order; set last 12 bytes to 0 for IPv4 address) */ #define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST … #define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN … /* Set an action for all packets matching this filter. The DPDK driver and dpdk * f/w variant use their own specific delivery structures, which are documented * in the DPDK Firmware Driver Interface (SF-119419-TC). Requesting anything * other than MATCH_ACTION_NONE when the NIC is running another f/w variant * will cause the filter insertion to fail with ENOTSUP. */ #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_LEN … /* enum: do nothing extra */ #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_NONE … /* enum: Set the match flag in the packet prefix for packets matching the * filter (only with dpdk firmware, otherwise fails with ENOTSUP). Used to * support the DPDK rte_flow "FLAG" action. */ #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAG … /* enum: Insert MATCH_MARK_VALUE into the packet prefix for packets matching * the filter (only with dpdk firmware, otherwise fails with ENOTSUP). Used to * support the DPDK rte_flow "MARK" action. */ #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_MARK … /* the mark value for MATCH_ACTION_MARK. Requesting a value larger than the * maximum (obtained from MC_CMD_GET_CAPABILITIES_V5/FILTER_ACTION_MARK_MAX) * will cause the filter insertion to fail with EINVAL. */ #define MC_CMD_FILTER_OP_V3_IN_MATCH_MARK_VALUE_OFST … #define MC_CMD_FILTER_OP_V3_IN_MATCH_MARK_VALUE_LEN … /* MC_CMD_FILTER_OP_OUT msgresponse */ #define MC_CMD_FILTER_OP_OUT_LEN … /* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_OUT_OP_OFST … #define MC_CMD_FILTER_OP_OUT_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_FILTER_OP_IN/OP */ /* Returned filter handle (for insert / subscribe operations). Note that these * handles should be considered opaque to the host, although a value of * 0xFFFFFFFF_FFFFFFFF is guaranteed never to be a valid handle. */ #define MC_CMD_FILTER_OP_OUT_HANDLE_OFST … #define MC_CMD_FILTER_OP_OUT_HANDLE_LEN … #define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST … #define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST … /* enum: guaranteed invalid filter handle (low 32 bits) */ #define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID … /* enum: guaranteed invalid filter handle (high 32 bits) */ #define MC_CMD_FILTER_OP_OUT_HANDLE_HI_INVALID … /* MC_CMD_FILTER_OP_EXT_OUT msgresponse */ #define MC_CMD_FILTER_OP_EXT_OUT_LEN … /* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_EXT_OUT_OP_OFST … #define MC_CMD_FILTER_OP_EXT_OUT_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_FILTER_OP_EXT_IN/OP */ /* Returned filter handle (for insert / subscribe operations). Note that these * handles should be considered opaque to the host, although a value of * 0xFFFFFFFF_FFFFFFFF is guaranteed never to be a valid handle. */ #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST … #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN … #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST … #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST … /* Enum values, see field(s): */ /* MC_CMD_FILTER_OP_OUT/HANDLE */ /***********************************/ /* MC_CMD_GET_PARSER_DISP_INFO * Get information related to the parser-dispatcher subsystem */ #define MC_CMD_GET_PARSER_DISP_INFO … #undef MC_CMD_0xe4_PRIVILEGE_CTG #define MC_CMD_0xe4_PRIVILEGE_CTG … /* MC_CMD_GET_PARSER_DISP_INFO_IN msgrequest */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_LEN … /* identifies the type of operation requested */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_OFST … #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_LEN … /* enum: read the list of supported RX filter matches */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_RX_MATCHES … /* enum: read flags indicating restrictions on filter insertion for the calling * client */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_RESTRICTIONS … /* enum: read properties relating to security rules (Medford-only; for use by * SolarSecure apps, not directly by drivers. See SF-114946-SW.) */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SECURITY_RULE_INFO … /* enum: read the list of supported RX filter matches for VXLAN/NVGRE * encapsulated frames, which follow a different match sequence to normal * frames (Medford only) */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_ENCAP_RX_MATCHES … /* enum: read the list of supported matches for the encapsulation detection * rules inserted by MC_CMD_VNIC_ENCAP_RULE_ADD. (ef100 and later) */ #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES … /* MC_CMD_GET_PARSER_DISP_INFO_OUT msgresponse */ #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX_MCDI2 … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(num) … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_NUM(len) … /* identifies the type of operation requested */ #define MC_CMD_GET_PARSER_DISP_INFO_OUT_OP_OFST … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ /* number of supported match types */ #define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_OFST … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_LEN … /* array of supported match types (valid MATCH_FIELDS values for * MC_CMD_FILTER_OP) sorted in decreasing priority order */ #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_OFST … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_LEN … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MINNUM … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MAXNUM … #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MAXNUM_MCDI2 … /* MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT msgresponse */ #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_LEN … /* identifies the type of operation requested */ #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_OP_OFST … #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ /* bitfield of filter insertion restrictions */ #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_OFST … #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_LEN … #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_OFST … #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_LBN … #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_WIDTH … /* MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT msgresponse: This response is * returned if a MC_CMD_GET_PARSER_DISP_INFO_IN request is sent with OP value * OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES. It contains information about the * supported match types that can be used in the encapsulation detection rules * inserted by MC_CMD_VNIC_ENCAP_RULE_ADD. */ #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_LENMIN … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_LENMAX … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_LENMAX_MCDI2 … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_LEN(num) … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_NUM(len) … /* The op code OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES is returned. */ #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_OP_OFST … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_OP_LEN … /* Enum values, see field(s): */ /* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ /* number of supported match types */ #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_NUM_SUPPORTED_MATCHES_OFST … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_NUM_SUPPORTED_MATCHES_LEN … /* array of supported match types (valid MATCH_FLAGS values for * MC_CMD_VNIC_ENCAP_RULE_ADD) sorted in decreasing priority order */ #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_OFST … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_LEN … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_MINNUM … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_MAXNUM … #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_GET_PORT_ASSIGNMENT * Get port assignment for current PCI function. */ #define MC_CMD_GET_PORT_ASSIGNMENT … #undef MC_CMD_0xb8_PRIVILEGE_CTG #define MC_CMD_0xb8_PRIVILEGE_CTG … /* MC_CMD_GET_PORT_ASSIGNMENT_IN msgrequest */ #define MC_CMD_GET_PORT_ASSIGNMENT_IN_LEN … /* MC_CMD_GET_PORT_ASSIGNMENT_OUT msgresponse */ #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN … /* Identifies the port assignment for this function. */ #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_PORT_OFST … #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_PORT_LEN … /***********************************/ /* MC_CMD_SET_PORT_ASSIGNMENT * Set port assignment for current PCI function. */ #define MC_CMD_SET_PORT_ASSIGNMENT … #undef MC_CMD_0xb9_PRIVILEGE_CTG #define MC_CMD_0xb9_PRIVILEGE_CTG … /* MC_CMD_SET_PORT_ASSIGNMENT_IN msgrequest */ #define MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN … /* Identifies the port assignment for this function. */ #define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_OFST … #define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_LEN … /* MC_CMD_SET_PORT_ASSIGNMENT_OUT msgresponse */ #define MC_CMD_SET_PORT_ASSIGNMENT_OUT_LEN … /***********************************/ /* MC_CMD_ALLOC_VIS * Allocate VIs for current PCI function. */ #define MC_CMD_ALLOC_VIS … #undef MC_CMD_0x8b_PRIVILEGE_CTG #define MC_CMD_0x8b_PRIVILEGE_CTG … /* MC_CMD_ALLOC_VIS_IN msgrequest */ #define MC_CMD_ALLOC_VIS_IN_LEN … /* The minimum number of VIs that is acceptable */ #define MC_CMD_ALLOC_VIS_IN_MIN_VI_COUNT_OFST … #define MC_CMD_ALLOC_VIS_IN_MIN_VI_COUNT_LEN … /* The maximum number of VIs that would be useful */ #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_OFST … #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_LEN … /* MC_CMD_ALLOC_VIS_OUT msgresponse: Huntington-compatible VI_ALLOC request. * Use extended version in new code. */ #define MC_CMD_ALLOC_VIS_OUT_LEN … /* The number of VIs allocated on this function */ #define MC_CMD_ALLOC_VIS_OUT_VI_COUNT_OFST … #define MC_CMD_ALLOC_VIS_OUT_VI_COUNT_LEN … /* The base absolute VI number allocated to this function. Required to * correctly interpret wakeup events. */ #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_OFST … #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_LEN … /* MC_CMD_ALLOC_VIS_EXT_OUT msgresponse */ #define MC_CMD_ALLOC_VIS_EXT_OUT_LEN … /* The number of VIs allocated on this function */ #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_COUNT_OFST … #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_COUNT_LEN … /* The base absolute VI number allocated to this function. Required to * correctly interpret wakeup events. */ #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_OFST … #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_LEN … /* Function's port vi_shift value (always 0 on Huntington) */ #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_SHIFT_OFST … #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_SHIFT_LEN … /***********************************/ /* MC_CMD_FREE_VIS * Free VIs for current PCI function. Any linked PIO buffers will be unlinked, * but not freed. */ #define MC_CMD_FREE_VIS … #undef MC_CMD_0x8c_PRIVILEGE_CTG #define MC_CMD_0x8c_PRIVILEGE_CTG … /* MC_CMD_FREE_VIS_IN msgrequest */ #define MC_CMD_FREE_VIS_IN_LEN … /* MC_CMD_FREE_VIS_OUT msgresponse */ #define MC_CMD_FREE_VIS_OUT_LEN … /***********************************/ /* MC_CMD_GET_SRIOV_CFG * Get SRIOV config for this PF. */ #define MC_CMD_GET_SRIOV_CFG … #undef MC_CMD_0xba_PRIVILEGE_CTG #define MC_CMD_0xba_PRIVILEGE_CTG … /* MC_CMD_GET_SRIOV_CFG_IN msgrequest */ #define MC_CMD_GET_SRIOV_CFG_IN_LEN … /* MC_CMD_GET_SRIOV_CFG_OUT msgresponse */ #define MC_CMD_GET_SRIOV_CFG_OUT_LEN … /* Number of VFs currently enabled. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_CURRENT_OFST … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_CURRENT_LEN … /* Max number of VFs before sriov stride and offset may need to be changed. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_OFST … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_LEN … #define MC_CMD_GET_SRIOV_CFG_OUT_FLAGS_OFST … #define MC_CMD_GET_SRIOV_CFG_OUT_FLAGS_LEN … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_ENABLED_OFST … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_ENABLED_LBN … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_ENABLED_WIDTH … /* RID offset of first VF from PF. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_OFFSET_OFST … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_OFFSET_LEN … /* RID offset of each subsequent VF from the previous. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_OFST … #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_LEN … /***********************************/ /* MC_CMD_SET_SRIOV_CFG * Set SRIOV config for this PF. */ #define MC_CMD_SET_SRIOV_CFG … #undef MC_CMD_0xbb_PRIVILEGE_CTG #define MC_CMD_0xbb_PRIVILEGE_CTG … /* MC_CMD_SET_SRIOV_CFG_IN msgrequest */ #define MC_CMD_SET_SRIOV_CFG_IN_LEN … /* Number of VFs currently enabled. */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_OFST … #define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_LEN … /* Max number of VFs before sriov stride and offset may need to be changed. */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST … #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_LEN … #define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_OFST … #define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_LEN … #define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_OFST … #define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_LBN … #define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_WIDTH … /* RID offset of first VF from PF, or 0 for no change, or * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate an offset. */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_OFST … #define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_LEN … /* RID offset of each subsequent VF from the previous, 0 for no change, or * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate a stride. */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_OFST … #define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_LEN … /* MC_CMD_SET_SRIOV_CFG_OUT msgresponse */ #define MC_CMD_SET_SRIOV_CFG_OUT_LEN … /***********************************/ /* MC_CMD_GET_VI_ALLOC_INFO * Get information about number of VI's and base VI number allocated to this * function. */ #define MC_CMD_GET_VI_ALLOC_INFO … #undef MC_CMD_0x8d_PRIVILEGE_CTG #define MC_CMD_0x8d_PRIVILEGE_CTG … /* MC_CMD_GET_VI_ALLOC_INFO_IN msgrequest */ #define MC_CMD_GET_VI_ALLOC_INFO_IN_LEN … /* MC_CMD_GET_VI_ALLOC_INFO_OUT msgresponse */ #define MC_CMD_GET_VI_ALLOC_INFO_OUT_LEN … /* The number of VIs allocated on this function */ #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_OFST … #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_LEN … /* The base absolute VI number allocated to this function. Required to * correctly interpret wakeup events. */ #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST … #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_LEN … /* Function's port vi_shift value (always 0 on Huntington) */ #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_OFST … #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_LEN … /***********************************/ /* MC_CMD_DUMP_VI_STATE * For CmdClient use. Dump pertinent information on a specific absolute VI. */ #define MC_CMD_DUMP_VI_STATE … #undef MC_CMD_0x8e_PRIVILEGE_CTG #define MC_CMD_0x8e_PRIVILEGE_CTG … /* MC_CMD_DUMP_VI_STATE_IN msgrequest */ #define MC_CMD_DUMP_VI_STATE_IN_LEN … /* The VI number to query. */ #define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_OFST … #define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN … /* MC_CMD_DUMP_VI_STATE_OUT msgresponse */ #define MC_CMD_DUMP_VI_STATE_OUT_LEN … /* The PF part of the function owning this VI. */ #define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN … /* The VF part of the function owning this VI. */ #define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_LEN … /* Base of VIs allocated to this function. */ #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_LEN … /* Count of VIs allocated to the owner function. */ #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_LEN … /* Base interrupt vector allocated to this function. */ #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_LEN … /* Number of interrupt vectors allocated to this function. */ #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_LEN … /* Raw evq ptr table data. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST … /* Raw evq timer table data. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST … /* Combined metadata field. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_WIDTH … /* TXDPCPU raw table data for queue. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST … /* TXDPCPU raw table data for queue. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST … /* TXDPCPU raw table data for queue. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST … /* Combined metadata field. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_WIDTH … /* RXDPCPU raw table data for queue. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST … /* RXDPCPU raw table data for queue. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST … /* Reserved, currently 0. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST … /* Combined metadata field. */ #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_WIDTH … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN … #define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH … /***********************************/ /* MC_CMD_ALLOC_PIOBUF * Allocate a push I/O buffer for later use with a tx queue. */ #define MC_CMD_ALLOC_PIOBUF … #undef MC_CMD_0x8f_PRIVILEGE_CTG #define MC_CMD_0x8f_PRIVILEGE_CTG … /* MC_CMD_ALLOC_PIOBUF_IN msgrequest */ #define MC_CMD_ALLOC_PIOBUF_IN_LEN … /* MC_CMD_ALLOC_PIOBUF_OUT msgresponse */ #define MC_CMD_ALLOC_PIOBUF_OUT_LEN … /* Handle for allocated push I/O buffer. */ #define MC_CMD_ALLOC_PIOBUF_OUT_PIOBUF_HANDLE_OFST … #define MC_CMD_ALLOC_PIOBUF_OUT_PIOBUF_HANDLE_LEN … /***********************************/ /* MC_CMD_FREE_PIOBUF * Free a push I/O buffer. */ #define MC_CMD_FREE_PIOBUF … #undef MC_CMD_0x90_PRIVILEGE_CTG #define MC_CMD_0x90_PRIVILEGE_CTG … /* MC_CMD_FREE_PIOBUF_IN msgrequest */ #define MC_CMD_FREE_PIOBUF_IN_LEN … /* Handle for allocated push I/O buffer. */ #define MC_CMD_FREE_PIOBUF_IN_PIOBUF_HANDLE_OFST … #define MC_CMD_FREE_PIOBUF_IN_PIOBUF_HANDLE_LEN … /* MC_CMD_FREE_PIOBUF_OUT msgresponse */ #define MC_CMD_FREE_PIOBUF_OUT_LEN … /***********************************/ /* MC_CMD_GET_CAPABILITIES * Get device capabilities. * * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to * reference inherent device capabilities as opposed to current NVRAM config. */ #define MC_CMD_GET_CAPABILITIES … #undef MC_CMD_0xbe_PRIVILEGE_CTG #define MC_CMD_0xbe_PRIVILEGE_CTG … /* MC_CMD_GET_CAPABILITIES_IN msgrequest */ #define MC_CMD_GET_CAPABILITIES_IN_LEN … /* MC_CMD_GET_CAPABILITIES_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_OUT_LICENSE_CAPABILITIES_LEN … /* MC_CMD_GET_CAPABILITIES_V2_IN msgrequest */ #define MC_CMD_GET_CAPABILITIES_V2_IN_LEN … /* MC_CMD_GET_CAPABILITIES_V2_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V2_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V2_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V2_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V2_OUT_SIZE_PIO_BUFF_LEN … /* MC_CMD_GET_CAPABILITIES_V3_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V3_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V3_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V3_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V3_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* MC_CMD_GET_CAPABILITIES_V4_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V4_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V4_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* Entry count in the MAC stats array, including the final GENERATION_END * entry. For MAC stats DMA, drivers should allocate a buffer large enough to * hold at least this many 64-bit stats values, if they wish to receive all * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the * stats array returned will be truncated. */ #define MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_NUM_STATS_OFST … #define MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_NUM_STATS_LEN … /* MC_CMD_GET_CAPABILITIES_V5_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V5_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V5_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* Entry count in the MAC stats array, including the final GENERATION_END * entry. For MAC stats DMA, drivers should allocate a buffer large enough to * hold at least this many 64-bit stats values, if they wish to receive all * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the * stats array returned will be truncated. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_MAC_STATS_NUM_STATS_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_MAC_STATS_NUM_STATS_LEN … /* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. */ #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX_OFST … #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX_LEN … /* MC_CMD_GET_CAPABILITIES_V6_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* Entry count in the MAC stats array, including the final GENERATION_END * entry. For MAC stats DMA, drivers should allocate a buffer large enough to * hold at least this many 64-bit stats values, if they wish to receive all * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the * stats array returned will be truncated. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_NUM_STATS_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_NUM_STATS_LEN … /* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_MAX_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_MAX_LEN … /* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when * they create an RX queue. Due to hardware limitations, only a small number of * different buffer sizes may be available concurrently. Nonzero entries in * this array are the sizes of buffers which the system guarantees will be * available for use. If the list is empty, there are no limitations on * concurrent buffer sizes. */ #define MC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST … #define MC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN … #define MC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM … /* MC_CMD_GET_CAPABILITIES_V7_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V7_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V7_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* Entry count in the MAC stats array, including the final GENERATION_END * entry. For MAC stats DMA, drivers should allocate a buffer large enough to * hold at least this many 64-bit stats values, if they wish to receive all * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the * stats array returned will be truncated. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAC_STATS_NUM_STATS_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAC_STATS_NUM_STATS_LEN … /* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_MAX_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_MAX_LEN … /* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when * they create an RX queue. Due to hardware limitations, only a small number of * different buffer sizes may be available concurrently. Nonzero entries in * this array are the sizes of buffers which the system guarantees will be * available for use. If the list is empty, there are no limitations on * concurrent buffer sizes. */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM … /* Third word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS3_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS3_LEN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_WOL_ETHERWAKE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_WOL_ETHERWAKE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_WOL_ETHERWAKE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_EVEN_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_EVEN_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_EVEN_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VDPA_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VDPA_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_VDPA_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH … /* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V8_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V8_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* Entry count in the MAC stats array, including the final GENERATION_END * entry. For MAC stats DMA, drivers should allocate a buffer large enough to * hold at least this many 64-bit stats values, if they wish to receive all * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the * stats array returned will be truncated. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAC_STATS_NUM_STATS_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAC_STATS_NUM_STATS_LEN … /* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_MAX_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_MAX_LEN … /* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when * they create an RX queue. Due to hardware limitations, only a small number of * different buffer sizes may be available concurrently. Nonzero entries in * this array are the sizes of buffers which the system guarantees will be * available for use. If the list is empty, there are no limitations on * concurrent buffer sizes. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM … /* Third word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS3_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS3_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_WOL_ETHERWAKE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_WOL_ETHERWAKE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_WOL_ETHERWAKE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_EVEN_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_EVEN_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_EVEN_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VDPA_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VDPA_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_VDPA_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH … /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST … #define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST … /* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN … /* First word of flags. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS1_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS1_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VPORT_RECONFIGURE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VPORT_RECONFIGURE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VPORT_RECONFIGURE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_STRIPING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_STRIPING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_STRIPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_QUERY_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_QUERY_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_QUERY_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_PORT_VLAN_RESTRICT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_PORT_VLAN_RESTRICT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_DRV_ATTACH_PREBOOT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_DRV_ATTACH_PREBOOT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_DRV_ATTACH_PREBOOT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_FORCE_EVENT_MERGING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_FORCE_EVENT_MERGING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_FORCE_EVENT_MERGING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SET_MAC_ENHANCED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SET_MAC_ENHANCED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SET_MAC_ENHANCED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_SECURITY_FILTERING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_SECURITY_FILTERING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_SECURITY_FILTERING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_ADDITIONAL_RSS_MODES_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_ADDITIONAL_RSS_MODES_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_ADDITIONAL_RSS_MODES_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_QBB_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_QBB_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_QBB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_RSS_LIMITED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_RSS_LIMITED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_RSS_LIMITED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_INCLUDE_FCS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_INCLUDE_FCS_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_INCLUDE_FCS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VLAN_INSERTION_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VLAN_INSERTION_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VLAN_INSERTION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_0_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_0_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_0_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_14_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_14_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_14_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_BATCHING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_BATCHING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_BATCHING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCAST_FILTER_CHAINING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCAST_FILTER_CHAINING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCAST_FILTER_CHAINING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_PM_AND_RXDP_COUNTERS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_PM_AND_RXDP_COUNTERS_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_PM_AND_RXDP_COUNTERS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DISABLE_SCATTER_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DISABLE_SCATTER_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DISABLE_SCATTER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MCAST_UDP_LOOPBACK_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MCAST_UDP_LOOPBACK_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VXLAN_NVGRE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VXLAN_NVGRE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VXLAN_NVGRE_WIDTH … /* RxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DPCPU_FW_ID_LEN … /* enum: Standard RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP … /* enum: Low latency RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_LOW_LATENCY … /* enum: Packed stream RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_PACKED_STREAM … /* enum: Rules engine RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_RULES_ENGINE … /* enum: DPDK RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_DPDK … /* enum: BIST RXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_BIST … /* enum: RXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH … /* enum: RXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD … /* enum: RXDP Test firmware image 3 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST … /* enum: RXDP Test firmware image 4 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE … /* enum: RXDP Test firmware image 5 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_BACKPRESSURE … /* enum: RXDP Test firmware image 6 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_PACKET_EDITS … /* enum: RXDP Test firmware image 7 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_RX_HDR_SPLIT … /* enum: RXDP Test firmware image 8 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_DISABLE_DL … /* enum: RXDP Test firmware image 9 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_DOORBELL_DELAY … /* enum: RXDP Test firmware image 10 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_TEST_FW_SLOW … /* TxDPCPU firmware id. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_DPCPU_FW_ID_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_DPCPU_FW_ID_LEN … /* enum: Standard TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP … /* enum: Low latency TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_LOW_LATENCY … /* enum: High packet rate TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_HIGH_PACKET_RATE … /* enum: Rules engine TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_RULES_ENGINE … /* enum: DPDK TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_DPDK … /* enum: BIST TXDP firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_BIST … /* enum: TXDP Test firmware image 1 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_TEST_FW_TSO_EDIT … /* enum: TXDP Test firmware image 2 */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_TEST_FW_PACKET_EDITS … /* enum: TXDP CSR bus test firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXDP_TEST_FW_CSR … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_RESERVED … /* enum: Trivial RX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_FIRST_PKT … /* enum: RX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: RX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant RX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM … /* enum: Low latency RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_LOW_LATENCY … /* enum: Packed stream RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_PACKED_STREAM … /* enum: RX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_L3XUDP … /* enum: DPDK RX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* enum: RX PD firmware parsing but not filtering network overlay tunnel * encapsulations (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_REV_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_REV_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_REV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_TYPE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_TYPE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_TYPE_WIDTH … /* enum: reserved value - do not use (may indicate alternative interpretation * of REV field in future) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_RESERVED … /* enum: Trivial TX PD firmware for early Huntington development (Huntington * development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_FIRST_PKT … /* enum: TX PD firmware for telemetry prototyping (Medford2 development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY … /* enum: TX PD firmware with approximately Siena-compatible behaviour * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_SIENA_COMPAT … /* enum: Full featured TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_FULL_FEATURED … /* enum: (deprecated original name for the FULL_FEATURED variant) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_VSWITCH … /* enum: siena_compat variant TX PD firmware using PM rather than MAC * (Huntington development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_LOW_LATENCY … /* enum: TX PD firmware handling layer 2 only for high packet rate performance * tests (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_LAYER2_PERF … /* enum: Rules engine TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_RULES_ENGINE … /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_L3XUDP … /* enum: DPDK TX PD production firmware */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_DPDK … /* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE … /* Hardware capabilities of NIC */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_HW_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_HW_CAPABILITIES_LEN … /* Licensed capabilities */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_LICENSE_CAPABILITIES_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_LICENSE_CAPABILITIES_LEN … /* Second word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS2_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS2_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_ENCAP_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_ENCAP_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_ENCAP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVQ_TIMER_CTRL_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVQ_TIMER_CTRL_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVQ_TIMER_CTRL_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVENT_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVENT_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVENT_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_CUT_THROUGH_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_CUT_THROUGH_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_CUT_THROUGH_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VFIFO_ULL_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VFIFO_ULL_MODE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VFIFO_ULL_MODE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_V2_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_V2_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_V2_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_TIMESTAMPING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_TIMESTAMPING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_TIMESTAMPING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TIMESTAMP_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TIMESTAMP_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TIMESTAMP_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_SNIFF_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_SNIFF_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_SNIFF_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_BACKGROUND_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_BACKGROUND_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_BACKGROUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_DB_RETURN_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_DB_RETURN_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_DB_RETURN_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_CTPIO_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_CTPIO_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_CTPIO_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_BOUND_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_BOUND_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_BOUND_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SF_ADAPTER_AUTHENTICATION_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SF_ADAPTER_AUTHENTICATION_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_FLAG_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_FLAG_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_FLAG_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_L3XUDP_SUPPORT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_L3XUDP_SUPPORT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_L3XUDP_SUPPORT_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_HLB_IDLE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_HLB_IDLE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_HLB_IDLE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_NO_CONT_EV_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_NO_CONT_EV_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_NO_CONT_EV_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_BUNDLE_UPDATE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_BUNDLE_UPDATE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_BUNDLE_UPDATE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V3_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V3_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V3_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_SENSORS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_SENSORS_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_SENSORS_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH … /* Number of FATSOv2 contexts per datapath supported by this NIC (when * TX_TSO_V2 == 1). Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_N_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_N_CONTEXTS_LEN … /* One byte per PF containing the number of the external port assigned to this * PF, indexed by PF number. Special values indicate that a PF is either not * present or not assigned. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM … /* enum: The caller is not permitted to access information on this PF. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_ACCESS_NOT_PERMITTED … /* enum: PF does not exist. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_PF_NOT_PRESENT … /* enum: PF does exist but is not assigned to any external port. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_PF_NOT_ASSIGNED … /* enum: This value indicates that PF is assigned, but it cannot be expressed * in this field. It is intended for a possible future situation where a more * complex scheme of PFs to ports mapping is being used. The future driver * should look for a new field supporting the new scheme. The current/old * driver should treat this value as PF_NOT_ASSIGNED. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_INCOMPATIBLE_ASSIGNMENT … /* One byte per PF containing the number of its VFs, indexed by PF number. A * special value indicates that a PF is not present. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VFS_PER_PF_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VFS_PER_PF_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VFS_PER_PF_NUM … /* enum: The caller is not permitted to access information on this PF. */ /* MC_CMD_GET_CAPABILITIES_V9_OUT_ACCESS_NOT_PERMITTED 0xff */ /* enum: PF does not exist. */ /* MC_CMD_GET_CAPABILITIES_V9_OUT_PF_NOT_PRESENT 0xfe */ /* Number of VIs available for each external port */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_NUM … /* Size of RX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ RX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DESC_CACHE_SIZE_LEN … /* Size of TX descriptor cache expressed as binary logarithm The actual size * equals (2 ^ TX_DESC_CACHE_SIZE) */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_DESC_CACHE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_DESC_CACHE_SIZE_LEN … /* Total number of available PIO buffers */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_PIO_BUFFS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_PIO_BUFFS_LEN … /* Size of a single PIO buffer */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_SIZE_PIO_BUFF_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_SIZE_PIO_BUFF_LEN … /* On chips later than Medford the amount of address space assigned to each VI * is configurable. This is a global setting that the driver must query to * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available * with 8k VI windows. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_WINDOW_MODE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_WINDOW_MODE_LEN … /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k. * CTPIO is not mapped. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_WINDOW_MODE_8K … /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_WINDOW_MODE_16K … /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_WINDOW_MODE_64K … /* Number of vFIFOs per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN … /* Number of buffers per adapter that can be used for VFIFO Stuffing * (SF-115995-SW) in the present configuration of firmware and port mode. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN … /* Entry count in the MAC stats array, including the final GENERATION_END * entry. For MAC stats DMA, drivers should allocate a buffer large enough to * hold at least this many 64-bit stats values, if they wish to receive all * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the * stats array returned will be truncated. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAC_STATS_NUM_STATS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAC_STATS_NUM_STATS_LEN … /* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_MAX_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_MAX_LEN … /* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when * they create an RX queue. Due to hardware limitations, only a small number of * different buffer sizes may be available concurrently. Nonzero entries in * this array are the sizes of buffers which the system guarantees will be * available for use. If the list is empty, there are no limitations on * concurrent buffer sizes. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM … /* Third word of flags. Not present on older firmware (check the length). */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS3_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS3_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_WOL_ETHERWAKE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_WOL_ETHERWAKE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_WOL_ETHERWAKE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_EVEN_SPREADING_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_EVEN_SPREADING_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_EVEN_SPREADING_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VDPA_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VDPA_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_VDPA_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH … #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH … /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST … /* The minimum size (in table entries) of indirection table to be allocated * from the pool for an RSS context. Note that the table size used must be a * power of 2. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN … /* The maximum size (in table entries) of indirection table to be allocated * from the pool for an RSS context. Note that the table size used must be a * power of 2. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN … /* The maximum number of queues that can be used by an RSS context in exclusive * mode. In exclusive mode the context has a configurable indirection table and * a configurable RSS key. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN … /* The maximum number of queues that can be used by an RSS context in even- * spreading mode. In even-spreading mode the context has no indirection table * but it does have a configurable RSS key. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN … /* The total number of RSS contexts supported. Note that the number of * available contexts using indirection tables is also limited by the * availability of indirection table space allocated from a common pool. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_NUM_CONTEXTS_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_NUM_CONTEXTS_LEN … /* The total amount of indirection table space that can be shared between RSS * contexts. */ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_TABLE_POOL_SIZE_OFST … #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_TABLE_POOL_SIZE_LEN … /***********************************/ /* MC_CMD_V2_EXTN * Encapsulation for a v2 extended command */ #define MC_CMD_V2_EXTN … /* MC_CMD_V2_EXTN_IN msgrequest */ #define MC_CMD_V2_EXTN_IN_LEN … /* the extended command number */ #define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN … #define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH … #define MC_CMD_V2_EXTN_IN_UNUSED_LBN … #define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH … /* the actual length of the encapsulated command (which is not in the v1 * header) */ #define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN … #define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH … #define MC_CMD_V2_EXTN_IN_UNUSED2_LBN … #define MC_CMD_V2_EXTN_IN_UNUSED2_WIDTH … /* Type of command/response */ #define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_LBN … #define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH … /* enum: MCDI command directed to or response originating from the MC. */ #define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_MC … /* enum: MCDI command directed to a TSA controller. MCDI responses of this type * are not defined. */ #define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA … /***********************************/ /* MC_CMD_LINK_PIOBUF * Link a push I/O buffer to a TxQ */ #define MC_CMD_LINK_PIOBUF … #undef MC_CMD_0x92_PRIVILEGE_CTG #define MC_CMD_0x92_PRIVILEGE_CTG … /* MC_CMD_LINK_PIOBUF_IN msgrequest */ #define MC_CMD_LINK_PIOBUF_IN_LEN … /* Handle for allocated push I/O buffer. */ #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST … #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN … /* Function Local Instance (VI) number. */ #define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST … #define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN … /* MC_CMD_LINK_PIOBUF_OUT msgresponse */ #define MC_CMD_LINK_PIOBUF_OUT_LEN … /***********************************/ /* MC_CMD_UNLINK_PIOBUF * Unlink a push I/O buffer from a TxQ */ #define MC_CMD_UNLINK_PIOBUF … #undef MC_CMD_0x93_PRIVILEGE_CTG #define MC_CMD_0x93_PRIVILEGE_CTG … /* MC_CMD_UNLINK_PIOBUF_IN msgrequest */ #define MC_CMD_UNLINK_PIOBUF_IN_LEN … /* Function Local Instance (VI) number. */ #define MC_CMD_UNLINK_PIOBUF_IN_TXQ_INSTANCE_OFST … #define MC_CMD_UNLINK_PIOBUF_IN_TXQ_INSTANCE_LEN … /* MC_CMD_UNLINK_PIOBUF_OUT msgresponse */ #define MC_CMD_UNLINK_PIOBUF_OUT_LEN … /***********************************/ /* MC_CMD_VSWITCH_ALLOC * allocate and initialise a v-switch. */ #define MC_CMD_VSWITCH_ALLOC … #undef MC_CMD_0x94_PRIVILEGE_CTG #define MC_CMD_0x94_PRIVILEGE_CTG … /* MC_CMD_VSWITCH_ALLOC_IN msgrequest */ #define MC_CMD_VSWITCH_ALLOC_IN_LEN … /* The port to connect to the v-switch's upstream port. */ #define MC_CMD_VSWITCH_ALLOC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VSWITCH_ALLOC_IN_UPSTREAM_PORT_ID_LEN … /* The type of v-switch to create. */ #define MC_CMD_VSWITCH_ALLOC_IN_TYPE_OFST … #define MC_CMD_VSWITCH_ALLOC_IN_TYPE_LEN … /* enum: VLAN */ #define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_VLAN … /* enum: VEB */ #define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_VEB … /* enum: VEPA (obsolete) */ #define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_VEPA … /* enum: MUX */ #define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_MUX … /* enum: Snapper specific; semantics TBD */ #define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_TEST … /* Flags controlling v-port creation */ #define MC_CMD_VSWITCH_ALLOC_IN_FLAGS_OFST … #define MC_CMD_VSWITCH_ALLOC_IN_FLAGS_LEN … #define MC_CMD_VSWITCH_ALLOC_IN_FLAG_AUTO_PORT_OFST … #define MC_CMD_VSWITCH_ALLOC_IN_FLAG_AUTO_PORT_LBN … #define MC_CMD_VSWITCH_ALLOC_IN_FLAG_AUTO_PORT_WIDTH … /* The number of VLAN tags to allow for attached v-ports. For VLAN aggregators, * this must be one or greated, and the attached v-ports must have exactly this * number of tags. For other v-switch types, this must be zero of greater, and * is an upper limit on the number of VLAN tags for attached v-ports. An error * will be returned if existing configuration means we can't support attached * v-ports with this number of tags. */ #define MC_CMD_VSWITCH_ALLOC_IN_NUM_VLAN_TAGS_OFST … #define MC_CMD_VSWITCH_ALLOC_IN_NUM_VLAN_TAGS_LEN … /* MC_CMD_VSWITCH_ALLOC_OUT msgresponse */ #define MC_CMD_VSWITCH_ALLOC_OUT_LEN … /***********************************/ /* MC_CMD_VSWITCH_FREE * de-allocate a v-switch. */ #define MC_CMD_VSWITCH_FREE … #undef MC_CMD_0x95_PRIVILEGE_CTG #define MC_CMD_0x95_PRIVILEGE_CTG … /* MC_CMD_VSWITCH_FREE_IN msgrequest */ #define MC_CMD_VSWITCH_FREE_IN_LEN … /* The port to which the v-switch is connected. */ #define MC_CMD_VSWITCH_FREE_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VSWITCH_FREE_IN_UPSTREAM_PORT_ID_LEN … /* MC_CMD_VSWITCH_FREE_OUT msgresponse */ #define MC_CMD_VSWITCH_FREE_OUT_LEN … /***********************************/ /* MC_CMD_VSWITCH_QUERY * read some config of v-switch. For now this command is an empty placeholder. * It may be used to check if a v-switch is connected to a given EVB port (if * not, then the command returns ENOENT). */ #define MC_CMD_VSWITCH_QUERY … #undef MC_CMD_0x63_PRIVILEGE_CTG #define MC_CMD_0x63_PRIVILEGE_CTG … /* MC_CMD_VSWITCH_QUERY_IN msgrequest */ #define MC_CMD_VSWITCH_QUERY_IN_LEN … /* The port to which the v-switch is connected. */ #define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_LEN … /* MC_CMD_VSWITCH_QUERY_OUT msgresponse */ #define MC_CMD_VSWITCH_QUERY_OUT_LEN … /***********************************/ /* MC_CMD_VPORT_ALLOC * allocate a v-port. */ #define MC_CMD_VPORT_ALLOC … #undef MC_CMD_0x96_PRIVILEGE_CTG #define MC_CMD_0x96_PRIVILEGE_CTG … /* MC_CMD_VPORT_ALLOC_IN msgrequest */ #define MC_CMD_VPORT_ALLOC_IN_LEN … /* The port to which the v-switch is connected. */ #define MC_CMD_VPORT_ALLOC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VPORT_ALLOC_IN_UPSTREAM_PORT_ID_LEN … /* The type of the new v-port. */ #define MC_CMD_VPORT_ALLOC_IN_TYPE_OFST … #define MC_CMD_VPORT_ALLOC_IN_TYPE_LEN … /* enum: VLAN (obsolete) */ #define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_VLAN … /* enum: VEB (obsolete) */ #define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_VEB … /* enum: VEPA (obsolete) */ #define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_VEPA … /* enum: A normal v-port receives packets which match a specified MAC and/or * VLAN. */ #define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_NORMAL … /* enum: An expansion v-port packets traffic which don't match any other * v-port. */ #define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_EXPANSION … /* enum: An test v-port receives packets which match any filters installed by * its downstream components. */ #define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_TEST … /* Flags controlling v-port creation */ #define MC_CMD_VPORT_ALLOC_IN_FLAGS_OFST … #define MC_CMD_VPORT_ALLOC_IN_FLAGS_LEN … #define MC_CMD_VPORT_ALLOC_IN_FLAG_AUTO_PORT_OFST … #define MC_CMD_VPORT_ALLOC_IN_FLAG_AUTO_PORT_LBN … #define MC_CMD_VPORT_ALLOC_IN_FLAG_AUTO_PORT_WIDTH … #define MC_CMD_VPORT_ALLOC_IN_FLAG_VLAN_RESTRICT_OFST … #define MC_CMD_VPORT_ALLOC_IN_FLAG_VLAN_RESTRICT_LBN … #define MC_CMD_VPORT_ALLOC_IN_FLAG_VLAN_RESTRICT_WIDTH … /* The number of VLAN tags to insert/remove. An error will be returned if * incompatible with the number of VLAN tags specified for the upstream * v-switch. */ #define MC_CMD_VPORT_ALLOC_IN_NUM_VLAN_TAGS_OFST … #define MC_CMD_VPORT_ALLOC_IN_NUM_VLAN_TAGS_LEN … /* The actual VLAN tags to insert/remove */ #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAGS_OFST … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAGS_LEN … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_0_OFST … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_0_LBN … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_0_WIDTH … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_1_OFST … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_1_LBN … #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_1_WIDTH … /* MC_CMD_VPORT_ALLOC_OUT msgresponse */ #define MC_CMD_VPORT_ALLOC_OUT_LEN … /* The handle of the new v-port */ #define MC_CMD_VPORT_ALLOC_OUT_VPORT_ID_OFST … #define MC_CMD_VPORT_ALLOC_OUT_VPORT_ID_LEN … /***********************************/ /* MC_CMD_VPORT_FREE * de-allocate a v-port. */ #define MC_CMD_VPORT_FREE … #undef MC_CMD_0x97_PRIVILEGE_CTG #define MC_CMD_0x97_PRIVILEGE_CTG … /* MC_CMD_VPORT_FREE_IN msgrequest */ #define MC_CMD_VPORT_FREE_IN_LEN … /* The handle of the v-port */ #define MC_CMD_VPORT_FREE_IN_VPORT_ID_OFST … #define MC_CMD_VPORT_FREE_IN_VPORT_ID_LEN … /* MC_CMD_VPORT_FREE_OUT msgresponse */ #define MC_CMD_VPORT_FREE_OUT_LEN … /***********************************/ /* MC_CMD_VADAPTOR_ALLOC * allocate a v-adaptor. */ #define MC_CMD_VADAPTOR_ALLOC … #undef MC_CMD_0x98_PRIVILEGE_CTG #define MC_CMD_0x98_PRIVILEGE_CTG … /* MC_CMD_VADAPTOR_ALLOC_IN msgrequest */ #define MC_CMD_VADAPTOR_ALLOC_IN_LEN … /* The port to connect to the v-adaptor's port. */ #define MC_CMD_VADAPTOR_ALLOC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_UPSTREAM_PORT_ID_LEN … /* Flags controlling v-adaptor creation */ #define MC_CMD_VADAPTOR_ALLOC_IN_FLAGS_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAGS_LEN … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_AUTO_VADAPTOR_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_AUTO_VADAPTOR_LBN … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_AUTO_VADAPTOR_WIDTH … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN … #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH … /* The number of VLAN tags to strip on receive */ #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLANS_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLANS_LEN … /* The number of VLAN tags to transparently insert/remove. */ #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLAN_TAGS_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLAN_TAGS_LEN … /* The actual VLAN tags to insert/remove */ #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAGS_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAGS_LEN … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_0_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_0_LBN … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_0_WIDTH … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_1_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_1_LBN … #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_1_WIDTH … /* The MAC address to assign to this v-adaptor */ #define MC_CMD_VADAPTOR_ALLOC_IN_MACADDR_OFST … #define MC_CMD_VADAPTOR_ALLOC_IN_MACADDR_LEN … /* enum: Derive the MAC address from the upstream port */ #define MC_CMD_VADAPTOR_ALLOC_IN_AUTO_MAC … /* MC_CMD_VADAPTOR_ALLOC_OUT msgresponse */ #define MC_CMD_VADAPTOR_ALLOC_OUT_LEN … /***********************************/ /* MC_CMD_VADAPTOR_FREE * de-allocate a v-adaptor. */ #define MC_CMD_VADAPTOR_FREE … #undef MC_CMD_0x99_PRIVILEGE_CTG #define MC_CMD_0x99_PRIVILEGE_CTG … /* MC_CMD_VADAPTOR_FREE_IN msgrequest */ #define MC_CMD_VADAPTOR_FREE_IN_LEN … /* The port to which the v-adaptor is connected. */ #define MC_CMD_VADAPTOR_FREE_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VADAPTOR_FREE_IN_UPSTREAM_PORT_ID_LEN … /* MC_CMD_VADAPTOR_FREE_OUT msgresponse */ #define MC_CMD_VADAPTOR_FREE_OUT_LEN … /***********************************/ /* MC_CMD_VADAPTOR_SET_MAC * assign a new MAC address to a v-adaptor. */ #define MC_CMD_VADAPTOR_SET_MAC … #undef MC_CMD_0x5d_PRIVILEGE_CTG #define MC_CMD_0x5d_PRIVILEGE_CTG … /* MC_CMD_VADAPTOR_SET_MAC_IN msgrequest */ #define MC_CMD_VADAPTOR_SET_MAC_IN_LEN … /* The port to which the v-adaptor is connected. */ #define MC_CMD_VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID_LEN … /* The new MAC address to assign to this v-adaptor */ #define MC_CMD_VADAPTOR_SET_MAC_IN_MACADDR_OFST … #define MC_CMD_VADAPTOR_SET_MAC_IN_MACADDR_LEN … /* MC_CMD_VADAPTOR_SET_MAC_OUT msgresponse */ #define MC_CMD_VADAPTOR_SET_MAC_OUT_LEN … /***********************************/ /* MC_CMD_VADAPTOR_GET_MAC * read the MAC address assigned to a v-adaptor. */ #define MC_CMD_VADAPTOR_GET_MAC … #undef MC_CMD_0x5e_PRIVILEGE_CTG #define MC_CMD_0x5e_PRIVILEGE_CTG … /* MC_CMD_VADAPTOR_GET_MAC_IN msgrequest */ #define MC_CMD_VADAPTOR_GET_MAC_IN_LEN … /* The port to which the v-adaptor is connected. */ #define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_LEN … /* MC_CMD_VADAPTOR_GET_MAC_OUT msgresponse */ #define MC_CMD_VADAPTOR_GET_MAC_OUT_LEN … /* The MAC address assigned to this v-adaptor */ #define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_OFST … #define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_LEN … /***********************************/ /* MC_CMD_VADAPTOR_QUERY * read some config of v-adaptor. */ #define MC_CMD_VADAPTOR_QUERY … #undef MC_CMD_0x61_PRIVILEGE_CTG #define MC_CMD_0x61_PRIVILEGE_CTG … /* MC_CMD_VADAPTOR_QUERY_IN msgrequest */ #define MC_CMD_VADAPTOR_QUERY_IN_LEN … /* The port to which the v-adaptor is connected. */ #define MC_CMD_VADAPTOR_QUERY_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_VADAPTOR_QUERY_IN_UPSTREAM_PORT_ID_LEN … /* MC_CMD_VADAPTOR_QUERY_OUT msgresponse */ #define MC_CMD_VADAPTOR_QUERY_OUT_LEN … /* The EVB port flags as defined at MC_CMD_VPORT_ALLOC. */ #define MC_CMD_VADAPTOR_QUERY_OUT_PORT_FLAGS_OFST … #define MC_CMD_VADAPTOR_QUERY_OUT_PORT_FLAGS_LEN … /* The v-adaptor flags as defined at MC_CMD_VADAPTOR_ALLOC. */ #define MC_CMD_VADAPTOR_QUERY_OUT_VADAPTOR_FLAGS_OFST … #define MC_CMD_VADAPTOR_QUERY_OUT_VADAPTOR_FLAGS_LEN … /* The number of VLAN tags that may still be added */ #define MC_CMD_VADAPTOR_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST … #define MC_CMD_VADAPTOR_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN … /***********************************/ /* MC_CMD_EVB_PORT_ASSIGN * assign a port to a PCI function. */ #define MC_CMD_EVB_PORT_ASSIGN … #undef MC_CMD_0x9a_PRIVILEGE_CTG #define MC_CMD_0x9a_PRIVILEGE_CTG … /* MC_CMD_EVB_PORT_ASSIGN_IN msgrequest */ #define MC_CMD_EVB_PORT_ASSIGN_IN_LEN … /* The port to assign. */ #define MC_CMD_EVB_PORT_ASSIGN_IN_PORT_ID_OFST … #define MC_CMD_EVB_PORT_ASSIGN_IN_PORT_ID_LEN … /* The target function to modify. */ #define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_OFST … #define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_LEN … #define MC_CMD_EVB_PORT_ASSIGN_IN_PF_OFST … #define MC_CMD_EVB_PORT_ASSIGN_IN_PF_LBN … #define MC_CMD_EVB_PORT_ASSIGN_IN_PF_WIDTH … #define MC_CMD_EVB_PORT_ASSIGN_IN_VF_OFST … #define MC_CMD_EVB_PORT_ASSIGN_IN_VF_LBN … #define MC_CMD_EVB_PORT_ASSIGN_IN_VF_WIDTH … /* MC_CMD_EVB_PORT_ASSIGN_OUT msgresponse */ #define MC_CMD_EVB_PORT_ASSIGN_OUT_LEN … /***********************************/ /* MC_CMD_RDWR_A64_REGIONS * Assign the 64 bit region addresses. */ #define MC_CMD_RDWR_A64_REGIONS … #undef MC_CMD_0x9b_PRIVILEGE_CTG #define MC_CMD_0x9b_PRIVILEGE_CTG … /* MC_CMD_RDWR_A64_REGIONS_IN msgrequest */ #define MC_CMD_RDWR_A64_REGIONS_IN_LEN … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_OFST … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_LEN … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_LEN … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_OFST … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_LEN … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_OFST … #define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_LEN … /* Write enable bits 0-3, set to write, clear to read. */ #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_LBN … #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH … #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_OFST … #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_LEN … /* MC_CMD_RDWR_A64_REGIONS_OUT msgresponse: This data always included * regardless of state of write bits in the request. */ #define MC_CMD_RDWR_A64_REGIONS_OUT_LEN … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_OFST … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_LEN … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_LEN … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_OFST … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_LEN … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_OFST … #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_LEN … /***********************************/ /* MC_CMD_ONLOAD_STACK_ALLOC * Allocate an Onload stack ID. */ #define MC_CMD_ONLOAD_STACK_ALLOC … #undef MC_CMD_0x9c_PRIVILEGE_CTG #define MC_CMD_0x9c_PRIVILEGE_CTG … /* MC_CMD_ONLOAD_STACK_ALLOC_IN msgrequest */ #define MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN … /* The handle of the owning upstream port */ #define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_LEN … /* MC_CMD_ONLOAD_STACK_ALLOC_OUT msgresponse */ #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN … /* The handle of the new Onload stack */ #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_OFST … #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_LEN … /***********************************/ /* MC_CMD_ONLOAD_STACK_FREE * Free an Onload stack ID. */ #define MC_CMD_ONLOAD_STACK_FREE … #undef MC_CMD_0x9d_PRIVILEGE_CTG #define MC_CMD_0x9d_PRIVILEGE_CTG … /* MC_CMD_ONLOAD_STACK_FREE_IN msgrequest */ #define MC_CMD_ONLOAD_STACK_FREE_IN_LEN … /* The handle of the Onload stack */ #define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_OFST … #define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_LEN … /* MC_CMD_ONLOAD_STACK_FREE_OUT msgresponse */ #define MC_CMD_ONLOAD_STACK_FREE_OUT_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_ALLOC * Allocate an RSS context. */ #define MC_CMD_RSS_CONTEXT_ALLOC … #undef MC_CMD_0x9e_PRIVILEGE_CTG #define MC_CMD_0x9e_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_ALLOC_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN … /* The handle of the owning upstream port */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID_LEN … /* The type of context to allocate */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_LEN … /* enum: Allocate a context for exclusive use. The key and indirection table * must be explicitly configured. */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE … /* enum: Allocate a context for shared use; this will spread across a range of * queues, but the key and indirection table are pre-configured and may not be * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64. */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED … /* enum: Allocate a context to spread evenly across an arbitrary number of * queues. No indirection table space is allocated for this context. (EF100 and * later) */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EVEN_SPREADING … /* Number of queues spanned by this context. For exclusive contexts this must * be in the range 1 to RSS_MAX_INDIRECTION_QUEUES, where * RSS_MAX_INDIRECTION_QUEUES is queried from MC_CMD_GET_CAPABILITIES_V9 or if * V9 is not supported then RSS_MAX_INDIRECTION_QUEUES is 64. Valid entries in * the indirection table will be in the range 0 to NUM_QUEUES-1. For even- * spreading contexts this must be in the range 1 to * RSS_MAX_EVEN_SPREADING_QUEUES as queried from MC_CMD_GET_CAPABILITIES. Note * that specifying NUM_QUEUES = 1 will not perform any spreading but may still * be useful as a way of obtaining the Toeplitz hash. */ #define MC_CMD_RSS_CONTEXT_ALLOC_IN_NUM_QUEUES_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_IN_NUM_QUEUES_LEN … /* MC_CMD_RSS_CONTEXT_ALLOC_V2_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_LEN … /* The handle of the owning upstream port */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_UPSTREAM_PORT_ID_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_UPSTREAM_PORT_ID_LEN … /* The type of context to allocate */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_LEN … /* enum: Allocate a context for exclusive use. The key and indirection table * must be explicitly configured. */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_EXCLUSIVE … /* enum: Allocate a context for shared use; this will spread across a range of * queues, but the key and indirection table are pre-configured and may not be * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64. */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_SHARED … /* enum: Allocate a context to spread evenly across an arbitrary number of * queues. No indirection table space is allocated for this context. (EF100 and * later) */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_EVEN_SPREADING … /* Number of queues spanned by this context. For exclusive contexts this must * be in the range 1 to RSS_MAX_INDIRECTION_QUEUES, where * RSS_MAX_INDIRECTION_QUEUES is queried from MC_CMD_GET_CAPABILITIES_V9 or if * V9 is not supported then RSS_MAX_INDIRECTION_QUEUES is 64. Valid entries in * the indirection table will be in the range 0 to NUM_QUEUES-1. For even- * spreading contexts this must be in the range 1 to * RSS_MAX_EVEN_SPREADING_QUEUES as queried from MC_CMD_GET_CAPABILITIES. Note * that specifying NUM_QUEUES = 1 will not perform any spreading but may still * be useful as a way of obtaining the Toeplitz hash. */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_NUM_QUEUES_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_NUM_QUEUES_LEN … /* Size of indirection table to be allocated to this context from the pool. * Must be a power of 2. The minimum and maximum table size can be queried * using MC_CMD_GET_CAPABILITIES_V9. If there is not enough space remaining in * the common pool to allocate the requested table size, due to allocating * table space to other RSS contexts, then the command will fail with * MC_CMD_ERR_ENOSPC. */ #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_INDIRECTION_TABLE_SIZE_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_INDIRECTION_TABLE_SIZE_LEN … /* MC_CMD_RSS_CONTEXT_ALLOC_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN … /* The handle of the new RSS context. This should be considered opaque to the * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid * handle. */ #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_LEN … /* enum: guaranteed invalid RSS context handle value */ #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_INVALID … /***********************************/ /* MC_CMD_RSS_CONTEXT_FREE * Free an RSS context. */ #define MC_CMD_RSS_CONTEXT_FREE … #undef MC_CMD_0x9f_PRIVILEGE_CTG #define MC_CMD_0x9f_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_FREE_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_FREE_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID_LEN … /* MC_CMD_RSS_CONTEXT_FREE_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_FREE_OUT_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_SET_KEY * Set the Toeplitz hash key for an RSS context. */ #define MC_CMD_RSS_CONTEXT_SET_KEY … #undef MC_CMD_0xa0_PRIVILEGE_CTG #define MC_CMD_0xa0_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_SET_KEY_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID_LEN … /* The 40-byte Toeplitz hash key (TBD endianness issues?) */ #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_OFST … #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN … /* MC_CMD_RSS_CONTEXT_SET_KEY_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_GET_KEY * Get the Toeplitz hash key for an RSS context. */ #define MC_CMD_RSS_CONTEXT_GET_KEY … #undef MC_CMD_0xa1_PRIVILEGE_CTG #define MC_CMD_0xa1_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_GET_KEY_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_RSS_CONTEXT_ID_LEN … /* MC_CMD_RSS_CONTEXT_GET_KEY_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_LEN … /* The 40-byte Toeplitz hash key (TBD endianness issues?) */ #define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY_OFST … #define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_SET_TABLE * Set the indirection table for an RSS context. This command should only be * used with indirection tables containing 128 entries, which is the default * when the RSS context is allocated without specifying a table size. */ #define MC_CMD_RSS_CONTEXT_SET_TABLE … #undef MC_CMD_0xa2_PRIVILEGE_CTG #define MC_CMD_0xa2_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_SET_TABLE_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID_LEN … /* The 128-byte indirection table (1 byte per entry) */ #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_OFST … #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN … /* MC_CMD_RSS_CONTEXT_SET_TABLE_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_GET_TABLE * Get the indirection table for an RSS context. This command should only be * used with indirection tables containing 128 entries, which is the default * when the RSS context is allocated without specifying a table size. */ #define MC_CMD_RSS_CONTEXT_GET_TABLE … #undef MC_CMD_0xa3_PRIVILEGE_CTG #define MC_CMD_0xa3_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_GET_TABLE_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_RSS_CONTEXT_ID_LEN … /* MC_CMD_RSS_CONTEXT_GET_TABLE_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_LEN … /* The 128-byte indirection table (1 byte per entry) */ #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_OFST … #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_WRITE_TABLE * Write a portion of a selectable-size indirection table for an RSS context. * This command must be used instead of MC_CMD_RSS_CONTEXT_SET_TABLE if the * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES. */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE … #undef MC_CMD_0x13e_PRIVILEGE_CTG #define MC_CMD_0x13e_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMIN … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX_MCDI2 … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LEN(num) … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_NUM(len) … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_LEN … /* An array of index-value pairs to be written to the table. Structure is * MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY. */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_OFST … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_LEN … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MINNUM … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM_MCDI2 … /* MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT_LEN … /* MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY structuredef */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_LEN … /* The index of the table entry to be written. */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_OFST … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LEN … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LBN … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_WIDTH … /* The value to write into the table entry. */ #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_OFST … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LEN … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LBN … #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_WIDTH … /***********************************/ /* MC_CMD_RSS_CONTEXT_READ_TABLE * Read a portion of a selectable-size indirection table for an RSS context. * This command must be used instead of MC_CMD_RSS_CONTEXT_GET_TABLE if the * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES. */ #define MC_CMD_RSS_CONTEXT_READ_TABLE … #undef MC_CMD_0x13f_PRIVILEGE_CTG #define MC_CMD_0x13f_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_READ_TABLE_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMIN … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX_MCDI2 … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LEN(num) … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_NUM(len) … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_LEN … /* An array containing the indices of the entries to be read. */ #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_OFST … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_LEN … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MINNUM … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM … #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM_MCDI2 … /* MC_CMD_RSS_CONTEXT_READ_TABLE_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMIN … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX_MCDI2 … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LEN(num) … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_NUM(len) … /* A buffer containing the requested entries read from the table. */ #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_OFST … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_LEN … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MINNUM … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM … #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_RSS_CONTEXT_SET_FLAGS * Set various control flags for an RSS context. */ #define MC_CMD_RSS_CONTEXT_SET_FLAGS … #undef MC_CMD_0xe1_PRIVILEGE_CTG #define MC_CMD_0xe1_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_SET_FLAGS_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID_LEN … /* Hash control flags. The _EN bits are always supported, but new modes are * available when ADDITIONAL_RSS_MODES is reported by MC_CMD_GET_CAPABILITIES: * in this case, the MODE fields may be set to non-zero values, and will take * effect regardless of the settings of the _EN flags. See the RSS_MODE * structure for the meaning of the mode bits. Drivers must check the * capability before trying to set any _MODE fields, as older firmware will * reject any attempt to set the FLAGS field to a value > 0xff with EINVAL. In * the case where all the _MODE flags are zero, the _EN flags take effect, * providing backward compatibility for existing drivers. (Setting all _MODE * *and* all _EN flags to zero is valid, to disable RSS spreading for that * particular packet type.) */ #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_LEN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH … /* MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN … /***********************************/ /* MC_CMD_RSS_CONTEXT_GET_FLAGS * Get various control flags for an RSS context. */ #define MC_CMD_RSS_CONTEXT_GET_FLAGS … #undef MC_CMD_0xe2_PRIVILEGE_CTG #define MC_CMD_0xe2_PRIVILEGE_CTG … /* MC_CMD_RSS_CONTEXT_GET_FLAGS_IN msgrequest */ #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_LEN … /* The handle of the RSS context */ #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_RSS_CONTEXT_ID_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_RSS_CONTEXT_ID_LEN … /* MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT msgresponse */ #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_LEN … /* Hash control flags. If all _MODE bits are zero (which will always be true * for older firmware which does not report the ADDITIONAL_RSS_MODES * capability), the _EN bits report the state. If any _MODE bits are non-zero * (which will only be true when the firmware reports ADDITIONAL_RSS_MODES) * then the _EN bits should be disregarded, although the _MODE flags are * guaranteed to be consistent with the _EN flags for a freshly-allocated RSS * context and in the case where the _EN flags were used in the SET. This * provides backward compatibility: old drivers will not be attempting to * derive any meaning from the _MODE bits (and can never set them to any value * not representable by the _EN bits); new drivers can always determine the * mode by looking only at the _MODE bits; the value returned by a GET can * always be used for a SET regardless of old/new driver vs. old/new firmware. */ #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_LEN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_WIDTH … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_OFST … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_LBN … #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_WIDTH … /***********************************/ /* MC_CMD_VPORT_ADD_MAC_ADDRESS * Add a MAC address to a v-port */ #define MC_CMD_VPORT_ADD_MAC_ADDRESS … #undef MC_CMD_0xa8_PRIVILEGE_CTG #define MC_CMD_0xa8_PRIVILEGE_CTG … /* MC_CMD_VPORT_ADD_MAC_ADDRESS_IN msgrequest */ #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_LEN … /* The handle of the v-port */ #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_VPORT_ID_OFST … #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_VPORT_ID_LEN … /* MAC address to add */ #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_MACADDR_OFST … #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_MACADDR_LEN … /* MC_CMD_VPORT_ADD_MAC_ADDRESS_OUT msgresponse */ #define MC_CMD_VPORT_ADD_MAC_ADDRESS_OUT_LEN … /***********************************/ /* MC_CMD_VPORT_DEL_MAC_ADDRESS * Delete a MAC address from a v-port */ #define MC_CMD_VPORT_DEL_MAC_ADDRESS … #undef MC_CMD_0xa9_PRIVILEGE_CTG #define MC_CMD_0xa9_PRIVILEGE_CTG … /* MC_CMD_VPORT_DEL_MAC_ADDRESS_IN msgrequest */ #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_LEN … /* The handle of the v-port */ #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_VPORT_ID_OFST … #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_VPORT_ID_LEN … /* MAC address to add */ #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_MACADDR_OFST … #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_MACADDR_LEN … /* MC_CMD_VPORT_DEL_MAC_ADDRESS_OUT msgresponse */ #define MC_CMD_VPORT_DEL_MAC_ADDRESS_OUT_LEN … /***********************************/ /* MC_CMD_VPORT_GET_MAC_ADDRESSES * Delete a MAC address from a v-port */ #define MC_CMD_VPORT_GET_MAC_ADDRESSES … #undef MC_CMD_0xaa_PRIVILEGE_CTG #define MC_CMD_0xaa_PRIVILEGE_CTG … /* MC_CMD_VPORT_GET_MAC_ADDRESSES_IN msgrequest */ #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_LEN … /* The handle of the v-port */ #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_VPORT_ID_OFST … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_VPORT_ID_LEN … /* MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT msgresponse */ #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMIN … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX_MCDI2 … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LEN(num) … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_NUM(len) … /* The number of MAC addresses returned */ #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_OFST … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_LEN … /* Array of MAC addresses */ #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_OFST … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_LEN … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MINNUM … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MAXNUM … #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_VPORT_RECONFIGURE * Replace VLAN tags and/or MAC addresses of an existing v-port. If the v-port * has already been passed to another function (v-port's user), then that * function will be reset before applying the changes. */ #define MC_CMD_VPORT_RECONFIGURE … #undef MC_CMD_0xeb_PRIVILEGE_CTG #define MC_CMD_0xeb_PRIVILEGE_CTG … /* MC_CMD_VPORT_RECONFIGURE_IN msgrequest */ #define MC_CMD_VPORT_RECONFIGURE_IN_LEN … /* The handle of the v-port */ #define MC_CMD_VPORT_RECONFIGURE_IN_VPORT_ID_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_VPORT_ID_LEN … /* Flags requesting what should be changed. */ #define MC_CMD_VPORT_RECONFIGURE_IN_FLAGS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_FLAGS_LEN … #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_VLAN_TAGS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_VLAN_TAGS_LBN … #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_VLAN_TAGS_WIDTH … #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_LBN … #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_WIDTH … /* The number of VLAN tags to insert/remove. An error will be returned if * incompatible with the number of VLAN tags specified for the upstream * v-switch. */ #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_VLAN_TAGS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_VLAN_TAGS_LEN … /* The actual VLAN tags to insert/remove */ #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAGS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAGS_LEN … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAG_0_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAG_0_LBN … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAG_0_WIDTH … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAG_1_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAG_1_LBN … #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAG_1_WIDTH … /* The number of MAC addresses to add */ #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_MACADDRS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_MACADDRS_LEN … /* MAC addresses to add */ #define MC_CMD_VPORT_RECONFIGURE_IN_MACADDRS_OFST … #define MC_CMD_VPORT_RECONFIGURE_IN_MACADDRS_LEN … #define MC_CMD_VPORT_RECONFIGURE_IN_MACADDRS_NUM … /* MC_CMD_VPORT_RECONFIGURE_OUT msgresponse */ #define MC_CMD_VPORT_RECONFIGURE_OUT_LEN … #define MC_CMD_VPORT_RECONFIGURE_OUT_FLAGS_OFST … #define MC_CMD_VPORT_RECONFIGURE_OUT_FLAGS_LEN … #define MC_CMD_VPORT_RECONFIGURE_OUT_RESET_DONE_OFST … #define MC_CMD_VPORT_RECONFIGURE_OUT_RESET_DONE_LBN … #define MC_CMD_VPORT_RECONFIGURE_OUT_RESET_DONE_WIDTH … /***********************************/ /* MC_CMD_EVB_PORT_QUERY * read some config of v-port. */ #define MC_CMD_EVB_PORT_QUERY … #undef MC_CMD_0x62_PRIVILEGE_CTG #define MC_CMD_0x62_PRIVILEGE_CTG … /* MC_CMD_EVB_PORT_QUERY_IN msgrequest */ #define MC_CMD_EVB_PORT_QUERY_IN_LEN … /* The handle of the v-port */ #define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_OFST … #define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_LEN … /* MC_CMD_EVB_PORT_QUERY_OUT msgresponse */ #define MC_CMD_EVB_PORT_QUERY_OUT_LEN … /* The EVB port flags as defined at MC_CMD_VPORT_ALLOC. */ #define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_OFST … #define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_LEN … /* The number of VLAN tags that may be used on a v-adaptor connected to this * EVB port. */ #define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST … #define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN … /***********************************/ /* MC_CMD_GET_CLOCK * Return the system and PDCPU clock frequencies. */ #define MC_CMD_GET_CLOCK … #undef MC_CMD_0xac_PRIVILEGE_CTG #define MC_CMD_0xac_PRIVILEGE_CTG … /* MC_CMD_GET_CLOCK_IN msgrequest */ #define MC_CMD_GET_CLOCK_IN_LEN … /* MC_CMD_GET_CLOCK_OUT msgresponse */ #define MC_CMD_GET_CLOCK_OUT_LEN … /* System frequency, MHz */ #define MC_CMD_GET_CLOCK_OUT_SYS_FREQ_OFST … #define MC_CMD_GET_CLOCK_OUT_SYS_FREQ_LEN … /* DPCPU frequency, MHz */ #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_OFST … #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_LEN … /***********************************/ /* MC_CMD_TRIGGER_INTERRUPT * Trigger an interrupt by prodding the BIU. */ #define MC_CMD_TRIGGER_INTERRUPT … #undef MC_CMD_0xe3_PRIVILEGE_CTG #define MC_CMD_0xe3_PRIVILEGE_CTG … /* MC_CMD_TRIGGER_INTERRUPT_IN msgrequest */ #define MC_CMD_TRIGGER_INTERRUPT_IN_LEN … /* Interrupt level relative to base for function. */ #define MC_CMD_TRIGGER_INTERRUPT_IN_INTR_LEVEL_OFST … #define MC_CMD_TRIGGER_INTERRUPT_IN_INTR_LEVEL_LEN … /* MC_CMD_TRIGGER_INTERRUPT_OUT msgresponse */ #define MC_CMD_TRIGGER_INTERRUPT_OUT_LEN … /***********************************/ /* MC_CMD_SHMBOOT_OP * Special operations to support (for now) shmboot. */ #define MC_CMD_SHMBOOT_OP … #undef MC_CMD_0xe6_PRIVILEGE_CTG #define MC_CMD_0xe6_PRIVILEGE_CTG … /* MC_CMD_SHMBOOT_OP_IN msgrequest */ #define MC_CMD_SHMBOOT_OP_IN_LEN … /* Identifies the operation to perform */ #define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_OFST … #define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_LEN … /* enum: Copy slave_data section to the slave core. (Greenport only) */ #define MC_CMD_SHMBOOT_OP_IN_PUSH_SLAVE_DATA … /* MC_CMD_SHMBOOT_OP_OUT msgresponse */ #define MC_CMD_SHMBOOT_OP_OUT_LEN … /***********************************/ /* MC_CMD_SET_PSU * Adjusts power supply parameters. This is a warranty-voiding operation. * Returns: ENOENT if the parameter or rail specified does not exist, EINVAL if * the parameter is out of range. */ #define MC_CMD_SET_PSU … #undef MC_CMD_0xea_PRIVILEGE_CTG #define MC_CMD_0xea_PRIVILEGE_CTG … /* MC_CMD_SET_PSU_IN msgrequest */ #define MC_CMD_SET_PSU_IN_LEN … #define MC_CMD_SET_PSU_IN_PARAM_OFST … #define MC_CMD_SET_PSU_IN_PARAM_LEN … #define MC_CMD_SET_PSU_IN_PARAM_SUPPLY_VOLTAGE … #define MC_CMD_SET_PSU_IN_RAIL_OFST … #define MC_CMD_SET_PSU_IN_RAIL_LEN … #define MC_CMD_SET_PSU_IN_RAIL_0V9 … #define MC_CMD_SET_PSU_IN_RAIL_1V2 … /* desired value, eg voltage in mV */ #define MC_CMD_SET_PSU_IN_VALUE_OFST … #define MC_CMD_SET_PSU_IN_VALUE_LEN … /* MC_CMD_SET_PSU_OUT msgresponse */ #define MC_CMD_SET_PSU_OUT_LEN … /***********************************/ /* MC_CMD_GET_FUNCTION_INFO * Get function information. PF and VF number. */ #define MC_CMD_GET_FUNCTION_INFO … #undef MC_CMD_0xec_PRIVILEGE_CTG #define MC_CMD_0xec_PRIVILEGE_CTG … /* MC_CMD_GET_FUNCTION_INFO_IN msgrequest */ #define MC_CMD_GET_FUNCTION_INFO_IN_LEN … /* MC_CMD_GET_FUNCTION_INFO_OUT msgresponse */ #define MC_CMD_GET_FUNCTION_INFO_OUT_LEN … #define MC_CMD_GET_FUNCTION_INFO_OUT_PF_OFST … #define MC_CMD_GET_FUNCTION_INFO_OUT_PF_LEN … #define MC_CMD_GET_FUNCTION_INFO_OUT_VF_OFST … #define MC_CMD_GET_FUNCTION_INFO_OUT_VF_LEN … /***********************************/ /* MC_CMD_ENABLE_OFFLINE_BIST * Enters offline BIST mode. All queues are torn down, chip enters quiescent * mode, calling function gets exclusive MCDI ownership. The only way out is * reboot. */ #define MC_CMD_ENABLE_OFFLINE_BIST … #undef MC_CMD_0xed_PRIVILEGE_CTG #define MC_CMD_0xed_PRIVILEGE_CTG … /* MC_CMD_ENABLE_OFFLINE_BIST_IN msgrequest */ #define MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN … /* MC_CMD_ENABLE_OFFLINE_BIST_OUT msgresponse */ #define MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN … /***********************************/ /* MC_CMD_READ_FUSES * Read data programmed into the device One-Time-Programmable (OTP) Fuses */ #define MC_CMD_READ_FUSES … #undef MC_CMD_0xf0_PRIVILEGE_CTG #define MC_CMD_0xf0_PRIVILEGE_CTG … /* MC_CMD_READ_FUSES_IN msgrequest */ #define MC_CMD_READ_FUSES_IN_LEN … /* Offset in OTP to read */ #define MC_CMD_READ_FUSES_IN_OFFSET_OFST … #define MC_CMD_READ_FUSES_IN_OFFSET_LEN … /* Length of data to read in bytes */ #define MC_CMD_READ_FUSES_IN_LENGTH_OFST … #define MC_CMD_READ_FUSES_IN_LENGTH_LEN … /* MC_CMD_READ_FUSES_OUT msgresponse */ #define MC_CMD_READ_FUSES_OUT_LENMIN … #define MC_CMD_READ_FUSES_OUT_LENMAX … #define MC_CMD_READ_FUSES_OUT_LENMAX_MCDI2 … #define MC_CMD_READ_FUSES_OUT_LEN(num) … #define MC_CMD_READ_FUSES_OUT_DATA_NUM(len) … /* Length of returned OTP data in bytes */ #define MC_CMD_READ_FUSES_OUT_LENGTH_OFST … #define MC_CMD_READ_FUSES_OUT_LENGTH_LEN … /* Returned data */ #define MC_CMD_READ_FUSES_OUT_DATA_OFST … #define MC_CMD_READ_FUSES_OUT_DATA_LEN … #define MC_CMD_READ_FUSES_OUT_DATA_MINNUM … #define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM … #define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_LICENSING * Operations on the NVRAM_PARTITION_TYPE_LICENSE application license partition * - not used for V3 licensing */ #define MC_CMD_LICENSING … #undef MC_CMD_0xf3_PRIVILEGE_CTG #define MC_CMD_0xf3_PRIVILEGE_CTG … /* MC_CMD_LICENSING_IN msgrequest */ #define MC_CMD_LICENSING_IN_LEN … /* identifies the type of operation requested */ #define MC_CMD_LICENSING_IN_OP_OFST … #define MC_CMD_LICENSING_IN_OP_LEN … /* enum: re-read and apply licenses after a license key partition update; note * that this operation returns a zero-length response */ #define MC_CMD_LICENSING_IN_OP_UPDATE_LICENSE … /* enum: report counts of installed licenses */ #define MC_CMD_LICENSING_IN_OP_GET_KEY_STATS … /* MC_CMD_LICENSING_OUT msgresponse */ #define MC_CMD_LICENSING_OUT_LEN … /* count of application keys which are valid */ #define MC_CMD_LICENSING_OUT_VALID_APP_KEYS_OFST … #define MC_CMD_LICENSING_OUT_VALID_APP_KEYS_LEN … /* sum of UNVERIFIABLE_APP_KEYS + WRONG_NODE_APP_KEYS (for compatibility with * MC_CMD_FC_OP_LICENSE) */ #define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_OFST … #define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_LEN … /* count of application keys which are invalid due to being blacklisted */ #define MC_CMD_LICENSING_OUT_BLACKLISTED_APP_KEYS_OFST … #define MC_CMD_LICENSING_OUT_BLACKLISTED_APP_KEYS_LEN … /* count of application keys which are invalid due to being unverifiable */ #define MC_CMD_LICENSING_OUT_UNVERIFIABLE_APP_KEYS_OFST … #define MC_CMD_LICENSING_OUT_UNVERIFIABLE_APP_KEYS_LEN … /* count of application keys which are invalid due to being for the wrong node */ #define MC_CMD_LICENSING_OUT_WRONG_NODE_APP_KEYS_OFST … #define MC_CMD_LICENSING_OUT_WRONG_NODE_APP_KEYS_LEN … /* licensing state (for diagnostics; the exact meaning of the bits in this * field are private to the firmware) */ #define MC_CMD_LICENSING_OUT_LICENSING_STATE_OFST … #define MC_CMD_LICENSING_OUT_LICENSING_STATE_LEN … /* licensing subsystem self-test report (for manftest) */ #define MC_CMD_LICENSING_OUT_LICENSING_SELF_TEST_OFST … #define MC_CMD_LICENSING_OUT_LICENSING_SELF_TEST_LEN … /* enum: licensing subsystem self-test failed */ #define MC_CMD_LICENSING_OUT_SELF_TEST_FAIL … /* enum: licensing subsystem self-test passed */ #define MC_CMD_LICENSING_OUT_SELF_TEST_PASS … /***********************************/ /* MC_CMD_LICENSING_V3 * Operations on the NVRAM_PARTITION_TYPE_LICENSE application license partition * - V3 licensing (Medford) */ #define MC_CMD_LICENSING_V3 … #undef MC_CMD_0xd0_PRIVILEGE_CTG #define MC_CMD_0xd0_PRIVILEGE_CTG … /* MC_CMD_LICENSING_V3_IN msgrequest */ #define MC_CMD_LICENSING_V3_IN_LEN … /* identifies the type of operation requested */ #define MC_CMD_LICENSING_V3_IN_OP_OFST … #define MC_CMD_LICENSING_V3_IN_OP_LEN … /* enum: re-read and apply licenses after a license key partition update; note * that this operation returns a zero-length response */ #define MC_CMD_LICENSING_V3_IN_OP_UPDATE_LICENSE … /* enum: report counts of installed licenses Returns EAGAIN if license * processing (updating) has been started but not yet completed. */ #define MC_CMD_LICENSING_V3_IN_OP_REPORT_LICENSE … /* MC_CMD_LICENSING_V3_OUT msgresponse */ #define MC_CMD_LICENSING_V3_OUT_LEN … /* count of keys which are valid */ #define MC_CMD_LICENSING_V3_OUT_VALID_KEYS_OFST … #define MC_CMD_LICENSING_V3_OUT_VALID_KEYS_LEN … /* sum of UNVERIFIABLE_KEYS + WRONG_NODE_KEYS (for compatibility with * MC_CMD_FC_OP_LICENSE) */ #define MC_CMD_LICENSING_V3_OUT_INVALID_KEYS_OFST … #define MC_CMD_LICENSING_V3_OUT_INVALID_KEYS_LEN … /* count of keys which are invalid due to being unverifiable */ #define MC_CMD_LICENSING_V3_OUT_UNVERIFIABLE_KEYS_OFST … #define MC_CMD_LICENSING_V3_OUT_UNVERIFIABLE_KEYS_LEN … /* count of keys which are invalid due to being for the wrong node */ #define MC_CMD_LICENSING_V3_OUT_WRONG_NODE_KEYS_OFST … #define MC_CMD_LICENSING_V3_OUT_WRONG_NODE_KEYS_LEN … /* licensing state (for diagnostics; the exact meaning of the bits in this * field are private to the firmware) */ #define MC_CMD_LICENSING_V3_OUT_LICENSING_STATE_OFST … #define MC_CMD_LICENSING_V3_OUT_LICENSING_STATE_LEN … /* licensing subsystem self-test report (for manftest) */ #define MC_CMD_LICENSING_V3_OUT_LICENSING_SELF_TEST_OFST … #define MC_CMD_LICENSING_V3_OUT_LICENSING_SELF_TEST_LEN … /* enum: licensing subsystem self-test failed */ #define MC_CMD_LICENSING_V3_OUT_SELF_TEST_FAIL … /* enum: licensing subsystem self-test passed */ #define MC_CMD_LICENSING_V3_OUT_SELF_TEST_PASS … /* bitmask of licensed applications */ #define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST … #define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN … #define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST … #define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST … /* reserved for future use */ #define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST … #define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN … /* bitmask of licensed features */ #define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST … #define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN … #define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST … #define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST … /* reserved for future use */ #define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST … #define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN … /***********************************/ /* MC_CMD_LICENSING_GET_ID_V3 * Get ID and type from the NVRAM_PARTITION_TYPE_LICENSE application license * partition - V3 licensing (Medford) */ #define MC_CMD_LICENSING_GET_ID_V3 … #undef MC_CMD_0xd1_PRIVILEGE_CTG #define MC_CMD_0xd1_PRIVILEGE_CTG … /* MC_CMD_LICENSING_GET_ID_V3_IN msgrequest */ #define MC_CMD_LICENSING_GET_ID_V3_IN_LEN … /* MC_CMD_LICENSING_GET_ID_V3_OUT msgresponse */ #define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX_MCDI2 … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_NUM(len) … /* type of license (eg 3) */ #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_OFST … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN … /* length of the license ID (in bytes) */ #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_OFST … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_LEN … /* the unique license ID of the adapter */ #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LEN … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MINNUM … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM … #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_GET_LICENSED_APP_STATE * Query the state of an individual licensed application. (Note that the actual * state may be invalidated by the MC_CMD_LICENSING OP_UPDATE_LICENSE operation * or a reboot of the MC.) Not used for V3 licensing */ #define MC_CMD_GET_LICENSED_APP_STATE … #undef MC_CMD_0xf5_PRIVILEGE_CTG #define MC_CMD_0xf5_PRIVILEGE_CTG … /* MC_CMD_GET_LICENSED_APP_STATE_IN msgrequest */ #define MC_CMD_GET_LICENSED_APP_STATE_IN_LEN … /* application ID to query (LICENSED_APP_ID_xxx) */ #define MC_CMD_GET_LICENSED_APP_STATE_IN_APP_ID_OFST … #define MC_CMD_GET_LICENSED_APP_STATE_IN_APP_ID_LEN … /* MC_CMD_GET_LICENSED_APP_STATE_OUT msgresponse */ #define MC_CMD_GET_LICENSED_APP_STATE_OUT_LEN … /* state of this application */ #define MC_CMD_GET_LICENSED_APP_STATE_OUT_STATE_OFST … #define MC_CMD_GET_LICENSED_APP_STATE_OUT_STATE_LEN … /* enum: no (or invalid) license is present for the application */ #define MC_CMD_GET_LICENSED_APP_STATE_OUT_NOT_LICENSED … /* enum: a valid license is present for the application */ #define MC_CMD_GET_LICENSED_APP_STATE_OUT_LICENSED … /***********************************/ /* MC_CMD_GET_LICENSED_V3_APP_STATE * Query the state of an individual licensed application. (Note that the actual * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE * operation or a reboot of the MC.) Used for V3 licensing (Medford) */ #define MC_CMD_GET_LICENSED_V3_APP_STATE … #undef MC_CMD_0xd2_PRIVILEGE_CTG #define MC_CMD_0xd2_PRIVILEGE_CTG … /* MC_CMD_GET_LICENSED_V3_APP_STATE_IN msgrequest */ #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_LEN … /* application ID to query (LICENSED_V3_APPS_xxx) expressed as a single bit * mask */ #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST … #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN … #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST … #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST … /* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */ #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN … /* state of this application */ #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_OFST … #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_LEN … /* enum: no (or invalid) license is present for the application */ #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_NOT_LICENSED … /* enum: a valid license is present for the application */ #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LICENSED … /***********************************/ /* MC_CMD_GET_LICENSED_V3_FEATURE_STATES * Query the state of an one or more licensed features. (Note that the actual * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE * operation or a reboot of the MC.) Used for V3 licensing (Medford) */ #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES … #undef MC_CMD_0xd3_PRIVILEGE_CTG #define MC_CMD_0xd3_PRIVILEGE_CTG … /* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN msgrequest */ #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_LEN … /* features to query (LICENSED_V3_FEATURES_xxx) expressed as a mask with one or * more bits set */ #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST … #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN … #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST … #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST … /* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */ #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN … /* states of these features - bit set for licensed, clear for not licensed */ #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST … #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN … #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST … #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST … /***********************************/ /* MC_CMD_LICENSED_APP_OP * Perform an action for an individual licensed application - not used for V3 * licensing. */ #define MC_CMD_LICENSED_APP_OP … #undef MC_CMD_0xf6_PRIVILEGE_CTG #define MC_CMD_0xf6_PRIVILEGE_CTG … /* MC_CMD_LICENSED_APP_OP_IN msgrequest */ #define MC_CMD_LICENSED_APP_OP_IN_LENMIN … #define MC_CMD_LICENSED_APP_OP_IN_LENMAX … #define MC_CMD_LICENSED_APP_OP_IN_LENMAX_MCDI2 … #define MC_CMD_LICENSED_APP_OP_IN_LEN(num) … #define MC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) … /* application ID */ #define MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST … #define MC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN … /* the type of operation requested */ #define MC_CMD_LICENSED_APP_OP_IN_OP_OFST … #define MC_CMD_LICENSED_APP_OP_IN_OP_LEN … /* enum: validate application */ #define MC_CMD_LICENSED_APP_OP_IN_OP_VALIDATE … /* enum: mask application */ #define MC_CMD_LICENSED_APP_OP_IN_OP_MASK … /* arguments specific to this particular operation */ #define MC_CMD_LICENSED_APP_OP_IN_ARGS_OFST … #define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN … #define MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM … #define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM … #define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM_MCDI2 … /* MC_CMD_LICENSED_APP_OP_OUT msgresponse */ #define MC_CMD_LICENSED_APP_OP_OUT_LENMIN … #define MC_CMD_LICENSED_APP_OP_OUT_LENMAX … #define MC_CMD_LICENSED_APP_OP_OUT_LENMAX_MCDI2 … #define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) … #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) … /* result specific to this particular operation */ #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST … #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN … #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM … #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM … #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM_MCDI2 … /* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN … /* application ID */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_OFST … #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_LEN … /* the type of operation requested */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST … #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_LEN … /* validation challenge */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_OFST … #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_LEN … /* MC_CMD_LICENSED_APP_OP_VALIDATE_OUT msgresponse */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_LEN … /* feature expiry (time_t) */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_OFST … #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_LEN … /* validation response */ #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST … #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_LEN … /* MC_CMD_LICENSED_APP_OP_MASK_IN msgrequest */ #define MC_CMD_LICENSED_APP_OP_MASK_IN_LEN … /* application ID */ #define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_OFST … #define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_LEN … /* the type of operation requested */ #define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST … #define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_LEN … /* flag */ #define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_OFST … #define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_LEN … /* MC_CMD_LICENSED_APP_OP_MASK_OUT msgresponse */ #define MC_CMD_LICENSED_APP_OP_MASK_OUT_LEN … /***********************************/ /* MC_CMD_LICENSED_V3_VALIDATE_APP * Perform validation for an individual licensed application - V3 licensing * (Medford) */ #define MC_CMD_LICENSED_V3_VALIDATE_APP … #undef MC_CMD_0xd4_PRIVILEGE_CTG #define MC_CMD_0xd4_PRIVILEGE_CTG … /* MC_CMD_LICENSED_V3_VALIDATE_APP_IN msgrequest */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_LEN … /* challenge for validation (384 bits) */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_LEN … /* application ID expressed as a single bit mask */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN … #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST … /* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN … /* validation response to challenge in the form of ECDSA signature consisting * of two 384-bit integers, r and s, in big-endian order. The signature signs a * SHA-384 digest of a message constructed from the concatenation of the input * message and the remaining fields of this output message, e.g. challenge[48 * bytes] ... expiry_time[4 bytes] ... */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_LEN … /* application expiry time */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_LEN … /* application expiry units */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_LEN … /* enum: expiry units are accounting units */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_ACC … /* enum: expiry units are calendar days */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_DAYS … /* base MAC address of the NIC stored in NVRAM (note that this is a constant * value for a given NIC regardless which function is calling, effectively this * is PF0 base MAC address) */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_LEN … /* MAC address of v-adaptor associated with the client. If no such v-adapator * exists, then the field is filled with 0xFF. */ #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_OFST … #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_LEN … /***********************************/ /* MC_CMD_LICENSED_V3_MASK_FEATURES * Mask features - V3 licensing (Medford) */ #define MC_CMD_LICENSED_V3_MASK_FEATURES … #undef MC_CMD_0xd5_PRIVILEGE_CTG #define MC_CMD_0xd5_PRIVILEGE_CTG … /* MC_CMD_LICENSED_V3_MASK_FEATURES_IN msgrequest */ #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_LEN … /* mask to be applied to features to be changed */ #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST … #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN … #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST … #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST … /* whether to turn on or turn off the masked features */ #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST … #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN … /* enum: turn the features off */ #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_OFF … /* enum: turn the features back on */ #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_ON … /* MC_CMD_LICENSED_V3_MASK_FEATURES_OUT msgresponse */ #define MC_CMD_LICENSED_V3_MASK_FEATURES_OUT_LEN … /***********************************/ /* MC_CMD_LICENSING_V3_TEMPORARY * Perform operations to support installation of a single temporary license in * the adapter, in addition to those found in the licensing partition. See * SF-116124-SW for an overview of how this could be used. The license is * stored in MC persistent data and so will survive a MC reboot, but will be * erased when the adapter is power cycled */ #define MC_CMD_LICENSING_V3_TEMPORARY … #undef MC_CMD_0xd6_PRIVILEGE_CTG #define MC_CMD_0xd6_PRIVILEGE_CTG … /* MC_CMD_LICENSING_V3_TEMPORARY_IN msgrequest */ #define MC_CMD_LICENSING_V3_TEMPORARY_IN_LEN … /* operation code */ #define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_LEN … /* enum: install a new license, overwriting any existing temporary license. * This is an asynchronous operation owing to the time taken to validate an * ECDSA license */ #define MC_CMD_LICENSING_V3_TEMPORARY_SET … /* enum: clear the license immediately rather than waiting for the next power * cycle */ #define MC_CMD_LICENSING_V3_TEMPORARY_CLEAR … /* enum: get the status of the asynchronous MC_CMD_LICENSING_V3_TEMPORARY_SET * operation */ #define MC_CMD_LICENSING_V3_TEMPORARY_STATUS … /* MC_CMD_LICENSING_V3_TEMPORARY_IN_SET msgrequest */ #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LEN … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_LEN … /* ECDSA license and signature */ #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_LEN … /* MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR msgrequest */ #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_LEN … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_LEN … /* MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS msgrequest */ #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_LEN … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_LEN … /* MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS msgresponse */ #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LEN … /* status code */ #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_LEN … /* enum: finished validating and installing license */ #define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_OK … /* enum: license validation and installation in progress */ #define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_IN_PROGRESS … /* enum: licensing error. More specific error messages are not provided to * avoid exposing details of the licensing system to the client */ #define MC_CMD_LICENSING_V3_TEMPORARY_STATUS_ERROR … /* bitmask of licensed features */ #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN … #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST … #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST … /***********************************/ /* MC_CMD_SET_PARSER_DISP_CONFIG * Change configuration related to the parser-dispatcher subsystem. */ #define MC_CMD_SET_PARSER_DISP_CONFIG … #undef MC_CMD_0xf9_PRIVILEGE_CTG #define MC_CMD_0xf9_PRIVILEGE_CTG … /* MC_CMD_SET_PARSER_DISP_CONFIG_IN msgrequest */ #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMIN … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX_MCDI2 … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LEN(num) … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_NUM(len) … /* the type of configuration setting to change */ #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_OFST … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_LEN … /* enum: Per-TXQ enable for multicast UDP destination lookup for possible * internal loopback. (ENTITY is a queue handle, VALUE is a single boolean.) */ #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TXQ_MCAST_UDP_DST_LOOKUP_EN … /* enum: Per-v-adaptor enable for suppression of self-transmissions on the * internal loopback path. (ENTITY is an EVB_PORT_ID, VALUE is a single * boolean.) */ #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VADAPTOR_SUPPRESS_SELF_TX … /* handle for the entity to update: queue handle, EVB port ID, etc. depending * on the type of configuration setting being changed */ #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_OFST … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_LEN … /* new value: the details depend on the type of configuration setting being * changed */ #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_OFST … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_LEN … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MINNUM … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MAXNUM … #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MAXNUM_MCDI2 … /* MC_CMD_SET_PARSER_DISP_CONFIG_OUT msgresponse */ #define MC_CMD_SET_PARSER_DISP_CONFIG_OUT_LEN … /***********************************/ /* MC_CMD_GET_PARSER_DISP_CONFIG * Read configuration related to the parser-dispatcher subsystem. */ #define MC_CMD_GET_PARSER_DISP_CONFIG … #undef MC_CMD_0xfa_PRIVILEGE_CTG #define MC_CMD_0xfa_PRIVILEGE_CTG … /* MC_CMD_GET_PARSER_DISP_CONFIG_IN msgrequest */ #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_LEN … /* the type of configuration setting to read */ #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_OFST … #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_LEN … /* Enum values, see field(s): */ /* MC_CMD_SET_PARSER_DISP_CONFIG/MC_CMD_SET_PARSER_DISP_CONFIG_IN/TYPE */ /* handle for the entity to query: queue handle, EVB port ID, etc. depending on * the type of configuration setting being read */ #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST … #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_LEN … /* MC_CMD_GET_PARSER_DISP_CONFIG_OUT msgresponse */ #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX_MCDI2 … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) … /* current value: the details depend on the type of configuration setting being * read */ #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_OFST … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM … #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM_MCDI2 … /***********************************/ /* MC_CMD_GET_PORT_MODES * Find out about available port modes */ #define MC_CMD_GET_PORT_MODES … #undef MC_CMD_0xff_PRIVILEGE_CTG #define MC_CMD_0xff_PRIVILEGE_CTG … /* MC_CMD_GET_PORT_MODES_IN msgrequest */ #define MC_CMD_GET_PORT_MODES_IN_LEN … /* MC_CMD_GET_PORT_MODES_OUT msgresponse */ #define MC_CMD_GET_PORT_MODES_OUT_LEN … /* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) * that are supported for customer use in production firmware. */ #define MC_CMD_GET_PORT_MODES_OUT_MODES_OFST … #define MC_CMD_GET_PORT_MODES_OUT_MODES_LEN … /* Default (canonical) board mode */ #define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST … #define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_LEN … /* Current board mode */ #define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST … #define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN … /* MC_CMD_GET_PORT_MODES_OUT_V2 msgresponse */ #define MC_CMD_GET_PORT_MODES_OUT_V2_LEN … /* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) * that are supported for customer use in production firmware. */ #define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_OFST … #define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN … /* Default (canonical) board mode */ #define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST … #define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN … /* Current board mode */ #define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_OFST … #define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN … /* Bitmask of engineering port modes available on the board (indexed by * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that * contains all modes implemented in firmware for a particular board. Modes * listed in MODES are considered production modes and should be exposed in * userland tools. Modes listed in ENGINEERING_MODES, but not in MODES * should be considered hidden (not to be exposed in userland tools) and for * engineering use only. There are no other semantic differences and any mode * listed in either MODES or ENGINEERING_MODES can be set on the board. */ #define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_OFST … #define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN … /***********************************/ /* MC_CMD_OVERRIDE_PORT_MODE * Override flash config port mode for subsequent MC reboot(s). Override data * is stored in the presistent data section of DMEM and activated on next MC * warm reboot. A cold reboot resets the override. It is assumed that a * sufficient number of PFs are available and that port mapping is valid for * the new port mode, as the override does not affect PF configuration. */ #define MC_CMD_OVERRIDE_PORT_MODE … #undef MC_CMD_0x137_PRIVILEGE_CTG #define MC_CMD_0x137_PRIVILEGE_CTG … /* MC_CMD_OVERRIDE_PORT_MODE_IN msgrequest */ #define MC_CMD_OVERRIDE_PORT_MODE_IN_LEN … #define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_OFST … #define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN … #define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_OFST … #define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_LBN … #define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_WIDTH … /* New mode (TLV_PORT_MODE_*) to set, if override enabled */ #define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST … #define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN … /* MC_CMD_OVERRIDE_PORT_MODE_OUT msgresponse */ #define MC_CMD_OVERRIDE_PORT_MODE_OUT_LEN … /***********************************/ /* MC_CMD_GET_WORKAROUNDS * Read the list of all implemented and all currently enabled workarounds. The * enums here must correspond with those in MC_CMD_WORKAROUND. */ #define MC_CMD_GET_WORKAROUNDS … #undef MC_CMD_0x59_PRIVILEGE_CTG #define MC_CMD_0x59_PRIVILEGE_CTG … /* MC_CMD_GET_WORKAROUNDS_OUT msgresponse */ #define MC_CMD_GET_WORKAROUNDS_OUT_LEN … /* Each workaround is represented by a single bit according to the enums below. */ #define MC_CMD_GET_WORKAROUNDS_OUT_IMPLEMENTED_OFST … #define MC_CMD_GET_WORKAROUNDS_OUT_IMPLEMENTED_LEN … #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_OFST … #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_LEN … /* enum: Bug 17230 work around. */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG17230 … /* enum: Bug 35388 work around (unsafe EVQ writes). */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG35388 … /* enum: Bug35017 workaround (A64 tables must be identity map) */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG35017 … /* enum: Bug 41750 present (MC_CMD_TRIGGER_INTERRUPT won't work) */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG41750 … /* enum: Bug 42008 present (Interrupts can overtake associated events). Caution * - before adding code that queries this workaround, remember that there's * released Monza firmware that doesn't understand MC_CMD_WORKAROUND_BUG42008, * and will hence (incorrectly) report that the bug doesn't exist. */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG42008 … /* enum: Bug 26807 features present in firmware (multicast filter chaining) */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG26807 … /* enum: Bug 61265 work around (broken EVQ TMR writes). */ #define MC_CMD_GET_WORKAROUNDS_OUT_BUG61265 … /***********************************/ /* MC_CMD_PRIVILEGE_MASK * Read/set privileges of an arbitrary PCIe function */ #define MC_CMD_PRIVILEGE_MASK … #undef MC_CMD_0x5a_PRIVILEGE_CTG #define MC_CMD_0x5a_PRIVILEGE_CTG … /* MC_CMD_PRIVILEGE_MASK_IN msgrequest */ #define MC_CMD_PRIVILEGE_MASK_IN_LEN … /* The target function to have its mask read or set e.g. PF 0 = 0xFFFF0000, VF * 1,3 = 0x00030001 */ #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_OFST … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_LEN … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_PF_OFST … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_PF_LBN … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_PF_WIDTH … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_VF_OFST … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_VF_LBN … #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_VF_WIDTH … #define MC_CMD_PRIVILEGE_MASK_IN_VF_NULL … /* New privilege mask to be set. The mask will only be changed if the MSB is * set to 1. */ #define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_OFST … #define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_LEN … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_LINK … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_ONLOAD … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_PTP … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_INSECURE_FILTERS … /* enum: Deprecated. Equivalent to MAC_SPOOFING_TX combined with CHANGE_MAC. */ #define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_UNICAST … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_MULTICAST … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_BROADCAST … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALL_MULTICAST … #define MC_CMD_PRIVILEGE_MASK_IN_GRP_PROMISCUOUS … /* enum: Allows to set the TX packets' source MAC address to any arbitrary MAC * adress. */ #define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING_TX … /* enum: Privilege that allows a Function to change the MAC address configured * in its associated vAdapter/vPort. */ #define MC_CMD_PRIVILEGE_MASK_IN_GRP_CHANGE_MAC … /* enum: Privilege that allows a Function to install filters that specify VLANs * that are not in the permit list for the associated vPort. This privilege is * primarily to support ESX where vPorts are created that restrict traffic to * only a set of permitted VLANs. See the vPort flag FLAG_VLAN_RESTRICT. */ #define MC_CMD_PRIVILEGE_MASK_IN_GRP_UNRESTRICTED_VLAN … /* enum: Privilege for insecure commands. Commands that belong to this group * are not permitted on secure adapters regardless of the privilege mask. */ #define MC_CMD_PRIVILEGE_MASK_IN_GRP_INSECURE … /* enum: Trusted Server Adapter (TSA) / ServerLock. Privilege for * administrator-level operations that are not allowed from the local host once * an adapter has Bound to a remote ServerLock Controller (see doxbox * SF-117064-DG for background). */ #define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND … /* enum: Set this bit to indicate that a new privilege mask is to be set, * otherwise the command will only read the existing mask. */ #define MC_CMD_PRIVILEGE_MASK_IN_DO_CHANGE … /* MC_CMD_PRIVILEGE_MASK_OUT msgresponse */ #define MC_CMD_PRIVILEGE_MASK_OUT_LEN … /* For an admin function, always all the privileges are reported. */ #define MC_CMD_PRIVILEGE_MASK_OUT_OLD_MASK_OFST … #define MC_CMD_PRIVILEGE_MASK_OUT_OLD_MASK_LEN … /***********************************/ /* MC_CMD_LINK_STATE_MODE * Read/set link state mode of a VF */ #define MC_CMD_LINK_STATE_MODE … #undef MC_CMD_0x5c_PRIVILEGE_CTG #define MC_CMD_0x5c_PRIVILEGE_CTG … /* MC_CMD_LINK_STATE_MODE_IN msgrequest */ #define MC_CMD_LINK_STATE_MODE_IN_LEN … /* The target function to have its link state mode read or set, must be a VF * e.g. VF 1,3 = 0x00030001 */ #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_OFST … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_LEN … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_PF_OFST … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_PF_LBN … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_PF_WIDTH … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_VF_OFST … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_VF_LBN … #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_VF_WIDTH … /* New link state mode to be set */ #define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_OFST … #define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_LEN … #define MC_CMD_LINK_STATE_MODE_IN_LINK_STATE_AUTO … #define MC_CMD_LINK_STATE_MODE_IN_LINK_STATE_UP … #define MC_CMD_LINK_STATE_MODE_IN_LINK_STATE_DOWN … /* enum: Use this value to just read the existing setting without modifying it. */ #define MC_CMD_LINK_STATE_MODE_IN_DO_NOT_CHANGE … /* MC_CMD_LINK_STATE_MODE_OUT msgresponse */ #define MC_CMD_LINK_STATE_MODE_OUT_LEN … #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_OFST … #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_LEN … /***********************************/ /* MC_CMD_FUSE_DIAGS * Additional fuse diagnostics */ #define MC_CMD_FUSE_DIAGS … #undef MC_CMD_0x102_PRIVILEGE_CTG #define MC_CMD_0x102_PRIVILEGE_CTG … /* MC_CMD_FUSE_DIAGS_IN msgrequest */ #define MC_CMD_FUSE_DIAGS_IN_LEN … /* MC_CMD_FUSE_DIAGS_OUT msgresponse */ #define MC_CMD_FUSE_DIAGS_OUT_LEN … /* Total number of mismatched bits between pairs in area 0 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_LEN … /* Total number of unexpectedly clear (set in B but not A) bits in area 0 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_LEN … /* Total number of unexpectedly clear (set in A but not B) bits in area 0 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_LEN … /* Checksum of data after logical OR of pairs in area 0 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_LEN … /* Total number of mismatched bits between pairs in area 1 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_LEN … /* Total number of unexpectedly clear (set in B but not A) bits in area 1 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_LEN … /* Total number of unexpectedly clear (set in A but not B) bits in area 1 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_LEN … /* Checksum of data after logical OR of pairs in area 1 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_LEN … /* Total number of mismatched bits between pairs in area 2 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_LEN … /* Total number of unexpectedly clear (set in B but not A) bits in area 2 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_LEN … /* Total number of unexpectedly clear (set in A but not B) bits in area 2 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_LEN … /* Checksum of data after logical OR of pairs in area 2 */ #define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_OFST … #define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_LEN … /***********************************/ /* MC_CMD_PRIVILEGE_MODIFY * Modify the privileges of a set of PCIe functions. Note that this operation * only effects non-admin functions unless the admin privilege itself is * included in one of the masks provided. */ #define MC_CMD_PRIVILEGE_MODIFY … #undef MC_CMD_0x60_PRIVILEGE_CTG #define MC_CMD_0x60_PRIVILEGE_CTG … /* MC_CMD_PRIVILEGE_MODIFY_IN msgrequest */ #define MC_CMD_PRIVILEGE_MODIFY_IN_LEN … /* The groups of functions to have their privilege masks modified. */ #define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_OFST … #define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_LEN … #define MC_CMD_PRIVILEGE_MODIFY_IN_NONE … #define MC_CMD_PRIVILEGE_MODIFY_IN_ALL … #define MC_CMD_PRIVILEGE_MODIFY_IN_PFS_ONLY … #define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_ONLY … #define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_OF_PF … #define MC_CMD_PRIVILEGE_MODIFY_IN_ONE … /* For VFS_OF_PF specify the PF, for ONE specify the target function */ #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_LEN … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_OFST … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_LBN … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_WIDTH … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_OFST … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_LBN … #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_WIDTH … /* Privileges to be added to the target functions. For privilege definitions * refer to the command MC_CMD_PRIVILEGE_MASK */ #define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_OFST … #define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_LEN … /* Privileges to be removed from the target functions. For privilege * definitions refer to the command MC_CMD_PRIVILEGE_MASK */ #define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_OFST … #define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_LEN … /* MC_CMD_PRIVILEGE_MODIFY_OUT msgresponse */ #define MC_CMD_PRIVILEGE_MODIFY_OUT_LEN … /* TUNNEL_ENCAP_UDP_PORT_ENTRY structuredef */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_LEN … /* UDP port (the standard ports are named below but any port may be used) */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_UDP_PORT_OFST … #define TUNNEL_ENCAP_UDP_PORT_ENTRY_UDP_PORT_LEN … /* enum: the IANA allocated UDP port for VXLAN */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_IANA_VXLAN_UDP_PORT … /* enum: the IANA allocated UDP port for Geneve */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_IANA_GENEVE_UDP_PORT … #define TUNNEL_ENCAP_UDP_PORT_ENTRY_UDP_PORT_LBN … #define TUNNEL_ENCAP_UDP_PORT_ENTRY_UDP_PORT_WIDTH … /* tunnel encapsulation protocol (only those named below are supported) */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_PROTOCOL_OFST … #define TUNNEL_ENCAP_UDP_PORT_ENTRY_PROTOCOL_LEN … /* enum: This port will be used for VXLAN on both IPv4 and IPv6 */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN … /* enum: This port will be used for Geneve on both IPv4 and IPv6 */ #define TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE … #define TUNNEL_ENCAP_UDP_PORT_ENTRY_PROTOCOL_LBN … #define TUNNEL_ENCAP_UDP_PORT_ENTRY_PROTOCOL_WIDTH … /***********************************/ /* MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS * Configure UDP ports for tunnel encapsulation hardware acceleration. The * parser-dispatcher will attempt to parse traffic on these ports as tunnel * encapsulation PDUs and filter them using the tunnel encapsulation filter * chain rather than the standard filter chain. Note that this command can * cause all functions to see a reset. (Available on Medford only.) */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS … #undef MC_CMD_0x117_PRIVILEGE_CTG #define MC_CMD_0x117_PRIVILEGE_CTG … /* MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN msgrequest */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMIN … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX_MCDI2 … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LEN(num) … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_NUM(len) … /* Flags */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_OFST … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_LEN … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_UNLOADING_OFST … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_UNLOADING_LBN … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_UNLOADING_WIDTH … /* The number of entries in the ENTRIES array */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_NUM_ENTRIES_OFST … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_NUM_ENTRIES_LEN … /* Entries defining the UDP port to protocol mapping, each laid out as a * TUNNEL_ENCAP_UDP_PORT_ENTRY */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_OFST … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_LEN … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MINNUM … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MAXNUM … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MAXNUM_MCDI2 … /* MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT msgresponse */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_LEN … /* Flags */ #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_FLAGS_OFST … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_FLAGS_LEN … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_OFST … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_LBN … #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_WIDTH … /***********************************/ /* MC_CMD_VNIC_ENCAP_RULE_ADD * Add a rule for detecting encapsulations in the VNIC stage. Currently this only affects checksum validation in VNIC RX - on TX the send descriptor explicitly specifies encapsulation. These rules are per-VNIC, i.e. only apply to the current driver. If a rule matches, then the packet is considered to have the corresponding encapsulation type, and the inner packet is parsed. It is up to the driver to ensure that overlapping rules are not inserted. (If a packet would match multiple rules, a random one of them will be used.) A rule with the exact same match criteria may not be inserted twice (EALREADY). Only a limited number MATCH_FLAGS values are supported, use MC_CMD_GET_PARSER_DISP_INFO with OP OP_GET_SUPPORTED_VNIC_ENCAP_RULE_MATCHES to get a list of supported combinations. Each driver may only have a limited set of active rules - returns ENOSPC if the caller's table is full. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD … #undef MC_CMD_0x16d_PRIVILEGE_CTG #define MC_CMD_0x16d_PRIVILEGE_CTG … /* MC_CMD_VNIC_ENCAP_RULE_ADD_IN msgrequest */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_LEN … /* Set to MAE_MPORT_SELECTOR_ASSIGNED. In the future this may be relaxed. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_LEN … /* Any non-zero bits other than the ones named below or an unsupported * combination will cause the NIC to return EOPNOTSUPP. In the future more * flags may be added. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_LEN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_WIDTH … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_WIDTH … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_WIDTH … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_WIDTH … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_WIDTH … /* Only if MATCH_ETHER_TYPE is set. Ethertype value as bytes in network order. * Currently only IPv4 (0x0800) and IPv6 (0x86DD) ethertypes may be used. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_LEN … /* Only if MATCH_OUTER_VLAN is set. VID value as bytes in network order. * (Deprecated) */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WIDTH … /* Only if MATCH_OUTER_VLAN is set. Aligned wrapper for OUTER_VLAN_VID. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_LEN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_WIDTH … /* Only if MATCH_DST_IP is set. IP address as bytes in network order. In the * case of IPv4, the IP should be in the first 4 bytes and all other bytes * should be zero. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_LEN … /* Only if MATCH_IP_PROTO is set. Currently only UDP proto (17) may be used. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_LEN … /* Actions that should be applied to packets match the rule. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_LEN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_LBN … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_WIDTH … /* Only if MATCH_DST_PORT is set. Port number as bytes in network order. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_LEN … /* Resulting encapsulation type, as per MAE_MCDI_ENCAP_TYPE enumeration. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_LEN … /* MC_CMD_VNIC_ENCAP_RULE_ADD_OUT msgresponse */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_LEN … /* Handle to inserted rule. Used for removing the rule. */ #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_OFST … #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_LEN … /***********************************/ /* MC_CMD_VNIC_ENCAP_RULE_REMOVE * Remove a VNIC encapsulation rule. Packets which would have previously matched the rule will then be considered as unencapsulated. Returns EALREADY if the input HANDLE doesn't correspond to an existing rule. */ #define MC_CMD_VNIC_ENCAP_RULE_REMOVE … #undef MC_CMD_0x16e_PRIVILEGE_CTG #define MC_CMD_0x16e_PRIVILEGE_CTG … /* MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN msgrequest */ #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_LEN … /* Handle which was returned by MC_CMD_VNIC_ENCAP_RULE_ADD. */ #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_OFST … #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_LEN … /* MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT msgresponse */ #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT_LEN … /* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are * defined in SF-120734-TC with more information in SF-122717-TC. */ #define FUNCTION_PERSONALITY_LEN … #define FUNCTION_PERSONALITY_ID_OFST … #define FUNCTION_PERSONALITY_ID_LEN … /* enum: Function has no assigned personality */ #define FUNCTION_PERSONALITY_NULL … /* enum: Function has an EF100-style function control window and VI windows * with both EF100 and vDPA doorbells. */ #define FUNCTION_PERSONALITY_EF100 … /* enum: Function has virtio net device configuration registers and doorbells * for virtio queue pairs. */ #define FUNCTION_PERSONALITY_VIRTIO_NET … /* enum: Function has virtio block device configuration registers and a * doorbell for a single virtqueue. */ #define FUNCTION_PERSONALITY_VIRTIO_BLK … /* enum: Function is a Xilinx acceleration device - management function */ #define FUNCTION_PERSONALITY_ACCEL_MGMT … /* enum: Function is a Xilinx acceleration device - user function */ #define FUNCTION_PERSONALITY_ACCEL_USR … #define FUNCTION_PERSONALITY_ID_LBN … #define FUNCTION_PERSONALITY_ID_WIDTH … /* PCIE_FUNCTION structuredef: Structure representing a PCIe function ID * (interface/PF/VF tuple) */ #define PCIE_FUNCTION_LEN … /* PCIe PF function number */ #define PCIE_FUNCTION_PF_OFST … #define PCIE_FUNCTION_PF_LEN … /* enum: Wildcard value representing any available function (e.g in resource * allocation requests) */ #define PCIE_FUNCTION_PF_ANY … /* enum: Value representing invalid (null) function */ #define PCIE_FUNCTION_PF_NULL … #define PCIE_FUNCTION_PF_LBN … #define PCIE_FUNCTION_PF_WIDTH … /* PCIe VF Function number (PF relative) */ #define PCIE_FUNCTION_VF_OFST … #define PCIE_FUNCTION_VF_LEN … /* enum: Wildcard value representing any available function (e.g in resource * allocation requests) */ #define PCIE_FUNCTION_VF_ANY … /* enum: Function is a PF (when PF != PF_NULL) or invalid function (when PF == * PF_NULL) */ #define PCIE_FUNCTION_VF_NULL … #define PCIE_FUNCTION_VF_LBN … #define PCIE_FUNCTION_VF_WIDTH … /* PCIe interface of the function */ #define PCIE_FUNCTION_INTF_OFST … #define PCIE_FUNCTION_INTF_LEN … /* enum: Host PCIe interface */ #define PCIE_FUNCTION_INTF_HOST … /* enum: Application Processor interface */ #define PCIE_FUNCTION_INTF_AP … #define PCIE_FUNCTION_INTF_LBN … #define PCIE_FUNCTION_INTF_WIDTH … #endif /* MCDI_PCOL_H */
Codebase Browser
linux