// SPDX-License-Identifier: GPL-2.0-only /**************************************************************************** * Driver for Solarflare network controllers and boards * Copyright 2012-2013 Solarflare Communications Inc. */ #include "net_driver.h" #include "rx_common.h" #include "tx_common.h" #include "ef10_regs.h" #include "io.h" #include "mcdi.h" #include "mcdi_pcol.h" #include "mcdi_port.h" #include "mcdi_port_common.h" #include "mcdi_functions.h" #include "nic.h" #include "mcdi_filters.h" #include "workarounds.h" #include "selftest.h" #include "ef10_sriov.h" #include <linux/in.h> #include <linux/jhash.h> #include <linux/wait.h> #include <linux/workqueue.h> #include <net/udp_tunnel.h> /* Hardware control for EF10 architecture including 'Huntington'. */ #define EFX_EF10_DRVGEN_EV … enum { … }; /* VLAN list entry */ struct efx_ef10_vlan { … }; static int efx_ef10_set_udp_tnl_ports(struct efx_nic *efx, bool unloading); static const struct udp_tunnel_nic_info efx_ef10_udp_tunnels; static int efx_ef10_get_warm_boot_count(struct efx_nic *efx) { … } /* On all EF10s up to and including SFC9220 (Medford1), all PFs use BAR 0 for * I/O space and BAR 2(&3) for memory. On SFC9250 (Medford2), there is no I/O * bar; PFs use BAR 0/1 for memory. */ static unsigned int efx_ef10_pf_mem_bar(struct efx_nic *efx) { … } /* All VFs use BAR 0/1 for memory */ static unsigned int efx_ef10_vf_mem_bar(struct efx_nic *efx) { … } static unsigned int efx_ef10_mem_map_size(struct efx_nic *efx) { … } static bool efx_ef10_is_vf(struct efx_nic *efx) { … } #ifdef CONFIG_SFC_SRIOV static int efx_ef10_get_vf_index(struct efx_nic *efx) { … } #endif static int efx_ef10_init_datapath_caps(struct efx_nic *efx) { … } static void efx_ef10_read_licensed_features(struct efx_nic *efx) { … } static int efx_ef10_get_sysclk_freq(struct efx_nic *efx) { … } static int efx_ef10_get_timer_workarounds(struct efx_nic *efx) { … } static void efx_ef10_process_timer_config(struct efx_nic *efx, const efx_dword_t *data) { … } static int efx_ef10_get_timer_config(struct efx_nic *efx) { … } static int efx_ef10_get_mac_address_pf(struct efx_nic *efx, u8 *mac_address) { … } static int efx_ef10_get_mac_address_vf(struct efx_nic *efx, u8 *mac_address) { … } static ssize_t link_control_flag_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t primary_flag_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static struct efx_ef10_vlan *efx_ef10_find_vlan(struct efx_nic *efx, u16 vid) { … } static int efx_ef10_add_vlan(struct efx_nic *efx, u16 vid) { … } static void efx_ef10_del_vlan_internal(struct efx_nic *efx, struct efx_ef10_vlan *vlan) { … } static int efx_ef10_del_vlan(struct efx_nic *efx, u16 vid) { … } static void efx_ef10_cleanup_vlans(struct efx_nic *efx) { … } static DEVICE_ATTR_RO(link_control_flag); static DEVICE_ATTR_RO(primary_flag); static int efx_ef10_probe(struct efx_nic *efx) { … } #ifdef EFX_USE_PIO static void efx_ef10_free_piobufs(struct efx_nic *efx) { … } static int efx_ef10_alloc_piobufs(struct efx_nic *efx, unsigned int n) { … } static int efx_ef10_link_piobufs(struct efx_nic *efx) { … } static void efx_ef10_forget_old_piobufs(struct efx_nic *efx) { … } #else /* !EFX_USE_PIO */ static int efx_ef10_alloc_piobufs(struct efx_nic *efx, unsigned int n) { return n == 0 ? 0 : -ENOBUFS; } static int efx_ef10_link_piobufs(struct efx_nic *efx) { return 0; } static void efx_ef10_free_piobufs(struct efx_nic *efx) { } static void efx_ef10_forget_old_piobufs(struct efx_nic *efx) { } #endif /* EFX_USE_PIO */ static void efx_ef10_remove(struct efx_nic *efx) { … } static int efx_ef10_probe_pf(struct efx_nic *efx) { … } int efx_ef10_vadaptor_query(struct efx_nic *efx, unsigned int port_id, u32 *port_flags, u32 *vadaptor_flags, unsigned int *vlan_tags) { … } int efx_ef10_vadaptor_alloc(struct efx_nic *efx, unsigned int port_id) { … } int efx_ef10_vadaptor_free(struct efx_nic *efx, unsigned int port_id) { … } int efx_ef10_vport_add_mac(struct efx_nic *efx, unsigned int port_id, const u8 *mac) { … } int efx_ef10_vport_del_mac(struct efx_nic *efx, unsigned int port_id, const u8 *mac) { … } #ifdef CONFIG_SFC_SRIOV static int efx_ef10_probe_vf(struct efx_nic *efx) { … } #else static int efx_ef10_probe_vf(struct efx_nic *efx __attribute__ ((unused))) { return 0; } #endif static int efx_ef10_alloc_vis(struct efx_nic *efx, unsigned int min_vis, unsigned int max_vis) { … } /* Note that the failure path of this function does not free * resources, as this will be done by efx_ef10_remove(). */ static int efx_ef10_dimension_resources(struct efx_nic *efx) { … } static void efx_ef10_fini_nic(struct efx_nic *efx) { … } static int efx_ef10_init_nic(struct efx_nic *efx) { … } static void efx_ef10_table_reset_mc_allocations(struct efx_nic *efx) { … } static enum reset_type efx_ef10_map_reset_reason(enum reset_type reason) { … } static int efx_ef10_map_reset_flags(u32 *flags) { … } static int efx_ef10_reset(struct efx_nic *efx, enum reset_type reset_type) { … } #define EF10_DMA_STAT(ext_name, mcdi_name) … #define EF10_DMA_INVIS_STAT(int_name, mcdi_name) … #define EF10_OTHER_STAT(ext_name) … static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = …; #define HUNT_COMMON_STAT_MASK … /* On 7000 series NICs, these statistics are only provided by the 10G MAC. * For a 10G/40G switchable port we do not expose these because they might * not include all the packets they should. * On 8000 series NICs these statistics are always provided. */ #define HUNT_10G_ONLY_STAT_MASK … /* These statistics are only provided by the 40G MAC. For a 10G/40G * switchable port we do expose these because the errors will otherwise * be silent. */ #define HUNT_40G_EXTRA_STAT_MASK … /* These statistics are only provided if the firmware supports the * capability PM_AND_RXDP_COUNTERS. */ #define HUNT_PM_AND_RXDP_STAT_MASK … /* These statistics are only provided if the NIC supports MC_CMD_MAC_STATS_V2, * indicated by returning a value >= MC_CMD_MAC_NSTATS_V2 in * MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_NUM_STATS. * These bits are in the second u64 of the raw mask. */ #define EF10_FEC_STAT_MASK … /* These statistics are only provided if the NIC supports MC_CMD_MAC_STATS_V3, * indicated by returning a value >= MC_CMD_MAC_NSTATS_V3 in * MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_NUM_STATS. * These bits are in the second u64 of the raw mask. */ #define EF10_CTPIO_STAT_MASK … static u64 efx_ef10_raw_stat_mask(struct efx_nic *efx) { … } static void efx_ef10_get_stat_mask(struct efx_nic *efx, unsigned long *mask) { … } static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 *names) { … } static void efx_ef10_get_fec_stats(struct efx_nic *efx, struct ethtool_fec_stats *fec_stats) { … } static size_t efx_ef10_update_stats_common(struct efx_nic *efx, u64 *full_stats, struct rtnl_link_stats64 *core_stats) { … } static size_t efx_ef10_update_stats_pf(struct efx_nic *efx, u64 *full_stats, struct rtnl_link_stats64 *core_stats) { … } static int efx_ef10_try_update_nic_stats_vf(struct efx_nic *efx) __must_hold(&efx->stats_lock) { … } static size_t efx_ef10_update_stats_vf(struct efx_nic *efx, u64 *full_stats, struct rtnl_link_stats64 *core_stats) { … } static size_t efx_ef10_update_stats_atomic_vf(struct efx_nic *efx, u64 *full_stats, struct rtnl_link_stats64 *core_stats) { … } static void efx_ef10_push_irq_moderation(struct efx_channel *channel) { … } static void efx_ef10_get_wol_vf(struct efx_nic *efx, struct ethtool_wolinfo *wol) { … } static int efx_ef10_set_wol_vf(struct efx_nic *efx, u32 type) { … } static void efx_ef10_get_wol(struct efx_nic *efx, struct ethtool_wolinfo *wol) { … } static int efx_ef10_set_wol(struct efx_nic *efx, u32 type) { … } static void efx_ef10_mcdi_request(struct efx_nic *efx, const efx_dword_t *hdr, size_t hdr_len, const efx_dword_t *sdu, size_t sdu_len) { … } static bool efx_ef10_mcdi_poll_response(struct efx_nic *efx) { … } static void efx_ef10_mcdi_read_response(struct efx_nic *efx, efx_dword_t *outbuf, size_t offset, size_t outlen) { … } static void efx_ef10_mcdi_reboot_detected(struct efx_nic *efx) { … } static int efx_ef10_mcdi_poll_reboot(struct efx_nic *efx) { … } /* Handle an MSI interrupt * * Handle an MSI hardware interrupt. This routine schedules event * queue processing. No interrupt acknowledgement cycle is necessary. * Also, we never need to check that the interrupt is for us, since * MSI interrupts cannot be shared. */ static irqreturn_t efx_ef10_msi_interrupt(int irq, void *dev_id) { … } static irqreturn_t efx_ef10_legacy_interrupt(int irq, void *dev_id) { … } static int efx_ef10_irq_test_generate(struct efx_nic *efx) { … } static int efx_ef10_tx_probe(struct efx_tx_queue *tx_queue) { … } /* This writes to the TX_DESC_WPTR and also pushes data */ static inline void efx_ef10_push_tx_desc(struct efx_tx_queue *tx_queue, const efx_qword_t *txd) { … } /* Add Firmware-Assisted TSO v2 option descriptors to a queue. */ int efx_ef10_tx_tso_desc(struct efx_tx_queue *tx_queue, struct sk_buff *skb, bool *data_mapped) { … } static u32 efx_ef10_tso_versions(struct efx_nic *efx) { … } static void efx_ef10_tx_init(struct efx_tx_queue *tx_queue) { … } /* This writes to the TX_DESC_WPTR; write pointer for TX descriptor ring */ static inline void efx_ef10_notify_tx_desc(struct efx_tx_queue *tx_queue) { … } #define EFX_EF10_MAX_TX_DESCRIPTOR_LEN … static unsigned int efx_ef10_tx_limit_len(struct efx_tx_queue *tx_queue, dma_addr_t dma_addr, unsigned int len) { … } static void efx_ef10_tx_write(struct efx_tx_queue *tx_queue) { … } static int efx_ef10_probe_multicast_chaining(struct efx_nic *efx) { … } static int efx_ef10_filter_table_probe(struct efx_nic *efx) { … } static void efx_ef10_filter_table_remove(struct efx_nic *efx) { … } /* This creates an entry in the RX descriptor queue */ static inline void efx_ef10_build_rx_desc(struct efx_rx_queue *rx_queue, unsigned int index) { … } static void efx_ef10_rx_write(struct efx_rx_queue *rx_queue) { … } static efx_mcdi_async_completer efx_ef10_rx_defer_refill_complete; static void efx_ef10_rx_defer_refill(struct efx_rx_queue *rx_queue) { … } static void efx_ef10_rx_defer_refill_complete(struct efx_nic *efx, unsigned long cookie, int rc, efx_dword_t *outbuf, size_t outlen_actual) { … } static int efx_ef10_ev_init(struct efx_channel *channel) { … } static void efx_ef10_handle_rx_wrong_queue(struct efx_rx_queue *rx_queue, unsigned int rx_queue_label) { … } static void efx_ef10_handle_rx_bad_lbits(struct efx_rx_queue *rx_queue, unsigned int actual, unsigned int expected) { … } /* partially received RX was aborted. clean up. */ static void efx_ef10_handle_rx_abort(struct efx_rx_queue *rx_queue) { … } static u16 efx_ef10_handle_rx_event_errors(struct efx_channel *channel, unsigned int n_packets, unsigned int rx_encap_hdr, unsigned int rx_l3_class, unsigned int rx_l4_class, const efx_qword_t *event) { … } static int efx_ef10_handle_rx_event(struct efx_channel *channel, const efx_qword_t *event) { … } static u32 efx_ef10_extract_event_ts(efx_qword_t *event) { … } static int efx_ef10_handle_tx_event(struct efx_channel *channel, efx_qword_t *event) { … } static void efx_ef10_handle_driver_event(struct efx_channel *channel, efx_qword_t *event) { … } static void efx_ef10_handle_driver_generated_event(struct efx_channel *channel, efx_qword_t *event) { … } #define EFX_NAPI_MAX_TX … static int efx_ef10_ev_process(struct efx_channel *channel, int quota) { … } static void efx_ef10_ev_read_ack(struct efx_channel *channel) { … } static void efx_ef10_ev_test_generate(struct efx_channel *channel) { … } static void efx_ef10_prepare_flr(struct efx_nic *efx) { … } static int efx_ef10_vport_set_mac_address(struct efx_nic *efx) { … } static int efx_ef10_set_mac_address(struct efx_nic *efx) { … } static int efx_ef10_mac_reconfigure(struct efx_nic *efx, bool mtu_only) { … } static int efx_ef10_start_bist(struct efx_nic *efx, u32 bist_type) { … } /* MC BISTs follow a different poll mechanism to phy BISTs. * The BIST is done in the poll handler on the MC, and the MCDI command * will block until the BIST is done. */ static int efx_ef10_poll_bist(struct efx_nic *efx) { … } static int efx_ef10_run_bist(struct efx_nic *efx, u32 bist_type) { … } static int efx_ef10_test_chip(struct efx_nic *efx, struct efx_self_tests *tests) { … } #ifdef CONFIG_SFC_MTD struct efx_ef10_nvram_type_info { … }; static const struct efx_ef10_nvram_type_info efx_ef10_nvram_types[] = …; #define EF10_NVRAM_PARTITION_COUNT … static int efx_ef10_mtd_probe_partition(struct efx_nic *efx, struct efx_mcdi_mtd_partition *part, unsigned int type, unsigned long *found) { … } static int efx_ef10_mtd_probe(struct efx_nic *efx) { … } #endif /* CONFIG_SFC_MTD */ static void efx_ef10_ptp_write_host_time(struct efx_nic *efx, u32 host_time) { … } static void efx_ef10_ptp_write_host_time_vf(struct efx_nic *efx, u32 host_time) { … } static int efx_ef10_rx_enable_timestamping(struct efx_channel *channel, bool temp) { … } static int efx_ef10_rx_disable_timestamping(struct efx_channel *channel, bool temp) { … } static int efx_ef10_ptp_set_ts_sync_events(struct efx_nic *efx, bool en, bool temp) { … } static int efx_ef10_ptp_set_ts_config_vf(struct efx_nic *efx, struct kernel_hwtstamp_config *init) { … } static int efx_ef10_ptp_set_ts_config(struct efx_nic *efx, struct kernel_hwtstamp_config *init) { … } static int efx_ef10_get_phys_port_id(struct efx_nic *efx, struct netdev_phys_item_id *ppid) { … } static int efx_ef10_vlan_rx_add_vid(struct efx_nic *efx, __be16 proto, u16 vid) { … } static int efx_ef10_vlan_rx_kill_vid(struct efx_nic *efx, __be16 proto, u16 vid) { … } /* We rely on the MCDI wiping out our TX rings if it made any changes to the * ports table, ensuring that any TSO descriptors that were made on a now- * removed tunnel port will be blown away and won't break things when we try * to transmit them using the new ports table. */ static int efx_ef10_set_udp_tnl_ports(struct efx_nic *efx, bool unloading) { … } static int efx_ef10_udp_tnl_push_ports(struct efx_nic *efx) { … } static int efx_ef10_udp_tnl_set_port(struct net_device *dev, unsigned int table, unsigned int entry, struct udp_tunnel_info *ti) { … } /* Called under the TX lock with the TX queue running, hence no-one can be * in the middle of updating the UDP tunnels table. However, they could * have tried and failed the MCDI, in which case they'll have set the dirty * flag before dropping their locks. */ static bool efx_ef10_udp_tnl_has_port(struct efx_nic *efx, __be16 port) { … } static int efx_ef10_udp_tnl_unset_port(struct net_device *dev, unsigned int table, unsigned int entry, struct udp_tunnel_info *ti) { … } static const struct udp_tunnel_nic_info efx_ef10_udp_tunnels = …; /* EF10 may have multiple datapath firmware variants within a * single version. Report which variants are running. */ static size_t efx_ef10_print_additional_fwver(struct efx_nic *efx, char *buf, size_t len) { … } static unsigned int ef10_check_caps(const struct efx_nic *efx, u8 flag, u32 offset) { … } static unsigned int efx_ef10_recycle_ring_size(const struct efx_nic *efx) { … } #define EF10_OFFLOAD_FEATURES … const struct efx_nic_type efx_hunt_a0_vf_nic_type = …; const struct efx_nic_type efx_hunt_a0_nic_type = …; const struct efx_nic_type efx_x4_nic_type = …;
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