linux/drivers/net/ethernet/ti/tlan.h

#ifndef TLAN_H
#define TLAN_H
/********************************************************************
 *
 *  Linux ThunderLAN Driver
 *
 *  tlan.h
 *  by James Banks
 *
 *  (C) 1997-1998 Caldera, Inc.
 *  (C) 1999-2001 Torben Mathiasen
 *
 *  This software may be used and distributed according to the terms
 *  of the GNU General Public License, incorporated herein by reference.
 *
 *
 *  Dec 10, 1999	Torben Mathiasen <[email protected]>
 *			New Maintainer
 *
 ********************************************************************/


#include <linux/io.h>
#include <linux/types.h>
#include <linux/netdevice.h>



	/*****************************************************************
	 * TLan Definitions
	 *
	 ****************************************************************/

#define TLAN_MIN_FRAME_SIZE
#define TLAN_MAX_FRAME_SIZE

#define TLAN_NUM_RX_LISTS
#define TLAN_NUM_TX_LISTS

#define TLAN_IGNORE
#define TLAN_RECORD

#define TLAN_DBG(lvl, format, args...)

#define TLAN_DEBUG_GNRL
#define TLAN_DEBUG_TX
#define TLAN_DEBUG_RX
#define TLAN_DEBUG_LIST
#define TLAN_DEBUG_PROBE

#define TX_TIMEOUT
#define MAX_TLAN_BOARDS


	/*****************************************************************
	 * Device Identification Definitions
	 *
	 ****************************************************************/

#define PCI_DEVICE_ID_NETELLIGENT_10_T2
#define PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100
#ifndef PCI_DEVICE_ID_OLICOM_OC2183
#define PCI_DEVICE_ID_OLICOM_OC2183
#endif
#ifndef PCI_DEVICE_ID_OLICOM_OC2325
#define PCI_DEVICE_ID_OLICOM_OC2325
#endif
#ifndef PCI_DEVICE_ID_OLICOM_OC2326
#define PCI_DEVICE_ID_OLICOM_OC2326
#endif

struct tlan_adapter_entry {};

#define TLAN_ADAPTER_NONE
#define TLAN_ADAPTER_UNMANAGED_PHY
#define TLAN_ADAPTER_BIT_RATE_PHY
#define TLAN_ADAPTER_USE_INTERN_10
#define TLAN_ADAPTER_ACTIVITY_LED

#define TLAN_SPEED_DEFAULT
#define TLAN_SPEED_10
#define TLAN_SPEED_100

#define TLAN_DUPLEX_DEFAULT
#define TLAN_DUPLEX_HALF
#define TLAN_DUPLEX_FULL



	/*****************************************************************
	 * EISA Definitions
	 *
	 ****************************************************************/

#define EISA_ID
#define EISA_ID0
#define EISA_ID1
#define EISA_ID2
#define EISA_ID3
#define EISA_CR
#define EISA_REG0
#define EISA_REG1
#define EISA_REG2
#define EISA_REG3
#define EISA_APROM



	/*****************************************************************
	 * Rx/Tx List Definitions
	 *
	 ****************************************************************/

#define TLAN_BUFFERS_PER_LIST
#define TLAN_LAST_BUFFER
#define TLAN_CSTAT_UNUSED
#define TLAN_CSTAT_FRM_CMP
#define TLAN_CSTAT_READY
#define TLAN_CSTAT_EOC
#define TLAN_CSTAT_RX_ERROR
#define TLAN_CSTAT_PASS_CRC
#define TLAN_CSTAT_DP_PR


struct tlan_buffer {};


struct tlan_list {};


TLanBuffer;




	/*****************************************************************
	 * PHY definitions
	 *
	 ****************************************************************/

#define TLAN_PHY_MAX_ADDR
#define TLAN_PHY_NONE




	/*****************************************************************
	 * TLAN Private Information Structure
	 *
	 ****************************************************************/

struct tlan_priv {};




	/*****************************************************************
	 * TLan Driver Timer Definitions
	 *
	 ****************************************************************/

#define TLAN_TIMER_ACTIVITY
#define TLAN_TIMER_PHY_PDOWN
#define TLAN_TIMER_PHY_PUP
#define TLAN_TIMER_PHY_RESET
#define TLAN_TIMER_PHY_START_LINK
#define TLAN_TIMER_PHY_FINISH_AN
#define TLAN_TIMER_FINISH_RESET

#define TLAN_TIMER_ACT_DELAY




	/*****************************************************************
	 * TLan Driver Eeprom Definitions
	 *
	 ****************************************************************/

#define TLAN_EEPROM_ACK
#define TLAN_EEPROM_STOP

#define TLAN_EEPROM_SIZE



	/*****************************************************************
	 * Host Register Offsets and Contents
	 *
	 ****************************************************************/

#define TLAN_HOST_CMD
#define TLAN_HC_GO
#define TLAN_HC_STOP
#define TLAN_HC_ACK
#define TLAN_HC_CS_MASK
#define TLAN_HC_EOC
#define TLAN_HC_RT
#define TLAN_HC_NES
#define TLAN_HC_AD_RST
#define TLAN_HC_LD_TMR
#define TLAN_HC_LD_THR
#define TLAN_HC_REQ_INT
#define TLAN_HC_INT_OFF
#define TLAN_HC_INT_ON
#define TLAN_HC_AC_MASK
#define TLAN_CH_PARM
#define TLAN_DIO_ADR
#define TLAN_DA_ADR_INC
#define TLAN_DA_RAM_ADR
#define TLAN_HOST_INT
#define TLAN_HI_IV_MASK
#define TLAN_HI_IT_MASK
#define TLAN_DIO_DATA


/* ThunderLAN Internal Register DIO Offsets */

#define TLAN_NET_CMD
#define TLAN_NET_CMD_NRESET
#define TLAN_NET_CMD_NWRAP
#define TLAN_NET_CMD_CSF
#define TLAN_NET_CMD_CAF
#define TLAN_NET_CMD_NOBRX
#define TLAN_NET_CMD_DUPLEX
#define TLAN_NET_CMD_TRFRAM
#define TLAN_NET_CMD_TXPACE
#define TLAN_NET_SIO
#define TLAN_NET_SIO_MINTEN
#define TLAN_NET_SIO_ECLOK
#define TLAN_NET_SIO_ETXEN
#define TLAN_NET_SIO_EDATA
#define TLAN_NET_SIO_NMRST
#define TLAN_NET_SIO_MCLK
#define TLAN_NET_SIO_MTXEN
#define TLAN_NET_SIO_MDATA
#define TLAN_NET_STS
#define TLAN_NET_STS_MIRQ
#define TLAN_NET_STS_HBEAT
#define TLAN_NET_STS_TXSTOP
#define TLAN_NET_STS_RXSTOP
#define TLAN_NET_STS_RSRVD
#define TLAN_NET_MASK
#define TLAN_NET_MASK_MASK7
#define TLAN_NET_MASK_MASK6
#define TLAN_NET_MASK_MASK5
#define TLAN_NET_MASK_MASK4
#define TLAN_NET_MASK_RSRVD
#define TLAN_NET_CONFIG
#define TLAN_NET_CFG_RCLK
#define TLAN_NET_CFG_TCLK
#define TLAN_NET_CFG_BIT
#define TLAN_NET_CFG_RXCRC
#define TLAN_NET_CFG_PEF
#define TLAN_NET_CFG_1FRAG
#define TLAN_NET_CFG_1CHAN
#define TLAN_NET_CFG_MTEST
#define TLAN_NET_CFG_PHY_EN
#define TLAN_NET_CFG_MSMASK
#define TLAN_MAN_TEST
#define TLAN_DEF_VENDOR_ID
#define TLAN_DEF_DEVICE_ID
#define TLAN_DEF_REVISION
#define TLAN_DEF_SUBCLASS
#define TLAN_DEF_MIN_LAT
#define TLAN_DEF_MAX_LAT
#define TLAN_AREG_0
#define TLAN_AREG_1
#define TLAN_AREG_2
#define TLAN_AREG_3
#define TLAN_HASH_1
#define TLAN_HASH_2
#define TLAN_GOOD_TX_FRMS
#define TLAN_TX_UNDERUNS
#define TLAN_GOOD_RX_FRMS
#define TLAN_RX_OVERRUNS
#define TLAN_DEFERRED_TX
#define TLAN_CRC_ERRORS
#define TLAN_CODE_ERRORS
#define TLAN_MULTICOL_FRMS
#define TLAN_SINGLECOL_FRMS
#define TLAN_EXCESSCOL_FRMS
#define TLAN_LATE_COLS
#define TLAN_CARRIER_LOSS
#define TLAN_ACOMMIT
#define TLAN_LED_REG
#define TLAN_LED_ACT
#define TLAN_LED_LINK
#define TLAN_BSIZE_REG
#define TLAN_MAX_RX
#define TLAN_INT_DIS
#define TLAN_ID_TX_EOC
#define TLAN_ID_RX_EOF
#define TLAN_ID_RX_EOC



/* ThunderLAN Interrupt Codes */

#define TLAN_INT_NUMBER_OF_INTS

#define TLAN_INT_NONE
#define TLAN_INT_TX_EOF
#define TLAN_INT_STAT_OVERFLOW
#define TLAN_INT_RX_EOF
#define TLAN_INT_DUMMY
#define TLAN_INT_TX_EOC
#define TLAN_INT_STATUS_CHECK
#define TLAN_INT_RX_EOC



/* ThunderLAN MII Registers */

/* Generic MII/PHY Registers */

#define MII_GEN_CTL
#define MII_GC_RESET
#define MII_GC_LOOPBK
#define MII_GC_SPEEDSEL
#define MII_GC_AUTOENB
#define MII_GC_PDOWN
#define MII_GC_ISOLATE
#define MII_GC_AUTORSRT
#define MII_GC_DUPLEX
#define MII_GC_COLTEST
#define MII_GC_RESERVED
#define MII_GEN_STS
#define MII_GS_100BT4
#define MII_GS_100BTXFD
#define MII_GS_100BTXHD
#define MII_GS_10BTFD
#define MII_GS_10BTHD
#define MII_GS_RESERVED
#define MII_GS_AUTOCMPLT
#define MII_GS_RFLT
#define MII_GS_AUTONEG
#define MII_GS_LINK
#define MII_GS_JABBER
#define MII_GS_EXTCAP
#define MII_GEN_ID_HI
#define MII_GEN_ID_LO
#define MII_GIL_OUI
#define MII_GIL_MODEL
#define MII_GIL_REVISION
#define MII_AN_ADV
#define MII_AN_LPA
#define MII_AN_EXP

/* ThunderLAN Specific MII/PHY Registers */

#define TLAN_TLPHY_ID
#define TLAN_TLPHY_CTL
#define TLAN_TC_IGLINK
#define TLAN_TC_SWAPOL
#define TLAN_TC_AUISEL
#define TLAN_TC_SQEEN
#define TLAN_TC_MTEST
#define TLAN_TC_RESERVED
#define TLAN_TC_NFEW
#define TLAN_TC_INTEN
#define TLAN_TC_TINT
#define TLAN_TLPHY_STS
#define TLAN_TS_MINT
#define TLAN_TS_PHOK
#define TLAN_TS_POLOK
#define TLAN_TS_TPENERGY
#define TLAN_TS_RESERVED
#define TLAN_TLPHY_PAR
#define TLAN_PHY_CIM_STAT
#define TLAN_PHY_SPEED_100
#define TLAN_PHY_DUPLEX_FULL
#define TLAN_PHY_AN_EN_STAT

/* National Sem. & Level1 PHY id's */
#define NAT_SEM_ID1
#define NAT_SEM_ID2
#define LEVEL1_ID1
#define LEVEL1_ID2

#define CIRC_INC(a, b)

/* Routines to access internal registers. */

static inline u8 tlan_dio_read8(u16 base_addr, u16 internal_addr)
{}




static inline u16 tlan_dio_read16(u16 base_addr, u16 internal_addr)
{}




static inline u32 tlan_dio_read32(u16 base_addr, u16 internal_addr)
{}




static inline void tlan_dio_write8(u16 base_addr, u16 internal_addr, u8 data)
{}




static inline void tlan_dio_write16(u16 base_addr, u16 internal_addr, u16 data)
{}




static inline void tlan_dio_write32(u16 base_addr, u16 internal_addr, u32 data)
{}

#define tlan_clear_bit(bit, port)
#define tlan_get_bit(bit, port)
#define tlan_set_bit(bit, port)

/*
 * given 6 bytes, view them as 8 6-bit numbers and return the XOR of those
 * the code below is about seven times as fast as the original code
 *
 * The original code was:
 *
 * u32	xor(u32 a, u32 b) {	return ((a && !b ) || (! a && b )); }
 *
 * #define XOR8(a, b, c, d, e, f, g, h)	\
 *	xor(a, xor(b, xor(c, xor(d, xor(e, xor(f, xor(g, h)) ) ) ) ) )
 * #define DA(a, bit)		(( (u8) a[bit/8] ) & ( (u8) (1 << bit%8)) )
 *
 *	hash  = XOR8(DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24),
 *		      DA(a,30), DA(a,36), DA(a,42));
 *	hash |= XOR8(DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25),
 *		      DA(a,31), DA(a,37), DA(a,43)) << 1;
 *	hash |= XOR8(DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26),
 *		      DA(a,32), DA(a,38), DA(a,44)) << 2;
 *	hash |= XOR8(DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27),
 *		      DA(a,33), DA(a,39), DA(a,45)) << 3;
 *	hash |= XOR8(DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28),
 *		      DA(a,34), DA(a,40), DA(a,46)) << 4;
 *	hash |= XOR8(DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29),
 *		      DA(a,35), DA(a,41), DA(a,47)) << 5;
 *
 */
static inline u32 tlan_hash_func(const u8 *a)
{}
#endif