/* SPDX-License-Identifier: GPL-2.0 */ /* * * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200, G400 and G450 * * (c) 1998-2002 Petr Vandrovec <[email protected]> * */ #ifndef __MATROXFB_H__ #define __MATROXFB_H__ /* general, but fairly heavy, debugging */ #undef MATROXFB_DEBUG /* heavy debugging: */ /* -- logs putc[s], so every time a char is displayed, it's logged */ #undef MATROXFB_DEBUG_HEAVY /* This one _could_ cause infinite loops */ /* It _does_ cause lots and lots of messages during idle loops */ #undef MATROXFB_DEBUG_LOOP /* Debug register calls, too? */ #undef MATROXFB_DEBUG_REG /* Guard accelerator accesses with spin_lock_irqsave... */ #undef MATROXFB_USE_SPINLOCKS #include <linux/module.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/string.h> #include <linux/mm.h> #include <linux/slab.h> #include <linux/delay.h> #include <linux/fb.h> #include <linux/console.h> #include <linux/selection.h> #include <linux/ioport.h> #include <linux/init.h> #include <linux/timer.h> #include <linux/pci.h> #include <linux/spinlock.h> #include <linux/kd.h> #include <asm/io.h> #include <linux/unaligned.h> #if defined(CONFIG_PPC_PMAC) #include "../macmodes.h" #endif #ifdef MATROXFB_DEBUG #define DEBUG #define DBG … #ifdef MATROXFB_DEBUG_HEAVY #define DBG_HEAVY … #else /* MATROXFB_DEBUG_HEAVY */ #define DBG_HEAVY … #endif /* MATROXFB_DEBUG_HEAVY */ #ifdef MATROXFB_DEBUG_LOOP #define DBG_LOOP … #else /* MATROXFB_DEBUG_LOOP */ #define DBG_LOOP … #endif /* MATROXFB_DEBUG_LOOP */ #ifdef MATROXFB_DEBUG_REG #define DBG_REG … #else /* MATROXFB_DEBUG_REG */ #define DBG_REG … #endif /* MATROXFB_DEBUG_REG */ #else /* MATROXFB_DEBUG */ #define DBG(x) … #define DBG_HEAVY(x) … #define DBG_REG(x) … #define DBG_LOOP(x) … #endif /* MATROXFB_DEBUG */ #ifdef DEBUG #define dprintk … #else #define dprintk(X...) … #endif #ifndef PCI_SS_VENDOR_ID_SIEMENS_NIXDORF #define PCI_SS_VENDOR_ID_SIEMENS_NIXDORF … #endif #ifndef PCI_SS_VENDOR_ID_MATROX #define PCI_SS_VENDOR_ID_MATROX … #endif #ifndef PCI_SS_ID_MATROX_PRODUCTIVA_G100_AGP #define PCI_SS_ID_MATROX_GENERIC … #define PCI_SS_ID_MATROX_PRODUCTIVA_G100_AGP … #define PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP … #define PCI_SS_ID_MATROX_MILLENIUM_G200_AGP … #define PCI_SS_ID_MATROX_MARVEL_G200_AGP … #define PCI_SS_ID_MATROX_MGA_G100_PCI … #define PCI_SS_ID_MATROX_MGA_G100_AGP … #define PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP … #define PCI_SS_ID_SIEMENS_MGA_G100_AGP … #define PCI_SS_ID_SIEMENS_MGA_G200_AGP … #endif #define MX_VISUAL_TRUECOLOR … #define MX_VISUAL_DIRECTCOLOR … #define MX_VISUAL_PSEUDOCOLOR … #define CNVT_TOHW(val,width) … /* G-series and Mystique have (almost) same DAC */ #undef NEED_DAC1064 #if defined(CONFIG_FB_MATROX_MYSTIQUE) || defined(CONFIG_FB_MATROX_G) #define NEED_DAC1064 … #endif vaddr_t; static inline unsigned int mga_readb(vaddr_t va, unsigned int offs) { … } static inline void mga_writeb(vaddr_t va, unsigned int offs, u_int8_t value) { … } static inline void mga_writew(vaddr_t va, unsigned int offs, u_int16_t value) { … } static inline u_int32_t mga_readl(vaddr_t va, unsigned int offs) { … } static inline void mga_writel(vaddr_t va, unsigned int offs, u_int32_t value) { … } static inline void mga_memcpy_toio(vaddr_t va, const void* src, int len) { … } static inline void vaddr_add(vaddr_t* va, unsigned long offs) { … } static inline void __iomem* vaddr_va(vaddr_t va) { … } struct my_timming { … }; enum { … }; struct matrox_pll_cache { … }; struct matrox_pll_limits { … }; struct matrox_pll_features { … }; struct matroxfb_par { … }; struct matrox_fb_info; struct matrox_DAC1064_features { … }; /* current hardware status */ struct mavenregs { … }; struct matrox_crtc2 { … }; struct matrox_hw_state { … }; struct matrox_accel_data { … }; struct v4l2_queryctrl; struct v4l2_control; struct matrox_altout { … }; #define MATROXFB_SRC_NONE … #define MATROXFB_SRC_CRTC1 … #define MATROXFB_SRC_CRTC2 … enum mga_chip { … }; struct matrox_bios { … }; struct matrox_switch; struct matroxfb_driver; struct matroxfb_dh_fb_info; struct matrox_vsync { … }; struct matrox_fb_info { … }; #define info2minfo(info) … struct matrox_switch { … }; struct matroxfb_driver { … }; int matroxfb_register_driver(struct matroxfb_driver* drv); void matroxfb_unregister_driver(struct matroxfb_driver* drv); #define PCI_OPTION_REG … #define PCI_OPTION_ENABLE_ROM … #define PCI_MGA_INDEX … #define PCI_MGA_DATA … #define PCI_OPTION2_REG … #define PCI_OPTION3_REG … #define PCI_MEMMISC_REG … #define M_DWGCTL … #define M_MACCESS … #define M_CTLWTST … #define M_PLNWT … #define M_BCOL … #define M_FCOL … #define M_SGN … #define M_LEN … #define M_AR0 … #define M_AR1 … #define M_AR2 … #define M_AR3 … #define M_AR4 … #define M_AR5 … #define M_AR6 … #define M_CXBNDRY … #define M_FXBNDRY … #define M_YDSTLEN … #define M_PITCH … #define M_YDST … #define M_YDSTORG … #define M_YTOP … #define M_YBOT … /* mystique only */ #define M_CACHEFLUSH … #define M_EXEC … #define M_DWG_TRAP … #define M_DWG_BITBLT … #define M_DWG_ILOAD … #define M_DWG_LINEAR … #define M_DWG_SOLID … #define M_DWG_ARZERO … #define M_DWG_SGNZERO … #define M_DWG_SHIFTZERO … #define M_DWG_REPLACE … #define M_DWG_REPLACE2 … #define M_DWG_XOR … #define M_DWG_BFCOL … #define M_DWG_BMONOWF … #define M_DWG_TRANSC … #define M_FIFOSTATUS … #define M_STATUS … #define M_ICLEAR … #define M_IEN … #define M_VCOUNT … #define M_RESET … #define M_MEMRDBK … #define M_AGP2PLL … #define M_OPMODE … #define M_OPMODE_DMA_GEN_WRITE … #define M_OPMODE_DMA_BLIT … #define M_OPMODE_DMA_VECTOR_WRITE … #define M_OPMODE_DMA_LE … #define M_OPMODE_DMA_BE_8BPP … #define M_OPMODE_DMA_BE_16BPP … #define M_OPMODE_DMA_BE_32BPP … #define M_OPMODE_DIR_LE … #define M_OPMODE_DIR_BE_8BPP … #define M_OPMODE_DIR_BE_16BPP … #define M_OPMODE_DIR_BE_32BPP … #define M_ATTR_INDEX … #define M_ATTR_DATA … #define M_MISC_REG … #define M_3C2_RD … #define M_SEQ_INDEX … #define M_SEQ_DATA … #define M_SEQ1 … #define M_SEQ1_SCROFF … #define M_MISC_REG_READ … #define M_GRAPHICS_INDEX … #define M_GRAPHICS_DATA … #define M_CRTC_INDEX … #define M_ATTR_RESET … #define M_3DA_WR … #define M_INSTS1 … #define M_EXTVGA_INDEX … #define M_EXTVGA_DATA … /* G200 only */ #define M_SRCORG … #define M_DSTORG … #define M_RAMDAC_BASE … /* fortunately, same on TVP3026 and MGA1064 */ #define M_DAC_REG … #define M_DAC_VAL … #define M_PALETTE_MASK … #define M_X_INDEX … #define M_X_DATAREG … #define DAC_XGENIOCTRL … #define DAC_XGENIODATA … #define M_C2CTL … #define MX_OPTION_BSWAP … #ifdef __LITTLE_ENDIAN #define M_OPMODE_4BPP … #define M_OPMODE_8BPP … #define M_OPMODE_16BPP … #define M_OPMODE_24BPP … #define M_OPMODE_32BPP … #else #ifdef __BIG_ENDIAN #define M_OPMODE_4BPP … #define M_OPMODE_8BPP … #define M_OPMODE_16BPP … #define M_OPMODE_24BPP … #define M_OPMODE_32BPP … #else #error "Byte ordering have to be defined. Cannot continue." #endif #endif #define mga_inb(addr) … #define mga_inl(addr) … #define mga_outb(addr,val) … #define mga_outw(addr,val) … #define mga_outl(addr,val) … #define mga_readr(port,idx) … #define mga_setr(addr,port,val) … #define mga_fifo(n) … #define WaitTillIdle() … /* code speedup */ #ifdef CONFIG_FB_MATROX_MILLENIUM #define isInterleave(x) … #define isMillenium(x) … #define isMilleniumII(x) … #else #define isInterleave … #define isMillenium … #define isMilleniumII … #endif #define matroxfb_DAC_lock() … #define matroxfb_DAC_unlock() … #define matroxfb_DAC_lock_irqsave(flags) … #define matroxfb_DAC_unlock_irqrestore(flags) … extern void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg, int val); extern int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg); extern void matroxfb_var2my(struct fb_var_screeninfo* fvsi, struct my_timming* mt); extern int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc); extern int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable); #ifdef MATROXFB_USE_SPINLOCKS #define CRITBEGIN … #define CRITEND … #define CRITFLAGS … #else #define CRITBEGIN #define CRITEND #define CRITFLAGS #endif #endif /* __MATROXFB_H__ */
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