/***************************************************************************\ |* *| |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| |* *| |* NOTICE TO USER: The source code is copyrighted under U.S. and *| |* international laws. Users and possessors of this source code are *| |* hereby granted a nonexclusive, royalty-free copyright license to *| |* use this code in individual and commercial software. *| |* *| |* Any use of this source code must include, in the user documenta- *| |* tion and internal comments to the code, notices to the end user *| |* as follows: *| |* *| |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| |* *| |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| |* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| |* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| |* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| |* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| |* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| |* *| |* U.S. Government End Users. This source code is a "commercial *| |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| |* consisting of "commercial computer software" and "commercial *| |* computer software documentation," as such terms are used in *| |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| |* ment only as a commercial end item. Consistent with 48 C.F.R. *| |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| |* all U.S. Government End Users acquire the source code with only *| |* those rights set forth herein. *| |* *| \***************************************************************************/ /* * GPL licensing note -- nVidia is allowing a liberal interpretation of * the documentation restriction above, to merely say that this nVidia's * copyright and disclaimer should be included with all code derived * from this source. -- Jeff Garzik <[email protected]>, 01/Nov/99 */ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.21 2002/10/14 18:22:46 mvojkovi Exp $ */ #ifndef __RIVA_HW_H__ #define __RIVA_HW_H__ #define RIVA_SW_VERSION … #ifndef Bool Bool; #endif #ifndef TRUE #define TRUE … #endif #ifndef FALSE #define FALSE … #endif #ifndef NULL #define NULL … #endif /* * Typedefs to force certain sized values. */ U008; U016; U032; /* * HW access macros. */ #include <asm/io.h> #define NV_WR08(p,i,d) … #define NV_RD08(p,i) … #define NV_WR16(p,i,d) … #define NV_RD16(p,i) … #define NV_WR32(p,i,d) … #define NV_RD32(p,i) … #define VGA_WR08(p,i,d) … #define VGA_RD08(p,i) … /* * Define different architectures. */ #define NV_ARCH_03 … #define NV_ARCH_04 … #define NV_ARCH_10 … #define NV_ARCH_20 … #define NV_ARCH_30 … #define NV_ARCH_40 … /***************************************************************************\ * * * FIFO registers. * * * \***************************************************************************/ /* * Raster OPeration. Windows style ROP3. */ RivaRop; /* * 8X8 Monochrome pattern. */ RivaPattern; /* * Scissor clip rectangle. */ RivaClip; /* * 2D filled rectangle. */ RivaRectangle; /* * 2D screen-screen BLT. */ RivaScreenBlt; /* * 2D pixel BLT. */ RivaPixmap; /* * Filled rectangle combined with monochrome expand. Useful for glyphs. */ RivaBitmap; /* * 3D textured, Z buffered triangle. */ RivaTexturedTriangle03; RivaTexturedTriangle05; /* * 2D line. */ RivaLine; /* * 2D/3D surfaces */ RivaSurface; RivaSurface3D; /***************************************************************************\ * * * Virtualized RIVA H/W interface. * * * \***************************************************************************/ #define FP_ENABLE … #define FP_DITHER … struct _riva_hw_inst; struct _riva_hw_state; /* * Virtialized chip interface. Makes RIVA 128 and TNT look alike. */ RIVA_HW_INST; /* * Extended mode state information. */ RIVA_HW_STATE; /* * function prototypes */ extern int CalcStateExt ( RIVA_HW_INST *chip, RIVA_HW_STATE *state, struct pci_dev *pdev, int bpp, int width, int hDisplaySize, int height, int dotClock ); /* * External routines. */ int RivaGetConfig(RIVA_HW_INST *chip, struct pci_dev *pdev, unsigned int c); /* * FIFO Free Count. Should attempt to yield processor if RIVA is busy. */ #define RIVA_FIFO_FREE(hwinst,hwptr,cnt) … #endif /* __RIVA_HW_H__ */
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