// SPDX-License-Identifier: ISC /* * Copyright (c) 2010 Broadcom Corporation */ #ifndef BRCMFMAC_SDIO_H #define BRCMFMAC_SDIO_H #include <linux/skbuff.h> #include <linux/firmware.h> #include "firmware.h" #define SDIOD_FBR_SIZE … /* io_en */ #define SDIO_FUNC_ENABLE_1 … #define SDIO_FUNC_ENABLE_2 … /* io_rdys */ #define SDIO_FUNC_READY_1 … #define SDIO_FUNC_READY_2 … /* intr_status */ #define INTR_STATUS_FUNC1 … #define INTR_STATUS_FUNC2 … /* mask of register map */ #define REG_F0_REG_MASK … #define REG_F1_MISC_MASK … /* function 0 vendor specific CCCR registers */ #define SDIO_CCCR_BRCM_CARDCAP … #define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT … #define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT … #define SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC … /* Interrupt enable bits for each function */ #define SDIO_CCCR_IEN_FUNC0 … #define SDIO_CCCR_IEN_FUNC1 … #define SDIO_CCCR_IEN_FUNC2 … #define SDIO_CCCR_BRCM_CARDCTRL … #define SDIO_CCCR_BRCM_CARDCTRL_WLANRESET … #define SDIO_CCCR_BRCM_SEPINT … #define SDIO_CCCR_BRCM_SEPINT_MASK … #define SDIO_CCCR_BRCM_SEPINT_OE … #define SDIO_CCCR_BRCM_SEPINT_ACT_HI … /* function 1 miscellaneous registers */ /* sprom command and status */ #define SBSDIO_SPROM_CS … /* sprom info register */ #define SBSDIO_SPROM_INFO … /* sprom indirect access data byte 0 */ #define SBSDIO_SPROM_DATA_LOW … /* sprom indirect access data byte 1 */ #define SBSDIO_SPROM_DATA_HIGH … /* sprom indirect access addr byte 0 */ #define SBSDIO_SPROM_ADDR_LOW … /* gpio select */ #define SBSDIO_GPIO_SELECT … /* gpio output */ #define SBSDIO_GPIO_OUT … /* gpio enable */ #define SBSDIO_GPIO_EN … /* rev < 7, watermark for sdio device TX path */ #define SBSDIO_WATERMARK … /* control busy signal generation */ #define SBSDIO_DEVICE_CTL … /* SB Address Window Low (b15) */ #define SBSDIO_FUNC1_SBADDRLOW … /* SB Address Window Mid (b23:b16) */ #define SBSDIO_FUNC1_SBADDRMID … /* SB Address Window High (b31:b24) */ #define SBSDIO_FUNC1_SBADDRHIGH … /* Frame Control (frame term/abort) */ #define SBSDIO_FUNC1_FRAMECTRL … /* ChipClockCSR (ALP/HT ctl/status) */ #define SBSDIO_FUNC1_CHIPCLKCSR … /* SdioPullUp (on cmd, d0-d2) */ #define SBSDIO_FUNC1_SDIOPULLUP … /* Write Frame Byte Count Low */ #define SBSDIO_FUNC1_WFRAMEBCLO … /* Write Frame Byte Count High */ #define SBSDIO_FUNC1_WFRAMEBCHI … /* Read Frame Byte Count Low */ #define SBSDIO_FUNC1_RFRAMEBCLO … /* Read Frame Byte Count High */ #define SBSDIO_FUNC1_RFRAMEBCHI … /* MesBusyCtl (rev 11) */ #define SBSDIO_FUNC1_MESBUSYCTRL … /* Watermark for sdio device RX path */ #define SBSDIO_MESBUSY_RXFIFO_WM_MASK … #define SBSDIO_MESBUSY_RXFIFO_WM_SHIFT … /* Enable busy capability for MES access */ #define SBSDIO_MESBUSYCTRL_ENAB … #define SBSDIO_MESBUSYCTRL_ENAB_SHIFT … /* Sdio Core Rev 12 */ #define SBSDIO_FUNC1_WAKEUPCTRL … #define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK … #define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT … #define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK … #define SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT … #define SBSDIO_FUNC1_SLEEPCSR … #define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK … #define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT … #define SBSDIO_FUNC1_SLEEPCSR_KSO_EN … #define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK … #define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT … #define SBSDIO_FUNC1_MISC_REG_START … #define SBSDIO_FUNC1_MISC_REG_LIMIT … /* function 1 OCP space */ /* sb offset addr is <= 15 bits, 32k */ #define SBSDIO_SB_OFT_ADDR_MASK … #define SBSDIO_SB_OFT_ADDR_LIMIT … /* with b15, maps to 32-bit SB access */ #define SBSDIO_SB_ACCESS_2_4B_FLAG … /* Address bits from SBADDR regs */ #define SBSDIO_SBWINDOW_MASK … #define SDIOH_READ … #define SDIOH_WRITE … #define SDIOH_DATA_FIX … #define SDIOH_DATA_INC … /* internal return code */ #define SUCCESS … #define ERROR … /* Packet alignment for most efficient SDIO (can change based on platform) */ #define BRCMF_SDALIGN … /* watchdog polling interval */ #define BRCMF_WD_POLL … /** * enum brcmf_sdiod_state - the state of the bus. * * @BRCMF_SDIOD_DOWN: Device can be accessed, no DPC. * @BRCMF_SDIOD_DATA: Ready for data transfers, DPC enabled. * @BRCMF_SDIOD_NOMEDIUM: No medium access to dongle possible. */ enum brcmf_sdiod_state { … }; struct brcmf_sdreg { … }; struct brcmf_sdio; struct brcmf_sdiod_freezer; struct brcmf_sdio_dev { … }; /* sdio core registers */ struct sdpcmd_regs { … }; /* Register/deregister interrupt handler. */ int brcmf_sdiod_intr_register(struct brcmf_sdio_dev *sdiodev); void brcmf_sdiod_intr_unregister(struct brcmf_sdio_dev *sdiodev); /* SDIO device register access interface */ /* Accessors for SDIO Function 0 */ #define brcmf_sdiod_func0_rb(sdiodev, addr, r) … #define brcmf_sdiod_func0_wb(sdiodev, addr, v, ret) … /* Accessors for SDIO Function 1 */ #define brcmf_sdiod_readb(sdiodev, addr, r) … #define brcmf_sdiod_writeb(sdiodev, addr, v, ret) … u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret); void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data, int *ret); /* Buffer transfer to/from device (client) core via cmd53. * fn: function number * flags: backplane width, address increment, sync/async * buf: pointer to memory data buffer * nbytes: number of bytes to transfer to/from buf * pkt: pointer to packet associated with buf (if any) * complete: callback function for command completion (async only) * handle: handle for completion callback (first arg in callback) * Returns 0 or error code. * NOTE: Async operation is not currently supported. */ int brcmf_sdiod_send_pkt(struct brcmf_sdio_dev *sdiodev, struct sk_buff_head *pktq); int brcmf_sdiod_send_buf(struct brcmf_sdio_dev *sdiodev, u8 *buf, uint nbytes); int brcmf_sdiod_recv_pkt(struct brcmf_sdio_dev *sdiodev, struct sk_buff *pkt); int brcmf_sdiod_recv_buf(struct brcmf_sdio_dev *sdiodev, u8 *buf, uint nbytes); int brcmf_sdiod_recv_chain(struct brcmf_sdio_dev *sdiodev, struct sk_buff_head *pktq, uint totlen); /* Flags bits */ /* Four-byte target (backplane) width (vs. two-byte) */ #define SDIO_REQ_4BYTE … /* Fixed address (FIFO) (vs. incrementing address) */ #define SDIO_REQ_FIXED … /* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). * rw: read or write (0/1) * addr: direct SDIO address * buf: pointer to memory data buffer * nbytes: number of bytes to transfer to/from buf * Returns 0 or error code. */ int brcmf_sdiod_ramrw(struct brcmf_sdio_dev *sdiodev, bool write, u32 address, u8 *data, uint size); /* Issue an abort to the specified function */ int brcmf_sdiod_abort(struct brcmf_sdio_dev *sdiodev, struct sdio_func *func); void brcmf_sdiod_sgtable_alloc(struct brcmf_sdio_dev *sdiodev); void brcmf_sdiod_change_state(struct brcmf_sdio_dev *sdiodev, enum brcmf_sdiod_state state); bool brcmf_sdiod_freezing(struct brcmf_sdio_dev *sdiodev); void brcmf_sdiod_try_freeze(struct brcmf_sdio_dev *sdiodev); void brcmf_sdiod_freezer_count(struct brcmf_sdio_dev *sdiodev); void brcmf_sdiod_freezer_uncount(struct brcmf_sdio_dev *sdiodev); int brcmf_sdiod_probe(struct brcmf_sdio_dev *sdiodev); int brcmf_sdiod_remove(struct brcmf_sdio_dev *sdiodev); struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev); void brcmf_sdio_remove(struct brcmf_sdio *bus); void brcmf_sdio_isr(struct brcmf_sdio *bus, bool in_isr); void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active); void brcmf_sdio_wowl_config(struct device *dev, bool enabled); int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep); void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus); #endif /* BRCMFMAC_SDIO_H */
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