#ifndef __RTL_92S_DM_H__
#define __RTL_92S_DM_H__
enum dm_dig_alg { … };
enum dm_dig_two_port_alg { … };
enum dm_dig_dbg { … };
enum dm_dig_sta { … };
enum dm_ratr_sta { … };
#define DM_TYPE_BYFW …
#define DM_TYPE_BYDRIVER …
#define TX_HIGH_PWR_LEVEL_NORMAL …
#define TX_HIGH_PWR_LEVEL_LEVEL1 …
#define TX_HIGH_PWR_LEVEL_LEVEL2 …
#define HAL_DM_DIG_DISABLE …
#define HAL_DM_HIPWR_DISABLE …
#define TX_HIGHPWR_LEVEL_NORMAL …
#define TX_HIGHPWR_LEVEL_NORMAL1 …
#define TX_HIGHPWR_LEVEL_NORMAL2 …
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 …
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 …
#define DM_DIG_HIGH_PWR_THRESH_HIGH …
#define DM_DIG_HIGH_PWR_THRESH_LOW …
#define DM_DIG_MIN_NETCORE …
void rtl92s_dm_watchdog(struct ieee80211_hw *hw);
void rtl92s_dm_init(struct ieee80211_hw *hw);
void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw);
#endif