linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/def.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2009-2010  Realtek Corporation.*/

#ifndef __RTL8821AE_DEF_H__
#define __RTL8821AE_DEF_H__

/*--------------------------Define -------------------------------------------*/
#define USE_SPECIFIC_FW_TO_SUPPORT_WOWLAN

/* BIT 7 HT Rate*/
/*TxHT = 0*/
#define MGN_1M
#define MGN_2M
#define MGN_5_5M
#define MGN_11M

#define MGN_6M
#define MGN_9M
#define MGN_12M
#define MGN_18M
#define MGN_24M
#define MGN_36M
#define MGN_48M
#define MGN_54M

/* TxHT = 1 */
#define MGN_MCS0
#define MGN_MCS1
#define MGN_MCS2
#define MGN_MCS3
#define MGN_MCS4
#define MGN_MCS5
#define MGN_MCS6
#define MGN_MCS7
#define MGN_MCS8
#define MGN_MCS9
#define MGN_MCS10
#define MGN_MCS11
#define MGN_MCS12
#define MGN_MCS13
#define MGN_MCS14
#define MGN_MCS15
/* VHT rate */
#define MGN_VHT1SS_MCS0
#define MGN_VHT1SS_MCS1
#define MGN_VHT1SS_MCS2
#define MGN_VHT1SS_MCS3
#define MGN_VHT1SS_MCS4
#define MGN_VHT1SS_MCS5
#define MGN_VHT1SS_MCS6
#define MGN_VHT1SS_MCS7
#define MGN_VHT1SS_MCS8
#define MGN_VHT1SS_MCS9
#define MGN_VHT2SS_MCS0
#define MGN_VHT2SS_MCS1
#define MGN_VHT2SS_MCS2
#define MGN_VHT2SS_MCS3
#define MGN_VHT2SS_MCS4
#define MGN_VHT2SS_MCS5
#define MGN_VHT2SS_MCS6
#define MGN_VHT2SS_MCS7
#define MGN_VHT2SS_MCS8
#define MGN_VHT2SS_MCS9

#define MGN_VHT3SS_MCS0
#define MGN_VHT3SS_MCS1
#define MGN_VHT3SS_MCS2
#define MGN_VHT3SS_MCS3
#define MGN_VHT3SS_MCS4
#define MGN_VHT3SS_MCS5
#define MGN_VHT3SS_MCS6
#define MGN_VHT3SS_MCS7
#define MGN_VHT3SS_MCS8
#define MGN_VHT3SS_MCS9

#define MGN_MCS0_SG
#define MGN_MCS1_SG
#define MGN_MCS2_SG
#define MGN_MCS3_SG
#define MGN_MCS4_SG
#define MGN_MCS5_SG
#define MGN_MCS6_SG
#define MGN_MCS7_SG
#define MGN_MCS8_SG
#define MGN_MCS9_SG
#define MGN_MCS10_SG
#define MGN_MCS11_SG
#define MGN_MCS12_SG
#define MGN_MCS13_SG
#define MGN_MCS14_SG
#define MGN_MCS15_SG

#define MGN_UNKNOWN

/* 30 ms */
#define WIFI_NAV_UPPER_US
#define HAL_92C_NAV_UPPER_UNIT

#define MAX_RX_DMA_BUFFER_SIZE

#define HAL_PRIME_CHNL_OFFSET_DONT_CARE
#define HAL_PRIME_CHNL_OFFSET_LOWER
#define HAL_PRIME_CHNL_OFFSET_UPPER

#define RX_MPDU_QUEUE
#define RX_CMD_QUEUE

#define MAX_RX_DMA_BUFFER_SIZE_8812

#define CHIP_BONDING_IDENTIFIER(_value)

#define CHIP_8812
#define CHIP_8821

#define CHIP_8821A
#define NORMAL_CHIP
#define RF_TYPE_1T1R
#define RF_TYPE_1T2R
#define RF_TYPE_2T2R
#define CHIP_VENDOR_UMC
#define B_CUT_VERSION
#define C_CUT_VERSION
#define D_CUT_VERSION
#define E_CUT_VERSION
#define RF_RL_ID

enum version_8821ae {};

enum vht_data_sc {};

/* MASK */
#define IC_TYPE_MASK
#define CHIP_TYPE_MASK
#define RF_TYPE_MASK
#define MANUFACTUER_MASK
#define ROM_VERSION_MASK
#define CUT_VERSION_MASK

/* Get element */
#define GET_CVID_IC_TYPE(version)
#define GET_CVID_CHIP_TYPE(version)
#define GET_CVID_RF_TYPE(version)
#define GET_CVID_MANUFACTUER(version)
#define GET_CVID_ROM_VERSION(version)
#define GET_CVID_CUT_VERSION(version)

#define IS_1T1R(version)
#define IS_1T2R(version)
#define IS_2T2R(version)

#define IS_8812_SERIES(version)
#define IS_8821_SERIES(version)

#define IS_VENDOR_8812A_TEST_CHIP(version)
#define IS_VENDOR_8812A_MP_CHIP(version)
#define IS_VENDOR_8812A_C_CUT(version)

#define IS_VENDOR_8821A_TEST_CHIP(version)
#define IS_VENDOR_8821A_MP_CHIP(version)
#define IS_VENDOR_8821A_B_CUT(version)
enum board_type {};

enum rf_optype {};

enum rf_power_state {};

enum power_save_mode {};

enum power_polocy_config {};

enum interface_select_pci {};

enum rtl_desc_qsel {};

struct phy_sts_cck_8821ae_t {};

struct h2c_cmd_8821ae {};

#endif